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0043 #ifndef _DT_BINDINGS_CLK_SUN8I_H3_H_
0044 #define _DT_BINDINGS_CLK_SUN8I_H3_H_
0045
0046 #define CLK_PLL_VIDEO 6
0047
0048 #define CLK_PLL_PERIPH0 9
0049
0050 #define CLK_CPUX 14
0051
0052 #define CLK_BUS_CE 20
0053 #define CLK_BUS_DMA 21
0054 #define CLK_BUS_MMC0 22
0055 #define CLK_BUS_MMC1 23
0056 #define CLK_BUS_MMC2 24
0057 #define CLK_BUS_NAND 25
0058 #define CLK_BUS_DRAM 26
0059 #define CLK_BUS_EMAC 27
0060 #define CLK_BUS_TS 28
0061 #define CLK_BUS_HSTIMER 29
0062 #define CLK_BUS_SPI0 30
0063 #define CLK_BUS_SPI1 31
0064 #define CLK_BUS_OTG 32
0065 #define CLK_BUS_EHCI0 33
0066 #define CLK_BUS_EHCI1 34
0067 #define CLK_BUS_EHCI2 35
0068 #define CLK_BUS_EHCI3 36
0069 #define CLK_BUS_OHCI0 37
0070 #define CLK_BUS_OHCI1 38
0071 #define CLK_BUS_OHCI2 39
0072 #define CLK_BUS_OHCI3 40
0073 #define CLK_BUS_VE 41
0074 #define CLK_BUS_TCON0 42
0075 #define CLK_BUS_TCON1 43
0076 #define CLK_BUS_DEINTERLACE 44
0077 #define CLK_BUS_CSI 45
0078 #define CLK_BUS_TVE 46
0079 #define CLK_BUS_HDMI 47
0080 #define CLK_BUS_DE 48
0081 #define CLK_BUS_GPU 49
0082 #define CLK_BUS_MSGBOX 50
0083 #define CLK_BUS_SPINLOCK 51
0084 #define CLK_BUS_CODEC 52
0085 #define CLK_BUS_SPDIF 53
0086 #define CLK_BUS_PIO 54
0087 #define CLK_BUS_THS 55
0088 #define CLK_BUS_I2S0 56
0089 #define CLK_BUS_I2S1 57
0090 #define CLK_BUS_I2S2 58
0091 #define CLK_BUS_I2C0 59
0092 #define CLK_BUS_I2C1 60
0093 #define CLK_BUS_I2C2 61
0094 #define CLK_BUS_UART0 62
0095 #define CLK_BUS_UART1 63
0096 #define CLK_BUS_UART2 64
0097 #define CLK_BUS_UART3 65
0098 #define CLK_BUS_SCR0 66
0099 #define CLK_BUS_EPHY 67
0100 #define CLK_BUS_DBG 68
0101
0102 #define CLK_THS 69
0103 #define CLK_NAND 70
0104 #define CLK_MMC0 71
0105 #define CLK_MMC0_SAMPLE 72
0106 #define CLK_MMC0_OUTPUT 73
0107 #define CLK_MMC1 74
0108 #define CLK_MMC1_SAMPLE 75
0109 #define CLK_MMC1_OUTPUT 76
0110 #define CLK_MMC2 77
0111 #define CLK_MMC2_SAMPLE 78
0112 #define CLK_MMC2_OUTPUT 79
0113 #define CLK_TS 80
0114 #define CLK_CE 81
0115 #define CLK_SPI0 82
0116 #define CLK_SPI1 83
0117 #define CLK_I2S0 84
0118 #define CLK_I2S1 85
0119 #define CLK_I2S2 86
0120 #define CLK_SPDIF 87
0121 #define CLK_USB_PHY0 88
0122 #define CLK_USB_PHY1 89
0123 #define CLK_USB_PHY2 90
0124 #define CLK_USB_PHY3 91
0125 #define CLK_USB_OHCI0 92
0126 #define CLK_USB_OHCI1 93
0127 #define CLK_USB_OHCI2 94
0128 #define CLK_USB_OHCI3 95
0129 #define CLK_DRAM 96
0130 #define CLK_DRAM_VE 97
0131 #define CLK_DRAM_CSI 98
0132 #define CLK_DRAM_DEINTERLACE 99
0133 #define CLK_DRAM_TS 100
0134 #define CLK_DE 101
0135 #define CLK_TCON0 102
0136 #define CLK_TVE 103
0137 #define CLK_DEINTERLACE 104
0138 #define CLK_CSI_MISC 105
0139 #define CLK_CSI_SCLK 106
0140 #define CLK_CSI_MCLK 107
0141 #define CLK_VE 108
0142 #define CLK_AC_DIG 109
0143 #define CLK_AVS 110
0144 #define CLK_HDMI 111
0145 #define CLK_HDMI_DDC 112
0146 #define CLK_MBUS 113
0147 #define CLK_GPU 114
0148
0149
0150 #define CLK_BUS_SCR1 115
0151
0152 #endif