dt-bindings/clock/sun5i-ccu.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Copyright 2016 Maxime Ripard
0004  *
0005  * Maxime Ripard <maxime.ripard@free-electrons.com>
0006  */
0007
0008 #ifndef _DT_BINDINGS_CLK_SUN5I_H_
0009 #define _DT_BINDINGS_CLK_SUN5I_H_
0010
0011 #define CLK_HOSC        1
0012
0013 #define CLK_PLL_VIDEO0_2X   9
0014
0015 #define CLK_PLL_VIDEO1_2X   16
0016 #define CLK_CPU         17
0017
0018 #define CLK_AHB_OTG     23
0019 #define CLK_AHB_EHCI        24
0020 #define CLK_AHB_OHCI        25
0021 #define CLK_AHB_SS      26
0022 #define CLK_AHB_DMA     27
0023 #define CLK_AHB_BIST        28
0024 #define CLK_AHB_MMC0        29
0025 #define CLK_AHB_MMC1        30
0026 #define CLK_AHB_MMC2        31
0027 #define CLK_AHB_NAND        32
0028 #define CLK_AHB_SDRAM       33
0029 #define CLK_AHB_EMAC        34
0030 #define CLK_AHB_TS      35
0031 #define CLK_AHB_SPI0        36
0032 #define CLK_AHB_SPI1        37
0033 #define CLK_AHB_SPI2        38
0034 #define CLK_AHB_GPS     39
0035 #define CLK_AHB_HSTIMER     40
0036 #define CLK_AHB_VE      41
0037 #define CLK_AHB_TVE     42
0038 #define CLK_AHB_LCD     43
0039 #define CLK_AHB_CSI     44
0040 #define CLK_AHB_HDMI        45
0041 #define CLK_AHB_DE_BE       46
0042 #define CLK_AHB_DE_FE       47
0043 #define CLK_AHB_IEP     48
0044 #define CLK_AHB_GPU     49
0045 #define CLK_APB0_CODEC      50
0046 #define CLK_APB0_SPDIF      51
0047 #define CLK_APB0_I2S        52
0048 #define CLK_APB0_PIO        53
0049 #define CLK_APB0_IR     54
0050 #define CLK_APB0_KEYPAD     55
0051 #define CLK_APB1_I2C0       56
0052 #define CLK_APB1_I2C1       57
0053 #define CLK_APB1_I2C2       58
0054 #define CLK_APB1_UART0      59
0055 #define CLK_APB1_UART1      60
0056 #define CLK_APB1_UART2      61
0057 #define CLK_APB1_UART3      62
0058 #define CLK_NAND        63
0059 #define CLK_MMC0        64
0060 #define CLK_MMC1        65
0061 #define CLK_MMC2        66
0062 #define CLK_TS          67
0063 #define CLK_SS          68
0064 #define CLK_SPI0        69
0065 #define CLK_SPI1        70
0066 #define CLK_SPI2        71
0067 #define CLK_IR          72
0068 #define CLK_I2S         73
0069 #define CLK_SPDIF       74
0070 #define CLK_KEYPAD      75
0071 #define CLK_USB_OHCI        76
0072 #define CLK_USB_PHY0        77
0073 #define CLK_USB_PHY1        78
0074 #define CLK_GPS         79
0075 #define CLK_DRAM_VE     80
0076 #define CLK_DRAM_CSI        81
0077 #define CLK_DRAM_TS     82
0078 #define CLK_DRAM_TVE        83
0079 #define CLK_DRAM_DE_FE      84
0080 #define CLK_DRAM_DE_BE      85
0081 #define CLK_DRAM_ACE        86
0082 #define CLK_DRAM_IEP        87
0083 #define CLK_DE_BE       88
0084 #define CLK_DE_FE       89
0085 #define CLK_TCON_CH0        90
0086
0087 #define CLK_TCON_CH1        92
0088 #define CLK_CSI         93
0089 #define CLK_VE          94
0090 #define CLK_CODEC       95
0091 #define CLK_AVS         96
0092 #define CLK_HDMI        97
0093 #define CLK_GPU         98
0094 #define CLK_MBUS        99
0095 #define CLK_IEP         100
0096
0097 #endif /* _DT_BINDINGS_CLK_SUN5I_H_ */