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0001 /* SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause */
0002 /*
0003  * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
0004  * Author: Gabriel Fernandez <gabriel.fernandez@st.com> for STMicroelectronics.
0005  */
0006 
0007 #ifndef _DT_BINDINGS_STM32MP1_CLKS_H_
0008 #define _DT_BINDINGS_STM32MP1_CLKS_H_
0009 
0010 /* OSCILLATOR clocks */
0011 #define CK_HSE      0
0012 #define CK_CSI      1
0013 #define CK_LSI      2
0014 #define CK_LSE      3
0015 #define CK_HSI      4
0016 #define CK_HSE_DIV2 5
0017 
0018 /* Bus clocks */
0019 #define TIM2        6
0020 #define TIM3        7
0021 #define TIM4        8
0022 #define TIM5        9
0023 #define TIM6        10
0024 #define TIM7        11
0025 #define TIM12       12
0026 #define TIM13       13
0027 #define TIM14       14
0028 #define LPTIM1      15
0029 #define SPI2        16
0030 #define SPI3        17
0031 #define USART2      18
0032 #define USART3      19
0033 #define UART4       20
0034 #define UART5       21
0035 #define UART7       22
0036 #define UART8       23
0037 #define I2C1        24
0038 #define I2C2        25
0039 #define I2C3        26
0040 #define I2C5        27
0041 #define SPDIF       28
0042 #define CEC     29
0043 #define DAC12       30
0044 #define MDIO        31
0045 #define TIM1        32
0046 #define TIM8        33
0047 #define TIM15       34
0048 #define TIM16       35
0049 #define TIM17       36
0050 #define SPI1        37
0051 #define SPI4        38
0052 #define SPI5        39
0053 #define USART6      40
0054 #define SAI1        41
0055 #define SAI2        42
0056 #define SAI3        43
0057 #define DFSDM       44
0058 #define FDCAN       45
0059 #define LPTIM2      46
0060 #define LPTIM3      47
0061 #define LPTIM4      48
0062 #define LPTIM5      49
0063 #define SAI4        50
0064 #define SYSCFG      51
0065 #define VREF        52
0066 #define TMPSENS     53
0067 #define PMBCTRL     54
0068 #define HDP     55
0069 #define LTDC        56
0070 #define DSI     57
0071 #define IWDG2       58
0072 #define USBPHY      59
0073 #define STGENRO     60
0074 #define SPI6        61
0075 #define I2C4        62
0076 #define I2C6        63
0077 #define USART1      64
0078 #define RTCAPB      65
0079 #define TZC1        66
0080 #define TZPC        67
0081 #define IWDG1       68
0082 #define BSEC        69
0083 #define STGEN       70
0084 #define DMA1        71
0085 #define DMA2        72
0086 #define DMAMUX      73
0087 #define ADC12       74
0088 #define USBO        75
0089 #define SDMMC3      76
0090 #define DCMI        77
0091 #define CRYP2       78
0092 #define HASH2       79
0093 #define RNG2        80
0094 #define CRC2        81
0095 #define HSEM        82
0096 #define IPCC        83
0097 #define GPIOA       84
0098 #define GPIOB       85
0099 #define GPIOC       86
0100 #define GPIOD       87
0101 #define GPIOE       88
0102 #define GPIOF       89
0103 #define GPIOG       90
0104 #define GPIOH       91
0105 #define GPIOI       92
0106 #define GPIOJ       93
0107 #define GPIOK       94
0108 #define GPIOZ       95
0109 #define CRYP1       96
0110 #define HASH1       97
0111 #define RNG1        98
0112 #define BKPSRAM     99
0113 #define MDMA        100
0114 #define GPU     101
0115 #define ETHCK       102
0116 #define ETHTX       103
0117 #define ETHRX       104
0118 #define ETHMAC      105
0119 #define FMC     106
0120 #define QSPI        107
0121 #define SDMMC1      108
0122 #define SDMMC2      109
0123 #define CRC1        110
0124 #define USBH        111
0125 #define ETHSTP      112
0126 #define TZC2        113
0127 
0128 /* Kernel clocks */
0129 #define SDMMC1_K    118
0130 #define SDMMC2_K    119
0131 #define SDMMC3_K    120
0132 #define FMC_K       121
0133 #define QSPI_K      122
0134 #define ETHCK_K     123
0135 #define RNG1_K      124
0136 #define RNG2_K      125
0137 #define GPU_K       126
0138 #define USBPHY_K    127
0139 #define STGEN_K     128
0140 #define SPDIF_K     129
0141 #define SPI1_K      130
0142 #define SPI2_K      131
0143 #define SPI3_K      132
0144 #define SPI4_K      133
0145 #define SPI5_K      134
0146 #define SPI6_K      135
0147 #define CEC_K       136
0148 #define I2C1_K      137
0149 #define I2C2_K      138
0150 #define I2C3_K      139
0151 #define I2C4_K      140
0152 #define I2C5_K      141
0153 #define I2C6_K      142
0154 #define LPTIM1_K    143
0155 #define LPTIM2_K    144
0156 #define LPTIM3_K    145
0157 #define LPTIM4_K    146
0158 #define LPTIM5_K    147
0159 #define USART1_K    148
0160 #define USART2_K    149
0161 #define USART3_K    150
0162 #define UART4_K     151
0163 #define UART5_K     152
0164 #define USART6_K    153
0165 #define UART7_K     154
0166 #define UART8_K     155
0167 #define DFSDM_K     156
0168 #define FDCAN_K     157
0169 #define SAI1_K      158
0170 #define SAI2_K      159
0171 #define SAI3_K      160
0172 #define SAI4_K      161
0173 #define ADC12_K     162
0174 #define DSI_K       163
0175 #define DSI_PX      164
0176 #define ADFSDM_K    165
0177 #define USBO_K      166
0178 #define LTDC_PX     167
0179 #define DAC12_K     168
0180 #define ETHPTP_K    169
0181 
0182 /* PLL */
0183 #define PLL1        176
0184 #define PLL2        177
0185 #define PLL3        178
0186 #define PLL4        179
0187 
0188 /* ODF */
0189 #define PLL1_P      180
0190 #define PLL1_Q      181
0191 #define PLL1_R      182
0192 #define PLL2_P      183
0193 #define PLL2_Q      184
0194 #define PLL2_R      185
0195 #define PLL3_P      186
0196 #define PLL3_Q      187
0197 #define PLL3_R      188
0198 #define PLL4_P      189
0199 #define PLL4_Q      190
0200 #define PLL4_R      191
0201 
0202 /* AUX */
0203 #define RTC     192
0204 
0205 /* MCLK */
0206 #define CK_PER      193
0207 #define CK_MPU      194
0208 #define CK_AXI      195
0209 #define CK_MCU      196
0210 
0211 /* Time base */
0212 #define TIM2_K      197
0213 #define TIM3_K      198
0214 #define TIM4_K      199
0215 #define TIM5_K      200
0216 #define TIM6_K      201
0217 #define TIM7_K      202
0218 #define TIM12_K     203
0219 #define TIM13_K     204
0220 #define TIM14_K     205
0221 #define TIM1_K      206
0222 #define TIM8_K      207
0223 #define TIM15_K     208
0224 #define TIM16_K     209
0225 #define TIM17_K     210
0226 
0227 /* MCO clocks */
0228 #define CK_MCO1     211
0229 #define CK_MCO2     212
0230 
0231 /* TRACE & DEBUG clocks */
0232 #define CK_DBG      214
0233 #define CK_TRACE    215
0234 
0235 /* DDR */
0236 #define DDRC1       220
0237 #define DDRC1LP     221
0238 #define DDRC2       222
0239 #define DDRC2LP     223
0240 #define DDRPHYC     224
0241 #define DDRPHYCLP   225
0242 #define DDRCAPB     226
0243 #define DDRCAPBLP   227
0244 #define AXIDCG      228
0245 #define DDRPHYCAPB  229
0246 #define DDRPHYCAPBLP    230
0247 #define DDRPERFM    231
0248 
0249 #define STM32MP1_LAST_CLK 232
0250 
0251 /* SCMI clock identifiers */
0252 #define CK_SCMI_HSE     0
0253 #define CK_SCMI_HSI     1
0254 #define CK_SCMI_CSI     2
0255 #define CK_SCMI_LSE     3
0256 #define CK_SCMI_LSI     4
0257 #define CK_SCMI_PLL2_Q      5
0258 #define CK_SCMI_PLL2_R      6
0259 #define CK_SCMI_MPU     7
0260 #define CK_SCMI_AXI     8
0261 #define CK_SCMI_BSEC        9
0262 #define CK_SCMI_CRYP1       10
0263 #define CK_SCMI_GPIOZ       11
0264 #define CK_SCMI_HASH1       12
0265 #define CK_SCMI_I2C4        13
0266 #define CK_SCMI_I2C6        14
0267 #define CK_SCMI_IWDG1       15
0268 #define CK_SCMI_RNG1        16
0269 #define CK_SCMI_RTC     17
0270 #define CK_SCMI_RTCAPB      18
0271 #define CK_SCMI_SPI6        19
0272 #define CK_SCMI_USART1      20
0273 
0274 #endif /* _DT_BINDINGS_STM32MP1_CLKS_H_ */