dt-bindings/clock/stm32fx-clock.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * stm32fx-clock.h
0004  *
0005  * Copyright (C) 2016 STMicroelectronics
0006  * Author: Gabriel Fernandez for STMicroelectronics.
0007  */
0008
0009 /*
0010  * List of clocks which are not derived from system clock (SYSCLOCK)
0011  *
0012  * The index of these clocks is the secondary index of DT bindings
0013  * (see Documentation/devicetree/bindings/clock/st,stm32-rcc.txt)
0014  *
0015  * e.g:
0016     <assigned-clocks = <&rcc 1 CLK_LSE>;
0017 */
0018
0019 #ifndef _DT_BINDINGS_CLK_STMFX_H
0020 #define _DT_BINDINGS_CLK_STMFX_H
0021
0022 #define SYSTICK         0
0023 #define FCLK            1
0024 #define CLK_LSI         2
0025 #define CLK_LSE         3
0026 #define CLK_HSE_RTC     4
0027 #define CLK_RTC         5
0028 #define PLL_VCO_I2S     6
0029 #define PLL_VCO_SAI     7
0030 #define CLK_LCD         8
0031 #define CLK_I2S         9
0032 #define CLK_SAI1        10
0033 #define CLK_SAI2        11
0034 #define CLK_I2SQ_PDIV       12
0035 #define CLK_SAIQ_PDIV       13
0036 #define CLK_HSI         14
0037 #define CLK_SYSCLK      15
0038 #define CLK_F469_DSI        16
0039
0040 #define END_PRIMARY_CLK     17
0041
0042 #define CLK_HDMI_CEC        16
0043 #define CLK_SPDIF       17
0044 #define CLK_USART1      18
0045 #define CLK_USART2      19
0046 #define CLK_USART3      20
0047 #define CLK_UART4       21
0048 #define CLK_UART5       22
0049 #define CLK_USART6      23
0050 #define CLK_UART7       24
0051 #define CLK_UART8       25
0052 #define CLK_I2C1        26
0053 #define CLK_I2C2        27
0054 #define CLK_I2C3        28
0055 #define CLK_I2C4        29
0056 #define CLK_LPTIMER     30
0057 #define CLK_PLL_SRC     31
0058 #define CLK_DFSDM1      32
0059 #define CLK_ADFSDM1     33
0060 #define CLK_F769_DSI        34
0061 #define END_PRIMARY_CLK_F7  35
0062
0063 #endif