dt-bindings/clock/starfive-jh7100-audio.h

0001 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
0002 /*
0003  * Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
0004  */
0005
0006 #ifndef __DT_BINDINGS_CLOCK_STARFIVE_JH7100_AUDIO_H__
0007 #define __DT_BINDINGS_CLOCK_STARFIVE_JH7100_AUDIO_H__
0008
0009 #define JH7100_AUDCLK_ADC_MCLK      0
0010 #define JH7100_AUDCLK_I2S1_MCLK     1
0011 #define JH7100_AUDCLK_I2SADC_APB    2
0012 #define JH7100_AUDCLK_I2SADC_BCLK   3
0013 #define JH7100_AUDCLK_I2SADC_BCLK_N 4
0014 #define JH7100_AUDCLK_I2SADC_LRCLK  5
0015 #define JH7100_AUDCLK_PDM_APB       6
0016 #define JH7100_AUDCLK_PDM_MCLK      7
0017 #define JH7100_AUDCLK_I2SVAD_APB    8
0018 #define JH7100_AUDCLK_SPDIF     9
0019 #define JH7100_AUDCLK_SPDIF_APB     10
0020 #define JH7100_AUDCLK_PWMDAC_APB    11
0021 #define JH7100_AUDCLK_DAC_MCLK      12
0022 #define JH7100_AUDCLK_I2SDAC_APB    13
0023 #define JH7100_AUDCLK_I2SDAC_BCLK   14
0024 #define JH7100_AUDCLK_I2SDAC_BCLK_N 15
0025 #define JH7100_AUDCLK_I2SDAC_LRCLK  16
0026 #define JH7100_AUDCLK_I2S1_APB      17
0027 #define JH7100_AUDCLK_I2S1_BCLK     18
0028 #define JH7100_AUDCLK_I2S1_BCLK_N   19
0029 #define JH7100_AUDCLK_I2S1_LRCLK    20
0030 #define JH7100_AUDCLK_I2SDAC16K_APB 21
0031 #define JH7100_AUDCLK_APB0_BUS      22
0032 #define JH7100_AUDCLK_DMA1P_AHB     23
0033 #define JH7100_AUDCLK_USB_APB       24
0034 #define JH7100_AUDCLK_USB_LPM       25
0035 #define JH7100_AUDCLK_USB_STB       26
0036 #define JH7100_AUDCLK_APB_EN        27
0037 #define JH7100_AUDCLK_VAD_MEM       28
0038
0039 #define JH7100_AUDCLK_END       29
0040
0041 #endif /* __DT_BINDINGS_CLOCK_STARFIVE_JH7100_AUDIO_H__ */