dt-bindings/clock/sifive-fu740-prci.h

0001 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
0002 /*
0003  * Copyright (C) 2019 SiFive, Inc.
0004  * Wesley Terpstra
0005  * Paul Walmsley
0006  * Zong Li
0007  */
0008
0009 #ifndef __DT_BINDINGS_CLOCK_SIFIVE_FU740_PRCI_H
0010 #define __DT_BINDINGS_CLOCK_SIFIVE_FU740_PRCI_H
0011
0012 /* Clock indexes for use by Device Tree data and the PRCI driver */
0013
0014 #define FU740_PRCI_CLK_COREPLL      0
0015 #define FU740_PRCI_CLK_DDRPLL       1
0016 #define FU740_PRCI_CLK_GEMGXLPLL    2
0017 #define FU740_PRCI_CLK_DVFSCOREPLL  3
0018 #define FU740_PRCI_CLK_HFPCLKPLL    4
0019 #define FU740_PRCI_CLK_CLTXPLL      5
0020 #define FU740_PRCI_CLK_TLCLK        6
0021 #define FU740_PRCI_CLK_PCLK     7
0022 #define FU740_PRCI_CLK_PCIE_AUX     8
0023
0024 #endif  /* __DT_BINDINGS_CLOCK_SIFIVE_FU740_PRCI_H */