dt-bindings/clock/s3c2412.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
0004  *
0005  * Device Tree binding constants clock controllers of Samsung S3C2412.
0006  */
0007
0008 #ifndef _DT_BINDINGS_CLOCK_SAMSUNG_S3C2412_CLOCK_H
0009 #define _DT_BINDINGS_CLOCK_SAMSUNG_S3C2412_CLOCK_H
0010
0011 /*
0012  * Let each exported clock get a unique index, which is used on DT-enabled
0013  * platforms to lookup the clock from a clock specifier. These indices are
0014  * therefore considered an ABI and so must not be changed. This implies
0015  * that new clocks should be added either in free spaces between clock groups
0016  * or at the end.
0017  */
0018
0019 /* Core clocks. */
0020
0021 /* id 1 is reserved */
0022 #define MPLL            2
0023 #define UPLL            3
0024 #define MDIVCLK         4
0025 #define MSYSCLK         5
0026 #define USYSCLK         6
0027 #define HCLK            7
0028 #define PCLK            8
0029 #define ARMDIV          9
0030 #define ARMCLK          10
0031
0032
0033 /* Special clocks */
0034 #define SCLK_CAM        16
0035 #define SCLK_UART       17
0036 #define SCLK_I2S        18
0037 #define SCLK_USBD       19
0038 #define SCLK_USBH       20
0039
0040 /* pclk-gates */
0041 #define PCLK_WDT        32
0042 #define PCLK_SPI        33
0043 #define PCLK_I2S        34
0044 #define PCLK_I2C        35
0045 #define PCLK_ADC        36
0046 #define PCLK_RTC        37
0047 #define PCLK_GPIO       38
0048 #define PCLK_UART2      39
0049 #define PCLK_UART1      40
0050 #define PCLK_UART0      41
0051 #define PCLK_SDI        42
0052 #define PCLK_PWM        43
0053 #define PCLK_USBD       44
0054
0055 /* hclk-gates */
0056 #define HCLK_HALF       48
0057 #define HCLK_X2         49
0058 #define HCLK_SDRAM      50
0059 #define HCLK_USBH       51
0060 #define HCLK_LCD        52
0061 #define HCLK_NAND       53
0062 #define HCLK_DMA3       54
0063 #define HCLK_DMA2       55
0064 #define HCLK_DMA1       56
0065 #define HCLK_DMA0       57
0066
0067 /* Total number of clocks. */
0068 #define NR_CLKS         (HCLK_DMA0 + 1)
0069
0070 #endif /* _DT_BINDINGS_CLOCK_SAMSUNG_S3C2412_CLOCK_H */