dt-bindings/clock/r8a73a4-clock.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Copyright 2014 Ulrich Hecht
0004  */
0005
0006 #ifndef __DT_BINDINGS_CLOCK_R8A73A4_H__
0007 #define __DT_BINDINGS_CLOCK_R8A73A4_H__
0008
0009 /* CPG */
0010 #define R8A73A4_CLK_MAIN    0
0011 #define R8A73A4_CLK_PLL0    1
0012 #define R8A73A4_CLK_PLL1    2
0013 #define R8A73A4_CLK_PLL2    3
0014 #define R8A73A4_CLK_PLL2S   4
0015 #define R8A73A4_CLK_PLL2H   5
0016 #define R8A73A4_CLK_Z       6
0017 #define R8A73A4_CLK_Z2      7
0018 #define R8A73A4_CLK_I       8
0019 #define R8A73A4_CLK_M3      9
0020 #define R8A73A4_CLK_B       10
0021 #define R8A73A4_CLK_M1      11
0022 #define R8A73A4_CLK_M2      12
0023 #define R8A73A4_CLK_ZX      13
0024 #define R8A73A4_CLK_ZS      14
0025 #define R8A73A4_CLK_HP      15
0026
0027 /* MSTP2 */
0028 #define R8A73A4_CLK_DMAC    18
0029 #define R8A73A4_CLK_SCIFB3  17
0030 #define R8A73A4_CLK_SCIFB2  16
0031 #define R8A73A4_CLK_SCIFB1  7
0032 #define R8A73A4_CLK_SCIFB0  6
0033 #define R8A73A4_CLK_SCIFA0  4
0034 #define R8A73A4_CLK_SCIFA1  3
0035
0036 /* MSTP3 */
0037 #define R8A73A4_CLK_CMT1    29
0038 #define R8A73A4_CLK_IIC1    23
0039 #define R8A73A4_CLK_IIC0    18
0040 #define R8A73A4_CLK_IIC7    17
0041 #define R8A73A4_CLK_IIC6    16
0042 #define R8A73A4_CLK_MMCIF0  15
0043 #define R8A73A4_CLK_SDHI0   14
0044 #define R8A73A4_CLK_SDHI1   13
0045 #define R8A73A4_CLK_SDHI2   12
0046 #define R8A73A4_CLK_MMCIF1  5
0047 #define R8A73A4_CLK_IIC2    0
0048
0049 /* MSTP4 */
0050 #define R8A73A4_CLK_IIC3    11
0051 #define R8A73A4_CLK_IIC4    10
0052 #define R8A73A4_CLK_IIC5    9
0053 #define R8A73A4_CLK_INTC_SYS    8
0054 #define R8A73A4_CLK_IRQC    7
0055
0056 /* MSTP5 */
0057 #define R8A73A4_CLK_THERMAL 22
0058 #define R8A73A4_CLK_IIC8    15
0059
0060 #endif /* __DT_BINDINGS_CLOCK_R8A73A4_H__ */