dt-bindings/clock/r7s9210-cpg-mssr.h

0001 /* SPDX-License-Identifier: GPL-2.0
0002  *
0003  * Copyright (C) 2018 Renesas Electronics Corp.
0004  *
0005  */
0006
0007 #ifndef __DT_BINDINGS_CLOCK_R7S9210_CPG_MSSR_H__
0008 #define __DT_BINDINGS_CLOCK_R7S9210_CPG_MSSR_H__
0009
0010 #include <dt-bindings/clock/renesas-cpg-mssr.h>
0011
0012 /* R7S9210 CPG Core Clocks */
0013 #define R7S9210_CLK_I           0
0014 #define R7S9210_CLK_G           1
0015 #define R7S9210_CLK_B           2
0016 #define R7S9210_CLK_P1          3
0017 #define R7S9210_CLK_P1C         4
0018 #define R7S9210_CLK_P0          5
0019
0020 #endif /* __DT_BINDINGS_CLOCK_R7S9210_CPG_MSSR_H__ */