Back to home page

OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (c) 2020, Konrad Dybcio
0004  */
0005 
0006 #ifndef _DT_BINDINGS_CLK_MSM_MMCC_8994_H
0007 #define _DT_BINDINGS_CLK_MSM_MMCC_8994_H
0008 
0009 /* Clocks */
0010 #define MMPLL0_EARLY                    0
0011 #define MMPLL0_PLL                      1
0012 #define MMPLL1_EARLY                    2
0013 #define MMPLL1_PLL                      3
0014 #define MMPLL3_EARLY                    4
0015 #define MMPLL3_PLL                      5
0016 #define MMPLL4_EARLY                    6
0017 #define MMPLL4_PLL                      7
0018 #define MMPLL5_EARLY                    8
0019 #define MMPLL5_PLL                      9
0020 #define AXI_CLK_SRC                     10
0021 #define RBBMTIMER_CLK_SRC               11
0022 #define PCLK0_CLK_SRC                   12
0023 #define PCLK1_CLK_SRC                   13
0024 #define MDP_CLK_SRC                     14
0025 #define VSYNC_CLK_SRC                   15
0026 #define BYTE0_CLK_SRC                   16
0027 #define BYTE1_CLK_SRC                   17
0028 #define ESC0_CLK_SRC                    18
0029 #define ESC1_CLK_SRC                    19
0030 #define MDSS_AHB_CLK                    20
0031 #define MDSS_PCLK0_CLK                  21
0032 #define MDSS_PCLK1_CLK                  22
0033 #define MDSS_VSYNC_CLK                  23
0034 #define MDSS_BYTE0_CLK                  24
0035 #define MDSS_BYTE1_CLK                  25
0036 #define MDSS_ESC0_CLK                   26
0037 #define MDSS_ESC1_CLK                   27
0038 #define CSI0_CLK_SRC                    28
0039 #define CSI1_CLK_SRC                    29
0040 #define CSI2_CLK_SRC                    30
0041 #define CSI3_CLK_SRC                    31
0042 #define VFE0_CLK_SRC                    32
0043 #define VFE1_CLK_SRC                    33
0044 #define CPP_CLK_SRC                     34
0045 #define JPEG0_CLK_SRC                   35
0046 #define JPEG1_CLK_SRC                   36
0047 #define JPEG2_CLK_SRC                   37
0048 #define CSI2PHYTIMER_CLK_SRC            38
0049 #define FD_CORE_CLK_SRC                 39
0050 #define OCMEMNOC_CLK_SRC                40
0051 #define CCI_CLK_SRC                     41
0052 #define MMSS_GP0_CLK_SRC                42
0053 #define MMSS_GP1_CLK_SRC                43
0054 #define JPEG_DMA_CLK_SRC                44
0055 #define MCLK0_CLK_SRC                   45
0056 #define MCLK1_CLK_SRC                   46
0057 #define MCLK2_CLK_SRC                   47
0058 #define MCLK3_CLK_SRC                   48
0059 #define CSI0PHYTIMER_CLK_SRC            49
0060 #define CSI1PHYTIMER_CLK_SRC            50
0061 #define EXTPCLK_CLK_SRC                 51
0062 #define HDMI_CLK_SRC                    52
0063 #define CAMSS_AHB_CLK                   53
0064 #define CAMSS_CCI_CCI_AHB_CLK           54
0065 #define CAMSS_CCI_CCI_CLK               55
0066 #define CAMSS_VFE_CPP_AHB_CLK           56
0067 #define CAMSS_VFE_CPP_AXI_CLK           57
0068 #define CAMSS_VFE_CPP_CLK               58
0069 #define CAMSS_CSI0_AHB_CLK              59
0070 #define CAMSS_CSI0_CLK                  60
0071 #define CAMSS_CSI0PHY_CLK               61
0072 #define CAMSS_CSI0PIX_CLK               62
0073 #define CAMSS_CSI0RDI_CLK               63
0074 #define CAMSS_CSI1_AHB_CLK              64
0075 #define CAMSS_CSI1_CLK                  65
0076 #define CAMSS_CSI1PHY_CLK               66
0077 #define CAMSS_CSI1PIX_CLK               67
0078 #define CAMSS_CSI1RDI_CLK               68
0079 #define CAMSS_CSI2_AHB_CLK              69
0080 #define CAMSS_CSI2_CLK                  70
0081 #define CAMSS_CSI2PHY_CLK               71
0082 #define CAMSS_CSI2PIX_CLK               72
0083 #define CAMSS_CSI2RDI_CLK               73
0084 #define CAMSS_CSI3_AHB_CLK              74
0085 #define CAMSS_CSI3_CLK                  75
0086 #define CAMSS_CSI3PHY_CLK               76
0087 #define CAMSS_CSI3PIX_CLK               77
0088 #define CAMSS_CSI3RDI_CLK               78
0089 #define CAMSS_CSI_VFE0_CLK              79
0090 #define CAMSS_CSI_VFE1_CLK              80
0091 #define CAMSS_GP0_CLK                   81
0092 #define CAMSS_GP1_CLK                   82
0093 #define CAMSS_ISPIF_AHB_CLK             83
0094 #define CAMSS_JPEG_DMA_CLK              84
0095 #define CAMSS_JPEG_JPEG0_CLK            85
0096 #define CAMSS_JPEG_JPEG1_CLK            86
0097 #define CAMSS_JPEG_JPEG2_CLK            87
0098 #define CAMSS_JPEG_JPEG_AHB_CLK         88
0099 #define CAMSS_JPEG_JPEG_AXI_CLK         89
0100 #define CAMSS_MCLK0_CLK                 90
0101 #define CAMSS_MCLK1_CLK                 91
0102 #define CAMSS_MCLK2_CLK                 92
0103 #define CAMSS_MCLK3_CLK                 93
0104 #define CAMSS_MICRO_AHB_CLK             94
0105 #define CAMSS_PHY0_CSI0PHYTIMER_CLK     95
0106 #define CAMSS_PHY1_CSI1PHYTIMER_CLK     96
0107 #define CAMSS_PHY2_CSI2PHYTIMER_CLK     97
0108 #define CAMSS_TOP_AHB_CLK               98
0109 #define CAMSS_VFE_VFE0_CLK              99
0110 #define CAMSS_VFE_VFE1_CLK              100
0111 #define CAMSS_VFE_VFE_AHB_CLK           101
0112 #define CAMSS_VFE_VFE_AXI_CLK           102
0113 #define FD_AXI_CLK                      103
0114 #define FD_CORE_CLK                     104
0115 #define FD_CORE_UAR_CLK                 105
0116 #define MDSS_AXI_CLK                    106
0117 #define MDSS_EXTPCLK_CLK                107
0118 #define MDSS_HDMI_AHB_CLK               108
0119 #define MDSS_HDMI_CLK                   109
0120 #define MDSS_MDP_CLK                    110
0121 #define MMSS_MISC_AHB_CLK               111
0122 #define MMSS_MMSSNOC_AXI_CLK            112
0123 #define MMSS_S0_AXI_CLK                 113
0124 #define OCMEMCX_OCMEMNOC_CLK            114
0125 #define OXILI_GFX3D_CLK                 115
0126 #define OXILI_RBBMTIMER_CLK             116
0127 #define OXILICX_AHB_CLK                 117
0128 #define VENUS0_AHB_CLK                  118
0129 #define VENUS0_AXI_CLK                  119
0130 #define VENUS0_OCMEMNOC_CLK             120
0131 #define VENUS0_VCODEC0_CLK              121
0132 #define VENUS0_CORE0_VCODEC_CLK         122
0133 #define VENUS0_CORE1_VCODEC_CLK         123
0134 #define VENUS0_CORE2_VCODEC_CLK         124
0135 #define AHB_CLK_SRC                     125
0136 #define FD_AHB_CLK                      126
0137 
0138 /* GDSCs */
0139 #define VENUS_GDSC                      0
0140 #define VENUS_CORE0_GDSC                1
0141 #define VENUS_CORE1_GDSC                2
0142 #define VENUS_CORE2_GDSC                3
0143 #define CAMSS_TOP_GDSC                  4
0144 #define MDSS_GDSC                       5
0145 #define JPEG_GDSC                       6
0146 #define VFE_GDSC                        7
0147 #define CPP_GDSC                        8
0148 #define OXILI_GX_GDSC                   9
0149 #define OXILI_CX_GDSC                   10
0150 #define FD_GDSC                         11
0151 
0152 /* Resets */
0153 #define CAMSS_MICRO_BCR                 0
0154 
0155 #endif