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0008 #ifndef _DT_BINDINGS_CLK_LCC_MDM9615_H
0009 #define _DT_BINDINGS_CLK_LCC_MDM9615_H
0010
0011 #define PLL4 0
0012 #define MI2S_OSR_SRC 1
0013 #define MI2S_OSR_CLK 2
0014 #define MI2S_DIV_CLK 3
0015 #define MI2S_BIT_DIV_CLK 4
0016 #define MI2S_BIT_CLK 5
0017 #define PCM_SRC 6
0018 #define PCM_CLK_OUT 7
0019 #define PCM_CLK 8
0020 #define SLIMBUS_SRC 9
0021 #define AUDIO_SLIMBUS_CLK 10
0022 #define SPS_SLIMBUS_CLK 11
0023 #define CODEC_I2S_MIC_OSR_SRC 12
0024 #define CODEC_I2S_MIC_OSR_CLK 13
0025 #define CODEC_I2S_MIC_DIV_CLK 14
0026 #define CODEC_I2S_MIC_BIT_DIV_CLK 15
0027 #define CODEC_I2S_MIC_BIT_CLK 16
0028 #define SPARE_I2S_MIC_OSR_SRC 17
0029 #define SPARE_I2S_MIC_OSR_CLK 18
0030 #define SPARE_I2S_MIC_DIV_CLK 19
0031 #define SPARE_I2S_MIC_BIT_DIV_CLK 20
0032 #define SPARE_I2S_MIC_BIT_CLK 21
0033 #define CODEC_I2S_SPKR_OSR_SRC 22
0034 #define CODEC_I2S_SPKR_OSR_CLK 23
0035 #define CODEC_I2S_SPKR_DIV_CLK 24
0036 #define CODEC_I2S_SPKR_BIT_DIV_CLK 25
0037 #define CODEC_I2S_SPKR_BIT_CLK 26
0038 #define SPARE_I2S_SPKR_OSR_SRC 27
0039 #define SPARE_I2S_SPKR_OSR_CLK 28
0040 #define SPARE_I2S_SPKR_DIV_CLK 29
0041 #define SPARE_I2S_SPKR_BIT_DIV_CLK 30
0042 #define SPARE_I2S_SPKR_BIT_CLK 31
0043
0044 #endif