0001
0002
0003
0004
0005
0006 #ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SC7280_H
0007 #define _DT_BINDINGS_CLK_QCOM_GPU_CC_SC7280_H
0008
0009
0010 #define GPU_CC_PLL0 0
0011 #define GPU_CC_PLL1 1
0012 #define GPU_CC_AHB_CLK 2
0013 #define GPU_CC_CB_CLK 3
0014 #define GPU_CC_CRC_AHB_CLK 4
0015 #define GPU_CC_CX_GMU_CLK 5
0016 #define GPU_CC_CX_SNOC_DVM_CLK 6
0017 #define GPU_CC_CXO_AON_CLK 7
0018 #define GPU_CC_CXO_CLK 8
0019 #define GPU_CC_GMU_CLK_SRC 9
0020 #define GPU_CC_GX_GMU_CLK 10
0021 #define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK 11
0022 #define GPU_CC_HUB_AHB_DIV_CLK_SRC 12
0023 #define GPU_CC_HUB_AON_CLK 13
0024 #define GPU_CC_HUB_CLK_SRC 14
0025 #define GPU_CC_HUB_CX_INT_CLK 15
0026 #define GPU_CC_HUB_CX_INT_DIV_CLK_SRC 16
0027 #define GPU_CC_MND1X_0_GFX3D_CLK 17
0028 #define GPU_CC_MND1X_1_GFX3D_CLK 18
0029 #define GPU_CC_SLEEP_CLK 19
0030
0031
0032 #define GPU_CC_CX_GDSC 0
0033 #define GPU_CC_GX_GDSC 1
0034
0035 #endif