dt-bindings/clock/qcom%2Ccamcc-sc7180.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (c) 2020, The Linux Foundation. All rights reserved.
0004  */
0005
0006 #ifndef _DT_BINDINGS_CLK_QCOM_CAM_CC_SC7180_H
0007 #define _DT_BINDINGS_CLK_QCOM_CAM_CC_SC7180_H
0008
0009 /* CAM_CC clocks */
0010 #define CAM_CC_PLL2_OUT_EARLY                   0
0011 #define CAM_CC_PLL0                     1
0012 #define CAM_CC_PLL1                     2
0013 #define CAM_CC_PLL2                     3
0014 #define CAM_CC_PLL2_OUT_AUX                 4
0015 #define CAM_CC_PLL3                     5
0016 #define CAM_CC_CAMNOC_AXI_CLK                   6
0017 #define CAM_CC_CCI_0_CLK                    7
0018 #define CAM_CC_CCI_0_CLK_SRC                    8
0019 #define CAM_CC_CCI_1_CLK                    9
0020 #define CAM_CC_CCI_1_CLK_SRC                    10
0021 #define CAM_CC_CORE_AHB_CLK                 11
0022 #define CAM_CC_CPAS_AHB_CLK                 12
0023 #define CAM_CC_CPHY_RX_CLK_SRC                  13
0024 #define CAM_CC_CSI0PHYTIMER_CLK                 14
0025 #define CAM_CC_CSI0PHYTIMER_CLK_SRC             15
0026 #define CAM_CC_CSI1PHYTIMER_CLK                 16
0027 #define CAM_CC_CSI1PHYTIMER_CLK_SRC             17
0028 #define CAM_CC_CSI2PHYTIMER_CLK                 18
0029 #define CAM_CC_CSI2PHYTIMER_CLK_SRC             19
0030 #define CAM_CC_CSI3PHYTIMER_CLK                 20
0031 #define CAM_CC_CSI3PHYTIMER_CLK_SRC             21
0032 #define CAM_CC_CSIPHY0_CLK                  22
0033 #define CAM_CC_CSIPHY1_CLK                  23
0034 #define CAM_CC_CSIPHY2_CLK                  24
0035 #define CAM_CC_CSIPHY3_CLK                  25
0036 #define CAM_CC_FAST_AHB_CLK_SRC                 26
0037 #define CAM_CC_ICP_APB_CLK                  27
0038 #define CAM_CC_ICP_ATB_CLK                  28
0039 #define CAM_CC_ICP_CLK                      29
0040 #define CAM_CC_ICP_CLK_SRC                  30
0041 #define CAM_CC_ICP_CTI_CLK                  31
0042 #define CAM_CC_ICP_TS_CLK                   32
0043 #define CAM_CC_IFE_0_AXI_CLK                    33
0044 #define CAM_CC_IFE_0_CLK                    34
0045 #define CAM_CC_IFE_0_CLK_SRC                    35
0046 #define CAM_CC_IFE_0_CPHY_RX_CLK                36
0047 #define CAM_CC_IFE_0_CSID_CLK                   37
0048 #define CAM_CC_IFE_0_CSID_CLK_SRC               38
0049 #define CAM_CC_IFE_0_DSP_CLK                    39
0050 #define CAM_CC_IFE_1_AXI_CLK                    40
0051 #define CAM_CC_IFE_1_CLK                    41
0052 #define CAM_CC_IFE_1_CLK_SRC                    42
0053 #define CAM_CC_IFE_1_CPHY_RX_CLK                43
0054 #define CAM_CC_IFE_1_CSID_CLK                   44
0055 #define CAM_CC_IFE_1_CSID_CLK_SRC               45
0056 #define CAM_CC_IFE_1_DSP_CLK                    46
0057 #define CAM_CC_IFE_LITE_CLK                 47
0058 #define CAM_CC_IFE_LITE_CLK_SRC                 48
0059 #define CAM_CC_IFE_LITE_CPHY_RX_CLK             49
0060 #define CAM_CC_IFE_LITE_CSID_CLK                50
0061 #define CAM_CC_IFE_LITE_CSID_CLK_SRC                51
0062 #define CAM_CC_IPE_0_AHB_CLK                    52
0063 #define CAM_CC_IPE_0_AREG_CLK                   53
0064 #define CAM_CC_IPE_0_AXI_CLK                    54
0065 #define CAM_CC_IPE_0_CLK                    55
0066 #define CAM_CC_IPE_0_CLK_SRC                    56
0067 #define CAM_CC_JPEG_CLK                     57
0068 #define CAM_CC_JPEG_CLK_SRC                 58
0069 #define CAM_CC_LRME_CLK                     59
0070 #define CAM_CC_LRME_CLK_SRC                 60
0071 #define CAM_CC_MCLK0_CLK                    61
0072 #define CAM_CC_MCLK0_CLK_SRC                    62
0073 #define CAM_CC_MCLK1_CLK                    63
0074 #define CAM_CC_MCLK1_CLK_SRC                    64
0075 #define CAM_CC_MCLK2_CLK                    65
0076 #define CAM_CC_MCLK2_CLK_SRC                    66
0077 #define CAM_CC_MCLK3_CLK                    67
0078 #define CAM_CC_MCLK3_CLK_SRC                    68
0079 #define CAM_CC_MCLK4_CLK                    69
0080 #define CAM_CC_MCLK4_CLK_SRC                    70
0081 #define CAM_CC_BPS_AHB_CLK                  71
0082 #define CAM_CC_BPS_AREG_CLK                 72
0083 #define CAM_CC_BPS_AXI_CLK                  73
0084 #define CAM_CC_BPS_CLK                      74
0085 #define CAM_CC_BPS_CLK_SRC                  75
0086 #define CAM_CC_SLOW_AHB_CLK_SRC                 76
0087 #define CAM_CC_SOC_AHB_CLK                  77
0088 #define CAM_CC_SYS_TMR_CLK                  78
0089
0090 /* CAM_CC power domains */
0091 #define BPS_GDSC                        0
0092 #define IFE_0_GDSC                      1
0093 #define IFE_1_GDSC                      2
0094 #define IPE_0_GDSC                      3
0095 #define TITAN_TOP_GDSC                      4
0096
0097 /* CAM_CC resets */
0098 #define CAM_CC_BPS_BCR                      0
0099 #define CAM_CC_CAMNOC_BCR                   1
0100 #define CAM_CC_CCI_0_BCR                    2
0101 #define CAM_CC_CCI_1_BCR                    3
0102 #define CAM_CC_CPAS_BCR                     4
0103 #define CAM_CC_CSI0PHY_BCR                  5
0104 #define CAM_CC_CSI1PHY_BCR                  6
0105 #define CAM_CC_CSI2PHY_BCR                  7
0106 #define CAM_CC_CSI3PHY_BCR                  8
0107 #define CAM_CC_ICP_BCR                      9
0108 #define CAM_CC_IFE_0_BCR                    10
0109 #define CAM_CC_IFE_1_BCR                    11
0110 #define CAM_CC_IFE_LITE_BCR                 12
0111 #define CAM_CC_IPE_0_BCR                    13
0112 #define CAM_CC_JPEG_BCR                     14
0113 #define CAM_CC_LRME_BCR                     15
0114 #define CAM_CC_MCLK0_BCR                    16
0115 #define CAM_CC_MCLK1_BCR                    17
0116 #define CAM_CC_MCLK2_BCR                    18
0117 #define CAM_CC_MCLK3_BCR                    19
0118 #define CAM_CC_MCLK4_BCR                    20
0119 #define CAM_CC_TITAN_TOP_BCR                    21
0120
0121 #endif