dt-bindings/clock/mt7621-clk.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Author: Sergio Paracuellos <sergio.paracuellos@gmail.com>
0004  */
0005
0006 #ifndef _DT_BINDINGS_CLK_MT7621_H
0007 #define _DT_BINDINGS_CLK_MT7621_H
0008
0009 #define MT7621_CLK_XTAL     0
0010 #define MT7621_CLK_CPU      1
0011 #define MT7621_CLK_BUS      2
0012 #define MT7621_CLK_50M      3
0013 #define MT7621_CLK_125M     4
0014 #define MT7621_CLK_150M     5
0015 #define MT7621_CLK_250M     6
0016 #define MT7621_CLK_270M     7
0017
0018 #define MT7621_CLK_HSDMA    8
0019 #define MT7621_CLK_FE       9
0020 #define MT7621_CLK_SP_DIVTX 10
0021 #define MT7621_CLK_TIMER    11
0022 #define MT7621_CLK_PCM      12
0023 #define MT7621_CLK_PIO      13
0024 #define MT7621_CLK_GDMA     14
0025 #define MT7621_CLK_NAND     15
0026 #define MT7621_CLK_I2C      16
0027 #define MT7621_CLK_I2S      17
0028 #define MT7621_CLK_SPI      18
0029 #define MT7621_CLK_UART1    19
0030 #define MT7621_CLK_UART2    20
0031 #define MT7621_CLK_UART3    21
0032 #define MT7621_CLK_ETH      22
0033 #define MT7621_CLK_PCIE0    23
0034 #define MT7621_CLK_PCIE1    24
0035 #define MT7621_CLK_PCIE2    25
0036 #define MT7621_CLK_CRYPTO   26
0037 #define MT7621_CLK_SHXC     27
0038
0039 #define MT7621_CLK_MAX      28
0040
0041 #endif /* _DT_BINDINGS_CLK_MT7621_H */