0001
0002 #ifndef __DTS_MARVELL_PXA910_CLOCK_H
0003 #define __DTS_MARVELL_PXA910_CLOCK_H
0004
0005
0006 #define PXA910_CLK_CLK32 1
0007 #define PXA910_CLK_VCTCXO 2
0008 #define PXA910_CLK_PLL1 3
0009 #define PXA910_CLK_PLL1_2 8
0010 #define PXA910_CLK_PLL1_4 9
0011 #define PXA910_CLK_PLL1_8 10
0012 #define PXA910_CLK_PLL1_16 11
0013 #define PXA910_CLK_PLL1_6 12
0014 #define PXA910_CLK_PLL1_12 13
0015 #define PXA910_CLK_PLL1_24 14
0016 #define PXA910_CLK_PLL1_48 15
0017 #define PXA910_CLK_PLL1_96 16
0018 #define PXA910_CLK_PLL1_13 17
0019 #define PXA910_CLK_PLL1_13_1_5 18
0020 #define PXA910_CLK_PLL1_2_1_5 19
0021 #define PXA910_CLK_PLL1_3_16 20
0022 #define PXA910_CLK_PLL1_192 21
0023 #define PXA910_CLK_UART_PLL 27
0024 #define PXA910_CLK_USB_PLL 28
0025
0026
0027 #define PXA910_CLK_TWSI0 60
0028 #define PXA910_CLK_TWSI1 61
0029 #define PXA910_CLK_TWSI2 62
0030 #define PXA910_CLK_TWSI3 63
0031 #define PXA910_CLK_GPIO 64
0032 #define PXA910_CLK_KPC 65
0033 #define PXA910_CLK_RTC 66
0034 #define PXA910_CLK_PWM0 67
0035 #define PXA910_CLK_PWM1 68
0036 #define PXA910_CLK_PWM2 69
0037 #define PXA910_CLK_PWM3 70
0038 #define PXA910_CLK_UART0 71
0039 #define PXA910_CLK_UART1 72
0040 #define PXA910_CLK_UART2 73
0041 #define PXA910_CLK_SSP0 74
0042 #define PXA910_CLK_SSP1 75
0043 #define PXA910_CLK_TIMER0 76
0044 #define PXA910_CLK_TIMER1 77
0045
0046
0047 #define PXA910_CLK_DFC 100
0048 #define PXA910_CLK_SDH0 101
0049 #define PXA910_CLK_SDH1 102
0050 #define PXA910_CLK_SDH2 103
0051 #define PXA910_CLK_USB 104
0052 #define PXA910_CLK_SPH 105
0053 #define PXA910_CLK_DISP0 106
0054 #define PXA910_CLK_CCIC0 107
0055 #define PXA910_CLK_CCIC0_PHY 108
0056 #define PXA910_CLK_CCIC0_SPHY 109
0057
0058 #define PXA910_NR_CLKS 200
0059 #endif