dt-bindings/clock/marvell%2Cpxa1928.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef __DTS_MARVELL_PXA1928_CLOCK_H
0003 #define __DTS_MARVELL_PXA1928_CLOCK_H
0004
0005 /*
0006  * Clock ID values here correspond to the control register offset/4.
0007  */
0008
0009 /* apb peripherals */
0010 #define PXA1928_CLK_RTC         0x00
0011 #define PXA1928_CLK_TWSI0       0x01
0012 #define PXA1928_CLK_TWSI1       0x02
0013 #define PXA1928_CLK_TWSI2       0x03
0014 #define PXA1928_CLK_TWSI3       0x04
0015 #define PXA1928_CLK_OWIRE       0x05
0016 #define PXA1928_CLK_KPC         0x06
0017 #define PXA1928_CLK_TB_ROTARY       0x07
0018 #define PXA1928_CLK_SW_JTAG     0x08
0019 #define PXA1928_CLK_TIMER1      0x09
0020 #define PXA1928_CLK_UART0       0x0b
0021 #define PXA1928_CLK_UART1       0x0c
0022 #define PXA1928_CLK_UART2       0x0d
0023 #define PXA1928_CLK_GPIO        0x0e
0024 #define PXA1928_CLK_PWM0        0x0f
0025 #define PXA1928_CLK_PWM1        0x10
0026 #define PXA1928_CLK_PWM2        0x11
0027 #define PXA1928_CLK_PWM3        0x12
0028 #define PXA1928_CLK_SSP0        0x13
0029 #define PXA1928_CLK_SSP1        0x14
0030 #define PXA1928_CLK_SSP2        0x15
0031
0032 #define PXA1928_CLK_TWSI4       0x1f
0033 #define PXA1928_CLK_TWSI5       0x20
0034 #define PXA1928_CLK_UART3       0x22
0035 #define PXA1928_CLK_THSENS_GLOB     0x24
0036 #define PXA1928_CLK_THSENS_CPU      0x26
0037 #define PXA1928_CLK_THSENS_VPU      0x27
0038 #define PXA1928_CLK_THSENS_GC       0x28
0039 #define PXA1928_APBC_NR_CLKS        0x30
0040
0041
0042 /* axi peripherals */
0043 #define PXA1928_CLK_SDH0        0x15
0044 #define PXA1928_CLK_SDH1        0x16
0045 #define PXA1928_CLK_USB         0x17
0046 #define PXA1928_CLK_NAND        0x18
0047 #define PXA1928_CLK_DMA         0x19
0048
0049 #define PXA1928_CLK_SDH2        0x3a
0050 #define PXA1928_CLK_SDH3        0x3b
0051 #define PXA1928_CLK_HSIC        0x3e
0052 #define PXA1928_CLK_SDH4        0x57
0053 #define PXA1928_CLK_GC3D        0x5d
0054 #define PXA1928_CLK_GC2D        0x5f
0055
0056 #define PXA1928_APMU_NR_CLKS        0x60
0057
0058 #endif