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0012 #ifndef __DT_BINDINGS_CLOCK_X1000_CGU_H__
0013 #define __DT_BINDINGS_CLOCK_X1000_CGU_H__
0014
0015 #define X1000_CLK_EXCLK 0
0016 #define X1000_CLK_RTCLK 1
0017 #define X1000_CLK_APLL 2
0018 #define X1000_CLK_MPLL 3
0019 #define X1000_CLK_OTGPHY 4
0020 #define X1000_CLK_SCLKA 5
0021 #define X1000_CLK_CPUMUX 6
0022 #define X1000_CLK_CPU 7
0023 #define X1000_CLK_L2CACHE 8
0024 #define X1000_CLK_AHB0 9
0025 #define X1000_CLK_AHB2PMUX 10
0026 #define X1000_CLK_AHB2 11
0027 #define X1000_CLK_PCLK 12
0028 #define X1000_CLK_DDR 13
0029 #define X1000_CLK_MAC 14
0030 #define X1000_CLK_LCD 15
0031 #define X1000_CLK_MSCMUX 16
0032 #define X1000_CLK_MSC0 17
0033 #define X1000_CLK_MSC1 18
0034 #define X1000_CLK_OTG 19
0035 #define X1000_CLK_SSIPLL 20
0036 #define X1000_CLK_SSIPLL_DIV2 21
0037 #define X1000_CLK_SSIMUX 22
0038 #define X1000_CLK_EMC 23
0039 #define X1000_CLK_EFUSE 24
0040 #define X1000_CLK_SFC 25
0041 #define X1000_CLK_I2C0 26
0042 #define X1000_CLK_I2C1 27
0043 #define X1000_CLK_I2C2 28
0044 #define X1000_CLK_UART0 29
0045 #define X1000_CLK_UART1 30
0046 #define X1000_CLK_UART2 31
0047 #define X1000_CLK_TCU 32
0048 #define X1000_CLK_SSI 33
0049 #define X1000_CLK_OST 34
0050 #define X1000_CLK_PDMA 35
0051 #define X1000_CLK_EXCLK_DIV512 36
0052 #define X1000_CLK_RTC 37
0053
0054 #endif