dt-bindings/clock/histb-clock.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Copyright (c) 2016 HiSilicon Technologies Co., Ltd.
0004  */
0005
0006 #ifndef __DTS_HISTB_CLOCK_H
0007 #define __DTS_HISTB_CLOCK_H
0008
0009 /* clocks provided by core CRG */
0010 #define HISTB_OSC_CLK           0
0011 #define HISTB_APB_CLK           1
0012 #define HISTB_AHB_CLK           2
0013 #define HISTB_UART1_CLK         3
0014 #define HISTB_UART2_CLK         4
0015 #define HISTB_UART3_CLK         5
0016 #define HISTB_I2C0_CLK          6
0017 #define HISTB_I2C1_CLK          7
0018 #define HISTB_I2C2_CLK          8
0019 #define HISTB_I2C3_CLK          9
0020 #define HISTB_I2C4_CLK          10
0021 #define HISTB_I2C5_CLK          11
0022 #define HISTB_SPI0_CLK          12
0023 #define HISTB_SPI1_CLK          13
0024 #define HISTB_SPI2_CLK          14
0025 #define HISTB_SCI_CLK           15
0026 #define HISTB_FMC_CLK           16
0027 #define HISTB_MMC_BIU_CLK       17
0028 #define HISTB_MMC_CIU_CLK       18
0029 #define HISTB_MMC_DRV_CLK       19
0030 #define HISTB_MMC_SAMPLE_CLK        20
0031 #define HISTB_SDIO0_BIU_CLK     21
0032 #define HISTB_SDIO0_CIU_CLK     22
0033 #define HISTB_SDIO0_DRV_CLK     23
0034 #define HISTB_SDIO0_SAMPLE_CLK      24
0035 #define HISTB_PCIE_AUX_CLK      25
0036 #define HISTB_PCIE_PIPE_CLK     26
0037 #define HISTB_PCIE_SYS_CLK      27
0038 #define HISTB_PCIE_BUS_CLK      28
0039 #define HISTB_ETH0_MAC_CLK      29
0040 #define HISTB_ETH0_MACIF_CLK        30
0041 #define HISTB_ETH1_MAC_CLK      31
0042 #define HISTB_ETH1_MACIF_CLK        32
0043 #define HISTB_COMBPHY1_CLK      33
0044 #define HISTB_USB2_BUS_CLK      34
0045 #define HISTB_USB2_PHY_CLK      35
0046 #define HISTB_USB2_UTMI_CLK     36
0047 #define HISTB_USB2_12M_CLK      37
0048 #define HISTB_USB2_48M_CLK      38
0049 #define HISTB_USB2_OTG_UTMI_CLK     39
0050 #define HISTB_USB2_PHY1_REF_CLK     40
0051 #define HISTB_USB2_PHY2_REF_CLK     41
0052 #define HISTB_COMBPHY0_CLK      42
0053 #define HISTB_USB3_BUS_CLK      43
0054 #define HISTB_USB3_UTMI_CLK     44
0055 #define HISTB_USB3_PIPE_CLK     45
0056 #define HISTB_USB3_SUSPEND_CLK      46
0057 #define HISTB_USB3_BUS_CLK1     47
0058 #define HISTB_USB3_UTMI_CLK1        48
0059 #define HISTB_USB3_PIPE_CLK1        49
0060 #define HISTB_USB3_SUSPEND_CLK1     50
0061
0062 /* clocks provided by mcu CRG */
0063 #define HISTB_MCE_CLK           1
0064 #define HISTB_IR_CLK            2
0065 #define HISTB_TIMER01_CLK       3
0066 #define HISTB_LEDC_CLK          4
0067 #define HISTB_UART0_CLK         5
0068 #define HISTB_LSADC_CLK         6
0069
0070 #endif  /* __DTS_HISTB_CLOCK_H */