dt-bindings/clock/exynos-audss-clk.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * This header provides constants for Samsung audio subsystem
0004  * clock controller.
0005  *
0006  * The constants defined in this header are being used in dts
0007  * and exynos audss driver.
0008  */
0009
0010 #ifndef _DT_BINDINGS_CLK_EXYNOS_AUDSS_H
0011 #define _DT_BINDINGS_CLK_EXYNOS_AUDSS_H
0012
0013 #define EXYNOS_MOUT_AUDSS   0
0014 #define EXYNOS_MOUT_I2S 1
0015 #define EXYNOS_DOUT_SRP 2
0016 #define EXYNOS_DOUT_AUD_BUS 3
0017 #define EXYNOS_DOUT_I2S 4
0018 #define EXYNOS_SRP_CLK      5
0019 #define EXYNOS_I2S_BUS      6
0020 #define EXYNOS_SCLK_I2S 7
0021 #define EXYNOS_PCM_BUS      8
0022 #define EXYNOS_SCLK_PCM 9
0023 #define EXYNOS_ADMA     10
0024
0025 #define EXYNOS_AUDSS_MAX_CLKS   11
0026
0027 #endif