dt-bindings/clock/bcm6318-clock.h

0001 /* SPDX-License-Identifier: GPL-2.0+ */
0002
0003 #ifndef __DT_BINDINGS_CLOCK_BCM6318_H
0004 #define __DT_BINDINGS_CLOCK_BCM6318_H
0005
0006 #define BCM6318_CLK_ADSL_ASB    0
0007 #define BCM6318_CLK_USB_ASB 1
0008 #define BCM6318_CLK_MIPS_ASB    2
0009 #define BCM6318_CLK_PCIE_ASB    3
0010 #define BCM6318_CLK_PHYMIPS_ASB 4
0011 #define BCM6318_CLK_ROBOSW_ASB  5
0012 #define BCM6318_CLK_SAR_ASB 6
0013 #define BCM6318_CLK_SDR_ASB 7
0014 #define BCM6318_CLK_SWREG_ASB   8
0015 #define BCM6318_CLK_PERIPH_ASB  9
0016 #define BCM6318_CLK_CPUBUS160   10
0017 #define BCM6318_CLK_ADSL    11
0018 #define BCM6318_CLK_SAR125  12
0019 #define BCM6318_CLK_MIPS    13
0020 #define BCM6318_CLK_PCIE    14
0021 #define BCM6318_CLK_ROBOSW250   16
0022 #define BCM6318_CLK_ROBOSW025   17
0023 #define BCM6318_CLK_SDR     19
0024 #define BCM6318_CLK_USBD    20
0025 #define BCM6318_CLK_HSSPI   25
0026 #define BCM6318_CLK_PCIE25  27
0027 #define BCM6318_CLK_PHYMIPS 28
0028 #define BCM6318_CLK_AFE     29
0029 #define BCM6318_CLK_QPROC   30
0030
0031 #define BCM6318_UCLK_ADSL   0
0032 #define BCM6318_UCLK_ARB    1
0033 #define BCM6318_UCLK_MIPS   2
0034 #define BCM6318_UCLK_PCIE   3
0035 #define BCM6318_UCLK_PERIPH 4
0036 #define BCM6318_UCLK_PHYMIPS    5
0037 #define BCM6318_UCLK_ROBOSW 6
0038 #define BCM6318_UCLK_SAR    7
0039 #define BCM6318_UCLK_SDR    8
0040 #define BCM6318_UCLK_USB    9
0041
0042 #endif /* __DT_BINDINGS_CLOCK_BCM6318_H */