dt-bindings/clock/bcm-cygnus.h

0001 /*
0002  *  BSD LICENSE
0003  *
0004  *  Copyright(c) 2014 Broadcom Corporation.  All rights reserved.
0005  *
0006  *  Redistribution and use in source and binary forms, with or without
0007  *  modification, are permitted provided that the following conditions
0008  *  are met:
0009  *
0010  *    * Redistributions of source code must retain the above copyright
0011  *      notice, this list of conditions and the following disclaimer.
0012  *    * Redistributions in binary form must reproduce the above copyright
0013  *      notice, this list of conditions and the following disclaimer in
0014  *      the documentation and/or other materials provided with the
0015  *      distribution.
0016  *    * Neither the name of Broadcom Corporation nor the names of its
0017  *      contributors may be used to endorse or promote products derived
0018  *      from this software without specific prior written permission.
0019  *
0020  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
0021  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
0022  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
0023  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
0024  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
0025  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
0026  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
0027  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
0028  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0029  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
0030  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0031  */
0032
0033 #ifndef _CLOCK_BCM_CYGNUS_H
0034 #define _CLOCK_BCM_CYGNUS_H
0035
0036 /* GENPLL clock ID */
0037 #define BCM_CYGNUS_GENPLL                     0
0038 #define BCM_CYGNUS_GENPLL_AXI21_CLK           1
0039 #define BCM_CYGNUS_GENPLL_250MHZ_CLK          2
0040 #define BCM_CYGNUS_GENPLL_IHOST_SYS_CLK       3
0041 #define BCM_CYGNUS_GENPLL_ENET_SW_CLK         4
0042 #define BCM_CYGNUS_GENPLL_AUDIO_125_CLK       5
0043 #define BCM_CYGNUS_GENPLL_CAN_CLK             6
0044
0045 /* LCPLL0 clock ID */
0046 #define BCM_CYGNUS_LCPLL0                     0
0047 #define BCM_CYGNUS_LCPLL0_PCIE_PHY_REF_CLK    1
0048 #define BCM_CYGNUS_LCPLL0_DDR_PHY_CLK         2
0049 #define BCM_CYGNUS_LCPLL0_SDIO_CLK            3
0050 #define BCM_CYGNUS_LCPLL0_USB_PHY_REF_CLK     4
0051 #define BCM_CYGNUS_LCPLL0_SMART_CARD_CLK      5
0052 #define BCM_CYGNUS_LCPLL0_CH5_UNUSED          6
0053
0054 /* MIPI PLL clock ID */
0055 #define BCM_CYGNUS_MIPIPLL                    0
0056 #define BCM_CYGNUS_MIPIPLL_CH0_UNUSED         1
0057 #define BCM_CYGNUS_MIPIPLL_CH1_LCD            2
0058 #define BCM_CYGNUS_MIPIPLL_CH2_V3D            3
0059 #define BCM_CYGNUS_MIPIPLL_CH3_UNUSED         4
0060 #define BCM_CYGNUS_MIPIPLL_CH4_UNUSED         5
0061 #define BCM_CYGNUS_MIPIPLL_CH5_UNUSED         6
0062
0063 /* ASIU clock ID */
0064 #define BCM_CYGNUS_ASIU_KEYPAD_CLK    0
0065 #define BCM_CYGNUS_ASIU_ADC_CLK       1
0066 #define BCM_CYGNUS_ASIU_PWM_CLK       2
0067
0068 /* AUDIO clock ID */
0069 #define BCM_CYGNUS_AUDIOPLL           0
0070 #define BCM_CYGNUS_AUDIOPLL_CH0       1
0071 #define BCM_CYGNUS_AUDIOPLL_CH1       2
0072 #define BCM_CYGNUS_AUDIOPLL_CH2       3
0073
0074 #endif /* _CLOCK_BCM_CYGNUS_H */