0001
0002
0003
0004 #ifndef _DRM_INTEL_GTT_H
0005 #define _DRM_INTEL_GTT_H
0006
0007 #include <linux/types.h>
0008
0009 struct agp_bridge_data;
0010 struct pci_dev;
0011 struct sg_table;
0012
0013 void intel_gmch_gtt_get(u64 *gtt_total,
0014 phys_addr_t *mappable_base,
0015 resource_size_t *mappable_end);
0016
0017 int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
0018 struct agp_bridge_data *bridge);
0019 void intel_gmch_remove(void);
0020
0021 bool intel_gmch_enable_gtt(void);
0022
0023 void intel_gmch_gtt_flush(void);
0024 void intel_gmch_gtt_insert_page(dma_addr_t addr,
0025 unsigned int pg,
0026 unsigned int flags);
0027 void intel_gmch_gtt_insert_sg_entries(struct sg_table *st,
0028 unsigned int pg_start,
0029 unsigned int flags);
0030 void intel_gmch_gtt_clear_range(unsigned int first_entry, unsigned int num_entries);
0031
0032
0033 #define AGP_DCACHE_MEMORY 1
0034 #define AGP_PHYS_MEMORY 2
0035
0036
0037 #define AGP_USER_CACHED_MEMORY_GFDT (1 << 3)
0038
0039 #endif