0001
0002
0003
0004
0005
0006 #ifndef XILINX_TIMER_H
0007 #define XILINX_TIMER_H
0008
0009 #include <linux/compiler.h>
0010
0011 #define TCSR0 0x00
0012 #define TLR0 0x04
0013 #define TCR0 0x08
0014 #define TCSR1 0x10
0015 #define TLR1 0x14
0016 #define TCR1 0x18
0017
0018 #define TCSR_MDT BIT(0)
0019 #define TCSR_UDT BIT(1)
0020 #define TCSR_GENT BIT(2)
0021 #define TCSR_CAPT BIT(3)
0022 #define TCSR_ARHT BIT(4)
0023 #define TCSR_LOAD BIT(5)
0024 #define TCSR_ENIT BIT(6)
0025 #define TCSR_ENT BIT(7)
0026 #define TCSR_TINT BIT(8)
0027 #define TCSR_PWMA BIT(9)
0028 #define TCSR_ENALL BIT(10)
0029 #define TCSR_CASC BIT(11)
0030
0031 struct clk;
0032 struct device_node;
0033 struct regmap;
0034
0035
0036
0037
0038
0039
0040
0041 struct xilinx_timer_priv {
0042 struct regmap *map;
0043 struct clk *clk;
0044 u32 max;
0045 };
0046
0047
0048
0049
0050
0051
0052
0053
0054
0055
0056
0057
0058
0059 u32 xilinx_timer_tlr_cycles(struct xilinx_timer_priv *priv, u32 tcsr,
0060 u64 cycles);
0061
0062
0063
0064
0065
0066
0067
0068
0069
0070 unsigned int xilinx_timer_get_period(struct xilinx_timer_priv *priv,
0071 u32 tlr, u32 tcsr);
0072
0073 #endif