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0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /* include/asm-generic/tlb.h
0003  *
0004  *  Generic TLB shootdown code
0005  *
0006  * Copyright 2001 Red Hat, Inc.
0007  * Based on code from mm/memory.c Copyright Linus Torvalds and others.
0008  *
0009  * Copyright 2011 Red Hat, Inc., Peter Zijlstra
0010  */
0011 #ifndef _ASM_GENERIC__TLB_H
0012 #define _ASM_GENERIC__TLB_H
0013 
0014 #include <linux/mmu_notifier.h>
0015 #include <linux/swap.h>
0016 #include <linux/hugetlb_inline.h>
0017 #include <asm/tlbflush.h>
0018 #include <asm/cacheflush.h>
0019 
0020 /*
0021  * Blindly accessing user memory from NMI context can be dangerous
0022  * if we're in the middle of switching the current user task or switching
0023  * the loaded mm.
0024  */
0025 #ifndef nmi_uaccess_okay
0026 # define nmi_uaccess_okay() true
0027 #endif
0028 
0029 #ifdef CONFIG_MMU
0030 
0031 /*
0032  * Generic MMU-gather implementation.
0033  *
0034  * The mmu_gather data structure is used by the mm code to implement the
0035  * correct and efficient ordering of freeing pages and TLB invalidations.
0036  *
0037  * This correct ordering is:
0038  *
0039  *  1) unhook page
0040  *  2) TLB invalidate page
0041  *  3) free page
0042  *
0043  * That is, we must never free a page before we have ensured there are no live
0044  * translations left to it. Otherwise it might be possible to observe (or
0045  * worse, change) the page content after it has been reused.
0046  *
0047  * The mmu_gather API consists of:
0048  *
0049  *  - tlb_gather_mmu() / tlb_gather_mmu_fullmm() / tlb_finish_mmu()
0050  *
0051  *    start and finish a mmu_gather
0052  *
0053  *    Finish in particular will issue a (final) TLB invalidate and free
0054  *    all (remaining) queued pages.
0055  *
0056  *  - tlb_start_vma() / tlb_end_vma(); marks the start / end of a VMA
0057  *
0058  *    Defaults to flushing at tlb_end_vma() to reset the range; helps when
0059  *    there's large holes between the VMAs.
0060  *
0061  *  - tlb_remove_table()
0062  *
0063  *    tlb_remove_table() is the basic primitive to free page-table directories
0064  *    (__p*_free_tlb()).  In it's most primitive form it is an alias for
0065  *    tlb_remove_page() below, for when page directories are pages and have no
0066  *    additional constraints.
0067  *
0068  *    See also MMU_GATHER_TABLE_FREE and MMU_GATHER_RCU_TABLE_FREE.
0069  *
0070  *  - tlb_remove_page() / __tlb_remove_page()
0071  *  - tlb_remove_page_size() / __tlb_remove_page_size()
0072  *
0073  *    __tlb_remove_page_size() is the basic primitive that queues a page for
0074  *    freeing. __tlb_remove_page() assumes PAGE_SIZE. Both will return a
0075  *    boolean indicating if the queue is (now) full and a call to
0076  *    tlb_flush_mmu() is required.
0077  *
0078  *    tlb_remove_page() and tlb_remove_page_size() imply the call to
0079  *    tlb_flush_mmu() when required and has no return value.
0080  *
0081  *  - tlb_change_page_size()
0082  *
0083  *    call before __tlb_remove_page*() to set the current page-size; implies a
0084  *    possible tlb_flush_mmu() call.
0085  *
0086  *  - tlb_flush_mmu() / tlb_flush_mmu_tlbonly()
0087  *
0088  *    tlb_flush_mmu_tlbonly() - does the TLB invalidate (and resets
0089  *                              related state, like the range)
0090  *
0091  *    tlb_flush_mmu() - in addition to the above TLB invalidate, also frees
0092  *          whatever pages are still batched.
0093  *
0094  *  - mmu_gather::fullmm
0095  *
0096  *    A flag set by tlb_gather_mmu_fullmm() to indicate we're going to free
0097  *    the entire mm; this allows a number of optimizations.
0098  *
0099  *    - We can ignore tlb_{start,end}_vma(); because we don't
0100  *      care about ranges. Everything will be shot down.
0101  *
0102  *    - (RISC) architectures that use ASIDs can cycle to a new ASID
0103  *      and delay the invalidation until ASID space runs out.
0104  *
0105  *  - mmu_gather::need_flush_all
0106  *
0107  *    A flag that can be set by the arch code if it wants to force
0108  *    flush the entire TLB irrespective of the range. For instance
0109  *    x86-PAE needs this when changing top-level entries.
0110  *
0111  * And allows the architecture to provide and implement tlb_flush():
0112  *
0113  * tlb_flush() may, in addition to the above mentioned mmu_gather fields, make
0114  * use of:
0115  *
0116  *  - mmu_gather::start / mmu_gather::end
0117  *
0118  *    which provides the range that needs to be flushed to cover the pages to
0119  *    be freed.
0120  *
0121  *  - mmu_gather::freed_tables
0122  *
0123  *    set when we freed page table pages
0124  *
0125  *  - tlb_get_unmap_shift() / tlb_get_unmap_size()
0126  *
0127  *    returns the smallest TLB entry size unmapped in this range.
0128  *
0129  * If an architecture does not provide tlb_flush() a default implementation
0130  * based on flush_tlb_range() will be used, unless MMU_GATHER_NO_RANGE is
0131  * specified, in which case we'll default to flush_tlb_mm().
0132  *
0133  * Additionally there are a few opt-in features:
0134  *
0135  *  MMU_GATHER_PAGE_SIZE
0136  *
0137  *  This ensures we call tlb_flush() every time tlb_change_page_size() actually
0138  *  changes the size and provides mmu_gather::page_size to tlb_flush().
0139  *
0140  *  This might be useful if your architecture has size specific TLB
0141  *  invalidation instructions.
0142  *
0143  *  MMU_GATHER_TABLE_FREE
0144  *
0145  *  This provides tlb_remove_table(), to be used instead of tlb_remove_page()
0146  *  for page directores (__p*_free_tlb()).
0147  *
0148  *  Useful if your architecture has non-page page directories.
0149  *
0150  *  When used, an architecture is expected to provide __tlb_remove_table()
0151  *  which does the actual freeing of these pages.
0152  *
0153  *  MMU_GATHER_RCU_TABLE_FREE
0154  *
0155  *  Like MMU_GATHER_TABLE_FREE, and adds semi-RCU semantics to the free (see
0156  *  comment below).
0157  *
0158  *  Useful if your architecture doesn't use IPIs for remote TLB invalidates
0159  *  and therefore doesn't naturally serialize with software page-table walkers.
0160  *
0161  *  MMU_GATHER_NO_FLUSH_CACHE
0162  *
0163  *  Indicates the architecture has flush_cache_range() but it needs *NOT* be called
0164  *  before unmapping a VMA.
0165  *
0166  *  NOTE: strictly speaking we shouldn't have this knob and instead rely on
0167  *    flush_cache_range() being a NOP, except Sparc64 seems to be
0168  *    different here.
0169  *
0170  *  MMU_GATHER_MERGE_VMAS
0171  *
0172  *  Indicates the architecture wants to merge ranges over VMAs; typical when
0173  *  multiple range invalidates are more expensive than a full invalidate.
0174  *
0175  *  MMU_GATHER_NO_RANGE
0176  *
0177  *  Use this if your architecture lacks an efficient flush_tlb_range(). This
0178  *  option implies MMU_GATHER_MERGE_VMAS above.
0179  *
0180  *  MMU_GATHER_NO_GATHER
0181  *
0182  *  If the option is set the mmu_gather will not track individual pages for
0183  *  delayed page free anymore. A platform that enables the option needs to
0184  *  provide its own implementation of the __tlb_remove_page_size() function to
0185  *  free pages.
0186  *
0187  *  This is useful if your architecture already flushes TLB entries in the
0188  *  various ptep_get_and_clear() functions.
0189  */
0190 
0191 #ifdef CONFIG_MMU_GATHER_TABLE_FREE
0192 
0193 struct mmu_table_batch {
0194 #ifdef CONFIG_MMU_GATHER_RCU_TABLE_FREE
0195     struct rcu_head     rcu;
0196 #endif
0197     unsigned int        nr;
0198     void            *tables[];
0199 };
0200 
0201 #define MAX_TABLE_BATCH     \
0202     ((PAGE_SIZE - sizeof(struct mmu_table_batch)) / sizeof(void *))
0203 
0204 extern void tlb_remove_table(struct mmu_gather *tlb, void *table);
0205 
0206 #else /* !CONFIG_MMU_GATHER_HAVE_TABLE_FREE */
0207 
0208 /*
0209  * Without MMU_GATHER_TABLE_FREE the architecture is assumed to have page based
0210  * page directories and we can use the normal page batching to free them.
0211  */
0212 #define tlb_remove_table(tlb, page) tlb_remove_page((tlb), (page))
0213 
0214 #endif /* CONFIG_MMU_GATHER_TABLE_FREE */
0215 
0216 #ifdef CONFIG_MMU_GATHER_RCU_TABLE_FREE
0217 /*
0218  * This allows an architecture that does not use the linux page-tables for
0219  * hardware to skip the TLBI when freeing page tables.
0220  */
0221 #ifndef tlb_needs_table_invalidate
0222 #define tlb_needs_table_invalidate() (true)
0223 #endif
0224 
0225 #else
0226 
0227 #ifdef tlb_needs_table_invalidate
0228 #error tlb_needs_table_invalidate() requires MMU_GATHER_RCU_TABLE_FREE
0229 #endif
0230 
0231 #endif /* CONFIG_MMU_GATHER_RCU_TABLE_FREE */
0232 
0233 
0234 #ifndef CONFIG_MMU_GATHER_NO_GATHER
0235 /*
0236  * If we can't allocate a page to make a big batch of page pointers
0237  * to work on, then just handle a few from the on-stack structure.
0238  */
0239 #define MMU_GATHER_BUNDLE   8
0240 
0241 struct mmu_gather_batch {
0242     struct mmu_gather_batch *next;
0243     unsigned int        nr;
0244     unsigned int        max;
0245     struct page     *pages[];
0246 };
0247 
0248 #define MAX_GATHER_BATCH    \
0249     ((PAGE_SIZE - sizeof(struct mmu_gather_batch)) / sizeof(void *))
0250 
0251 /*
0252  * Limit the maximum number of mmu_gather batches to reduce a risk of soft
0253  * lockups for non-preemptible kernels on huge machines when a lot of memory
0254  * is zapped during unmapping.
0255  * 10K pages freed at once should be safe even without a preemption point.
0256  */
0257 #define MAX_GATHER_BATCH_COUNT  (10000UL/MAX_GATHER_BATCH)
0258 
0259 extern bool __tlb_remove_page_size(struct mmu_gather *tlb, struct page *page,
0260                    int page_size);
0261 #endif
0262 
0263 /*
0264  * struct mmu_gather is an opaque type used by the mm code for passing around
0265  * any data needed by arch specific code for tlb_remove_page.
0266  */
0267 struct mmu_gather {
0268     struct mm_struct    *mm;
0269 
0270 #ifdef CONFIG_MMU_GATHER_TABLE_FREE
0271     struct mmu_table_batch  *batch;
0272 #endif
0273 
0274     unsigned long       start;
0275     unsigned long       end;
0276     /*
0277      * we are in the middle of an operation to clear
0278      * a full mm and can make some optimizations
0279      */
0280     unsigned int        fullmm : 1;
0281 
0282     /*
0283      * we have performed an operation which
0284      * requires a complete flush of the tlb
0285      */
0286     unsigned int        need_flush_all : 1;
0287 
0288     /*
0289      * we have removed page directories
0290      */
0291     unsigned int        freed_tables : 1;
0292 
0293     /*
0294      * at which levels have we cleared entries?
0295      */
0296     unsigned int        cleared_ptes : 1;
0297     unsigned int        cleared_pmds : 1;
0298     unsigned int        cleared_puds : 1;
0299     unsigned int        cleared_p4ds : 1;
0300 
0301     /*
0302      * tracks VM_EXEC | VM_HUGETLB in tlb_start_vma
0303      */
0304     unsigned int        vma_exec : 1;
0305     unsigned int        vma_huge : 1;
0306     unsigned int        vma_pfn  : 1;
0307 
0308     unsigned int        batch_count;
0309 
0310 #ifndef CONFIG_MMU_GATHER_NO_GATHER
0311     struct mmu_gather_batch *active;
0312     struct mmu_gather_batch local;
0313     struct page     *__pages[MMU_GATHER_BUNDLE];
0314 
0315 #ifdef CONFIG_MMU_GATHER_PAGE_SIZE
0316     unsigned int page_size;
0317 #endif
0318 #endif
0319 };
0320 
0321 void tlb_flush_mmu(struct mmu_gather *tlb);
0322 
0323 static inline void __tlb_adjust_range(struct mmu_gather *tlb,
0324                       unsigned long address,
0325                       unsigned int range_size)
0326 {
0327     tlb->start = min(tlb->start, address);
0328     tlb->end = max(tlb->end, address + range_size);
0329 }
0330 
0331 static inline void __tlb_reset_range(struct mmu_gather *tlb)
0332 {
0333     if (tlb->fullmm) {
0334         tlb->start = tlb->end = ~0;
0335     } else {
0336         tlb->start = TASK_SIZE;
0337         tlb->end = 0;
0338     }
0339     tlb->freed_tables = 0;
0340     tlb->cleared_ptes = 0;
0341     tlb->cleared_pmds = 0;
0342     tlb->cleared_puds = 0;
0343     tlb->cleared_p4ds = 0;
0344     /*
0345      * Do not reset mmu_gather::vma_* fields here, we do not
0346      * call into tlb_start_vma() again to set them if there is an
0347      * intermediate flush.
0348      */
0349 }
0350 
0351 #ifdef CONFIG_MMU_GATHER_NO_RANGE
0352 
0353 #if defined(tlb_flush)
0354 #error MMU_GATHER_NO_RANGE relies on default tlb_flush()
0355 #endif
0356 
0357 /*
0358  * When an architecture does not have efficient means of range flushing TLBs
0359  * there is no point in doing intermediate flushes on tlb_end_vma() to keep the
0360  * range small. We equally don't have to worry about page granularity or other
0361  * things.
0362  *
0363  * All we need to do is issue a full flush for any !0 range.
0364  */
0365 static inline void tlb_flush(struct mmu_gather *tlb)
0366 {
0367     if (tlb->end)
0368         flush_tlb_mm(tlb->mm);
0369 }
0370 
0371 #else /* CONFIG_MMU_GATHER_NO_RANGE */
0372 
0373 #ifndef tlb_flush
0374 /*
0375  * When an architecture does not provide its own tlb_flush() implementation
0376  * but does have a reasonably efficient flush_vma_range() implementation
0377  * use that.
0378  */
0379 static inline void tlb_flush(struct mmu_gather *tlb)
0380 {
0381     if (tlb->fullmm || tlb->need_flush_all) {
0382         flush_tlb_mm(tlb->mm);
0383     } else if (tlb->end) {
0384         struct vm_area_struct vma = {
0385             .vm_mm = tlb->mm,
0386             .vm_flags = (tlb->vma_exec ? VM_EXEC    : 0) |
0387                     (tlb->vma_huge ? VM_HUGETLB : 0),
0388         };
0389 
0390         flush_tlb_range(&vma, tlb->start, tlb->end);
0391     }
0392 }
0393 #endif
0394 
0395 #endif /* CONFIG_MMU_GATHER_NO_RANGE */
0396 
0397 static inline void
0398 tlb_update_vma_flags(struct mmu_gather *tlb, struct vm_area_struct *vma)
0399 {
0400     /*
0401      * flush_tlb_range() implementations that look at VM_HUGETLB (tile,
0402      * mips-4k) flush only large pages.
0403      *
0404      * flush_tlb_range() implementations that flush I-TLB also flush D-TLB
0405      * (tile, xtensa, arm), so it's ok to just add VM_EXEC to an existing
0406      * range.
0407      *
0408      * We rely on tlb_end_vma() to issue a flush, such that when we reset
0409      * these values the batch is empty.
0410      */
0411     tlb->vma_huge = is_vm_hugetlb_page(vma);
0412     tlb->vma_exec = !!(vma->vm_flags & VM_EXEC);
0413     tlb->vma_pfn  = !!(vma->vm_flags & (VM_PFNMAP|VM_MIXEDMAP));
0414 }
0415 
0416 static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb)
0417 {
0418     /*
0419      * Anything calling __tlb_adjust_range() also sets at least one of
0420      * these bits.
0421      */
0422     if (!(tlb->freed_tables || tlb->cleared_ptes || tlb->cleared_pmds ||
0423           tlb->cleared_puds || tlb->cleared_p4ds))
0424         return;
0425 
0426     tlb_flush(tlb);
0427     mmu_notifier_invalidate_range(tlb->mm, tlb->start, tlb->end);
0428     __tlb_reset_range(tlb);
0429 }
0430 
0431 static inline void tlb_remove_page_size(struct mmu_gather *tlb,
0432                     struct page *page, int page_size)
0433 {
0434     if (__tlb_remove_page_size(tlb, page, page_size))
0435         tlb_flush_mmu(tlb);
0436 }
0437 
0438 static inline bool __tlb_remove_page(struct mmu_gather *tlb, struct page *page)
0439 {
0440     return __tlb_remove_page_size(tlb, page, PAGE_SIZE);
0441 }
0442 
0443 /* tlb_remove_page
0444  *  Similar to __tlb_remove_page but will call tlb_flush_mmu() itself when
0445  *  required.
0446  */
0447 static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
0448 {
0449     return tlb_remove_page_size(tlb, page, PAGE_SIZE);
0450 }
0451 
0452 static inline void tlb_change_page_size(struct mmu_gather *tlb,
0453                              unsigned int page_size)
0454 {
0455 #ifdef CONFIG_MMU_GATHER_PAGE_SIZE
0456     if (tlb->page_size && tlb->page_size != page_size) {
0457         if (!tlb->fullmm && !tlb->need_flush_all)
0458             tlb_flush_mmu(tlb);
0459     }
0460 
0461     tlb->page_size = page_size;
0462 #endif
0463 }
0464 
0465 static inline unsigned long tlb_get_unmap_shift(struct mmu_gather *tlb)
0466 {
0467     if (tlb->cleared_ptes)
0468         return PAGE_SHIFT;
0469     if (tlb->cleared_pmds)
0470         return PMD_SHIFT;
0471     if (tlb->cleared_puds)
0472         return PUD_SHIFT;
0473     if (tlb->cleared_p4ds)
0474         return P4D_SHIFT;
0475 
0476     return PAGE_SHIFT;
0477 }
0478 
0479 static inline unsigned long tlb_get_unmap_size(struct mmu_gather *tlb)
0480 {
0481     return 1UL << tlb_get_unmap_shift(tlb);
0482 }
0483 
0484 /*
0485  * In the case of tlb vma handling, we can optimise these away in the
0486  * case where we're doing a full MM flush.  When we're doing a munmap,
0487  * the vmas are adjusted to only cover the region to be torn down.
0488  */
0489 static inline void tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
0490 {
0491     if (tlb->fullmm)
0492         return;
0493 
0494     tlb_update_vma_flags(tlb, vma);
0495 #ifndef CONFIG_MMU_GATHER_NO_FLUSH_CACHE
0496     flush_cache_range(vma, vma->vm_start, vma->vm_end);
0497 #endif
0498 }
0499 
0500 static inline void tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
0501 {
0502     if (tlb->fullmm)
0503         return;
0504 
0505     /*
0506      * VM_PFNMAP is more fragile because the core mm will not track the
0507      * page mapcount -- there might not be page-frames for these PFNs after
0508      * all. Force flush TLBs for such ranges to avoid munmap() vs
0509      * unmap_mapping_range() races.
0510      */
0511     if (tlb->vma_pfn || !IS_ENABLED(CONFIG_MMU_GATHER_MERGE_VMAS)) {
0512         /*
0513          * Do a TLB flush and reset the range at VMA boundaries; this avoids
0514          * the ranges growing with the unused space between consecutive VMAs.
0515          */
0516         tlb_flush_mmu_tlbonly(tlb);
0517     }
0518 }
0519 
0520 /*
0521  * tlb_flush_{pte|pmd|pud|p4d}_range() adjust the tlb->start and tlb->end,
0522  * and set corresponding cleared_*.
0523  */
0524 static inline void tlb_flush_pte_range(struct mmu_gather *tlb,
0525                      unsigned long address, unsigned long size)
0526 {
0527     __tlb_adjust_range(tlb, address, size);
0528     tlb->cleared_ptes = 1;
0529 }
0530 
0531 static inline void tlb_flush_pmd_range(struct mmu_gather *tlb,
0532                      unsigned long address, unsigned long size)
0533 {
0534     __tlb_adjust_range(tlb, address, size);
0535     tlb->cleared_pmds = 1;
0536 }
0537 
0538 static inline void tlb_flush_pud_range(struct mmu_gather *tlb,
0539                      unsigned long address, unsigned long size)
0540 {
0541     __tlb_adjust_range(tlb, address, size);
0542     tlb->cleared_puds = 1;
0543 }
0544 
0545 static inline void tlb_flush_p4d_range(struct mmu_gather *tlb,
0546                      unsigned long address, unsigned long size)
0547 {
0548     __tlb_adjust_range(tlb, address, size);
0549     tlb->cleared_p4ds = 1;
0550 }
0551 
0552 #ifndef __tlb_remove_tlb_entry
0553 #define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
0554 #endif
0555 
0556 /**
0557  * tlb_remove_tlb_entry - remember a pte unmapping for later tlb invalidation.
0558  *
0559  * Record the fact that pte's were really unmapped by updating the range,
0560  * so we can later optimise away the tlb invalidate.   This helps when
0561  * userspace is unmapping already-unmapped pages, which happens quite a lot.
0562  */
0563 #define tlb_remove_tlb_entry(tlb, ptep, address)        \
0564     do {                            \
0565         tlb_flush_pte_range(tlb, address, PAGE_SIZE);   \
0566         __tlb_remove_tlb_entry(tlb, ptep, address); \
0567     } while (0)
0568 
0569 #define tlb_remove_huge_tlb_entry(h, tlb, ptep, address)    \
0570     do {                            \
0571         unsigned long _sz = huge_page_size(h);      \
0572         if (_sz >= P4D_SIZE)                \
0573             tlb_flush_p4d_range(tlb, address, _sz); \
0574         else if (_sz >= PUD_SIZE)           \
0575             tlb_flush_pud_range(tlb, address, _sz); \
0576         else if (_sz >= PMD_SIZE)           \
0577             tlb_flush_pmd_range(tlb, address, _sz); \
0578         else                        \
0579             tlb_flush_pte_range(tlb, address, _sz); \
0580         __tlb_remove_tlb_entry(tlb, ptep, address); \
0581     } while (0)
0582 
0583 /**
0584  * tlb_remove_pmd_tlb_entry - remember a pmd mapping for later tlb invalidation
0585  * This is a nop so far, because only x86 needs it.
0586  */
0587 #ifndef __tlb_remove_pmd_tlb_entry
0588 #define __tlb_remove_pmd_tlb_entry(tlb, pmdp, address) do {} while (0)
0589 #endif
0590 
0591 #define tlb_remove_pmd_tlb_entry(tlb, pmdp, address)            \
0592     do {                                \
0593         tlb_flush_pmd_range(tlb, address, HPAGE_PMD_SIZE);  \
0594         __tlb_remove_pmd_tlb_entry(tlb, pmdp, address);     \
0595     } while (0)
0596 
0597 /**
0598  * tlb_remove_pud_tlb_entry - remember a pud mapping for later tlb
0599  * invalidation. This is a nop so far, because only x86 needs it.
0600  */
0601 #ifndef __tlb_remove_pud_tlb_entry
0602 #define __tlb_remove_pud_tlb_entry(tlb, pudp, address) do {} while (0)
0603 #endif
0604 
0605 #define tlb_remove_pud_tlb_entry(tlb, pudp, address)            \
0606     do {                                \
0607         tlb_flush_pud_range(tlb, address, HPAGE_PUD_SIZE);  \
0608         __tlb_remove_pud_tlb_entry(tlb, pudp, address);     \
0609     } while (0)
0610 
0611 /*
0612  * For things like page tables caches (ie caching addresses "inside" the
0613  * page tables, like x86 does), for legacy reasons, flushing an
0614  * individual page had better flush the page table caches behind it. This
0615  * is definitely how x86 works, for example. And if you have an
0616  * architected non-legacy page table cache (which I'm not aware of
0617  * anybody actually doing), you're going to have some architecturally
0618  * explicit flushing for that, likely *separate* from a regular TLB entry
0619  * flush, and thus you'd need more than just some range expansion..
0620  *
0621  * So if we ever find an architecture
0622  * that would want something that odd, I think it is up to that
0623  * architecture to do its own odd thing, not cause pain for others
0624  * http://lkml.kernel.org/r/CA+55aFzBggoXtNXQeng5d_mRoDnaMBE5Y+URs+PHR67nUpMtaw@mail.gmail.com
0625  *
0626  * For now w.r.t page table cache, mark the range_size as PAGE_SIZE
0627  */
0628 
0629 #ifndef pte_free_tlb
0630 #define pte_free_tlb(tlb, ptep, address)            \
0631     do {                            \
0632         tlb_flush_pmd_range(tlb, address, PAGE_SIZE);   \
0633         tlb->freed_tables = 1;              \
0634         __pte_free_tlb(tlb, ptep, address);     \
0635     } while (0)
0636 #endif
0637 
0638 #ifndef pmd_free_tlb
0639 #define pmd_free_tlb(tlb, pmdp, address)            \
0640     do {                            \
0641         tlb_flush_pud_range(tlb, address, PAGE_SIZE);   \
0642         tlb->freed_tables = 1;              \
0643         __pmd_free_tlb(tlb, pmdp, address);     \
0644     } while (0)
0645 #endif
0646 
0647 #ifndef pud_free_tlb
0648 #define pud_free_tlb(tlb, pudp, address)            \
0649     do {                            \
0650         tlb_flush_p4d_range(tlb, address, PAGE_SIZE);   \
0651         tlb->freed_tables = 1;              \
0652         __pud_free_tlb(tlb, pudp, address);     \
0653     } while (0)
0654 #endif
0655 
0656 #ifndef p4d_free_tlb
0657 #define p4d_free_tlb(tlb, pudp, address)            \
0658     do {                            \
0659         __tlb_adjust_range(tlb, address, PAGE_SIZE);    \
0660         tlb->freed_tables = 1;              \
0661         __p4d_free_tlb(tlb, pudp, address);     \
0662     } while (0)
0663 #endif
0664 
0665 #ifndef pte_needs_flush
0666 static inline bool pte_needs_flush(pte_t oldpte, pte_t newpte)
0667 {
0668     return true;
0669 }
0670 #endif
0671 
0672 #ifndef huge_pmd_needs_flush
0673 static inline bool huge_pmd_needs_flush(pmd_t oldpmd, pmd_t newpmd)
0674 {
0675     return true;
0676 }
0677 #endif
0678 
0679 #endif /* CONFIG_MMU */
0680 
0681 #endif /* _ASM_GENERIC__TLB_H */