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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * PCI Backend - Functions for creating a virtual configuration space for
0004  *               exported PCI Devices.
0005  *               It's dangerous to allow PCI Driver Domains to change their
0006  *               device's resources (memory, i/o ports, interrupts). We need to
0007  *               restrict changes to certain PCI Configuration registers:
0008  *               BARs, INTERRUPT_PIN, most registers in the header...
0009  *
0010  * Author: Ryan Wilson <hap9@epoch.ncsc.mil>
0011  */
0012 
0013 #define dev_fmt(fmt) DRV_NAME ": " fmt
0014 
0015 #include <linux/kernel.h>
0016 #include <linux/moduleparam.h>
0017 #include <linux/pci.h>
0018 #include "pciback.h"
0019 #include "conf_space.h"
0020 #include "conf_space_quirks.h"
0021 
0022 bool xen_pcibk_permissive;
0023 module_param_named(permissive, xen_pcibk_permissive, bool, 0644);
0024 
0025 /* This is where xen_pcibk_read_config_byte, xen_pcibk_read_config_word,
0026  * xen_pcibk_write_config_word, and xen_pcibk_write_config_byte are created. */
0027 #define DEFINE_PCI_CONFIG(op, size, type)           \
0028 int xen_pcibk_##op##_config_##size              \
0029 (struct pci_dev *dev, int offset, type value, void *data)   \
0030 {                               \
0031     return pci_##op##_config_##size(dev, offset, value);    \
0032 }
0033 
0034 DEFINE_PCI_CONFIG(read, byte, u8 *)
0035 DEFINE_PCI_CONFIG(read, word, u16 *)
0036 DEFINE_PCI_CONFIG(read, dword, u32 *)
0037 
0038 DEFINE_PCI_CONFIG(write, byte, u8)
0039 DEFINE_PCI_CONFIG(write, word, u16)
0040 DEFINE_PCI_CONFIG(write, dword, u32)
0041 
0042 static int conf_space_read(struct pci_dev *dev,
0043                const struct config_field_entry *entry,
0044                int offset, u32 *value)
0045 {
0046     int ret = 0;
0047     const struct config_field *field = entry->field;
0048 
0049     *value = 0;
0050 
0051     switch (field->size) {
0052     case 1:
0053         if (field->u.b.read)
0054             ret = field->u.b.read(dev, offset, (u8 *) value,
0055                           entry->data);
0056         break;
0057     case 2:
0058         if (field->u.w.read)
0059             ret = field->u.w.read(dev, offset, (u16 *) value,
0060                           entry->data);
0061         break;
0062     case 4:
0063         if (field->u.dw.read)
0064             ret = field->u.dw.read(dev, offset, value, entry->data);
0065         break;
0066     }
0067     return ret;
0068 }
0069 
0070 static int conf_space_write(struct pci_dev *dev,
0071                 const struct config_field_entry *entry,
0072                 int offset, u32 value)
0073 {
0074     int ret = 0;
0075     const struct config_field *field = entry->field;
0076 
0077     switch (field->size) {
0078     case 1:
0079         if (field->u.b.write)
0080             ret = field->u.b.write(dev, offset, (u8) value,
0081                            entry->data);
0082         break;
0083     case 2:
0084         if (field->u.w.write)
0085             ret = field->u.w.write(dev, offset, (u16) value,
0086                            entry->data);
0087         break;
0088     case 4:
0089         if (field->u.dw.write)
0090             ret = field->u.dw.write(dev, offset, value,
0091                         entry->data);
0092         break;
0093     }
0094     return ret;
0095 }
0096 
0097 static inline u32 get_mask(int size)
0098 {
0099     if (size == 1)
0100         return 0xff;
0101     else if (size == 2)
0102         return 0xffff;
0103     else
0104         return 0xffffffff;
0105 }
0106 
0107 static inline int valid_request(int offset, int size)
0108 {
0109     /* Validate request (no un-aligned requests) */
0110     if ((size == 1 || size == 2 || size == 4) && (offset % size) == 0)
0111         return 1;
0112     return 0;
0113 }
0114 
0115 static inline u32 merge_value(u32 val, u32 new_val, u32 new_val_mask,
0116                   int offset)
0117 {
0118     if (offset >= 0) {
0119         new_val_mask <<= (offset * 8);
0120         new_val <<= (offset * 8);
0121     } else {
0122         new_val_mask >>= (offset * -8);
0123         new_val >>= (offset * -8);
0124     }
0125     val = (val & ~new_val_mask) | (new_val & new_val_mask);
0126 
0127     return val;
0128 }
0129 
0130 static int xen_pcibios_err_to_errno(int err)
0131 {
0132     switch (err) {
0133     case PCIBIOS_SUCCESSFUL:
0134         return XEN_PCI_ERR_success;
0135     case PCIBIOS_DEVICE_NOT_FOUND:
0136         return XEN_PCI_ERR_dev_not_found;
0137     case PCIBIOS_BAD_REGISTER_NUMBER:
0138         return XEN_PCI_ERR_invalid_offset;
0139     case PCIBIOS_FUNC_NOT_SUPPORTED:
0140         return XEN_PCI_ERR_not_implemented;
0141     case PCIBIOS_SET_FAILED:
0142         return XEN_PCI_ERR_access_denied;
0143     }
0144     return err;
0145 }
0146 
0147 int xen_pcibk_config_read(struct pci_dev *dev, int offset, int size,
0148               u32 *ret_val)
0149 {
0150     int err = 0;
0151     struct xen_pcibk_dev_data *dev_data = pci_get_drvdata(dev);
0152     const struct config_field_entry *cfg_entry;
0153     const struct config_field *field;
0154     int field_start, field_end;
0155     /* if read fails for any reason, return 0
0156      * (as if device didn't respond) */
0157     u32 value = 0, tmp_val;
0158 
0159     dev_dbg(&dev->dev, "read %d bytes at 0x%x\n", size, offset);
0160 
0161     if (!valid_request(offset, size)) {
0162         err = XEN_PCI_ERR_invalid_offset;
0163         goto out;
0164     }
0165 
0166     /* Get the real value first, then modify as appropriate */
0167     switch (size) {
0168     case 1:
0169         err = pci_read_config_byte(dev, offset, (u8 *) &value);
0170         break;
0171     case 2:
0172         err = pci_read_config_word(dev, offset, (u16 *) &value);
0173         break;
0174     case 4:
0175         err = pci_read_config_dword(dev, offset, &value);
0176         break;
0177     }
0178 
0179     list_for_each_entry(cfg_entry, &dev_data->config_fields, list) {
0180         field = cfg_entry->field;
0181 
0182         field_start = OFFSET(cfg_entry);
0183         field_end = OFFSET(cfg_entry) + field->size;
0184 
0185         if (offset + size > field_start && field_end > offset) {
0186             err = conf_space_read(dev, cfg_entry, field_start,
0187                           &tmp_val);
0188             if (err)
0189                 goto out;
0190 
0191             value = merge_value(value, tmp_val,
0192                         get_mask(field->size),
0193                         field_start - offset);
0194         }
0195     }
0196 
0197 out:
0198     dev_dbg(&dev->dev, "read %d bytes at 0x%x = %x\n", size, offset, value);
0199 
0200     *ret_val = value;
0201     return xen_pcibios_err_to_errno(err);
0202 }
0203 
0204 int xen_pcibk_config_write(struct pci_dev *dev, int offset, int size, u32 value)
0205 {
0206     int err = 0, handled = 0;
0207     struct xen_pcibk_dev_data *dev_data = pci_get_drvdata(dev);
0208     const struct config_field_entry *cfg_entry;
0209     const struct config_field *field;
0210     u32 tmp_val;
0211     int field_start, field_end;
0212 
0213     dev_dbg(&dev->dev, "write request %d bytes at 0x%x = %x\n",
0214         size, offset, value);
0215 
0216     if (!valid_request(offset, size))
0217         return XEN_PCI_ERR_invalid_offset;
0218 
0219     list_for_each_entry(cfg_entry, &dev_data->config_fields, list) {
0220         field = cfg_entry->field;
0221 
0222         field_start = OFFSET(cfg_entry);
0223         field_end = OFFSET(cfg_entry) + field->size;
0224 
0225         if (offset + size > field_start && field_end > offset) {
0226             err = conf_space_read(dev, cfg_entry, field_start,
0227                           &tmp_val);
0228             if (err)
0229                 break;
0230 
0231             tmp_val = merge_value(tmp_val, value, get_mask(size),
0232                           offset - field_start);
0233 
0234             err = conf_space_write(dev, cfg_entry, field_start,
0235                            tmp_val);
0236 
0237             /* handled is set true here, but not every byte
0238              * may have been written! Properly detecting if
0239              * every byte is handled is unnecessary as the
0240              * flag is used to detect devices that need
0241              * special helpers to work correctly.
0242              */
0243             handled = 1;
0244         }
0245     }
0246 
0247     if (!handled && !err) {
0248         /* By default, anything not specificially handled above is
0249          * read-only. The permissive flag changes this behavior so
0250          * that anything not specifically handled above is writable.
0251          * This means that some fields may still be read-only because
0252          * they have entries in the config_field list that intercept
0253          * the write and do nothing. */
0254         if (dev_data->permissive || xen_pcibk_permissive) {
0255             switch (size) {
0256             case 1:
0257                 err = pci_write_config_byte(dev, offset,
0258                                 (u8) value);
0259                 break;
0260             case 2:
0261                 err = pci_write_config_word(dev, offset,
0262                                 (u16) value);
0263                 break;
0264             case 4:
0265                 err = pci_write_config_dword(dev, offset,
0266                                  (u32) value);
0267                 break;
0268             }
0269         } else if (!dev_data->warned_on_write) {
0270             dev_data->warned_on_write = 1;
0271             dev_warn(&dev->dev, "Driver tried to write to a "
0272                  "read-only configuration space field at offset"
0273                  " 0x%x, size %d. This may be harmless, but if "
0274                  "you have problems with your device:\n"
0275                  "1) see permissive attribute in sysfs\n"
0276                  "2) report problems to the xen-devel "
0277                  "mailing list along with details of your "
0278                  "device obtained from lspci.\n", offset, size);
0279         }
0280     }
0281 
0282     return xen_pcibios_err_to_errno(err);
0283 }
0284 
0285 int xen_pcibk_get_interrupt_type(struct pci_dev *dev)
0286 {
0287     int err;
0288     u16 val;
0289     int ret = 0;
0290 
0291     err = pci_read_config_word(dev, PCI_COMMAND, &val);
0292     if (err)
0293         return err;
0294     if (!(val & PCI_COMMAND_INTX_DISABLE))
0295         ret |= INTERRUPT_TYPE_INTX;
0296 
0297     /*
0298      * Do not trust dev->msi(x)_enabled here, as enabling could be done
0299      * bypassing the pci_*msi* functions, by the qemu.
0300      */
0301     if (dev->msi_cap) {
0302         err = pci_read_config_word(dev,
0303                 dev->msi_cap + PCI_MSI_FLAGS,
0304                 &val);
0305         if (err)
0306             return err;
0307         if (val & PCI_MSI_FLAGS_ENABLE)
0308             ret |= INTERRUPT_TYPE_MSI;
0309     }
0310     if (dev->msix_cap) {
0311         err = pci_read_config_word(dev,
0312                 dev->msix_cap + PCI_MSIX_FLAGS,
0313                 &val);
0314         if (err)
0315             return err;
0316         if (val & PCI_MSIX_FLAGS_ENABLE)
0317             ret |= INTERRUPT_TYPE_MSIX;
0318     }
0319     return ret ?: INTERRUPT_TYPE_NONE;
0320 }
0321 
0322 void xen_pcibk_config_free_dyn_fields(struct pci_dev *dev)
0323 {
0324     struct xen_pcibk_dev_data *dev_data = pci_get_drvdata(dev);
0325     struct config_field_entry *cfg_entry, *t;
0326     const struct config_field *field;
0327 
0328     dev_dbg(&dev->dev, "free-ing dynamically allocated virtual "
0329                "configuration space fields\n");
0330     if (!dev_data)
0331         return;
0332 
0333     list_for_each_entry_safe(cfg_entry, t, &dev_data->config_fields, list) {
0334         field = cfg_entry->field;
0335 
0336         if (field->clean) {
0337             field->clean((struct config_field *)field);
0338 
0339             kfree(cfg_entry->data);
0340 
0341             list_del(&cfg_entry->list);
0342             kfree(cfg_entry);
0343         }
0344 
0345     }
0346 }
0347 
0348 void xen_pcibk_config_reset_dev(struct pci_dev *dev)
0349 {
0350     struct xen_pcibk_dev_data *dev_data = pci_get_drvdata(dev);
0351     const struct config_field_entry *cfg_entry;
0352     const struct config_field *field;
0353 
0354     dev_dbg(&dev->dev, "resetting virtual configuration space\n");
0355     if (!dev_data)
0356         return;
0357 
0358     list_for_each_entry(cfg_entry, &dev_data->config_fields, list) {
0359         field = cfg_entry->field;
0360 
0361         if (field->reset)
0362             field->reset(dev, OFFSET(cfg_entry), cfg_entry->data);
0363     }
0364 }
0365 
0366 void xen_pcibk_config_free_dev(struct pci_dev *dev)
0367 {
0368     struct xen_pcibk_dev_data *dev_data = pci_get_drvdata(dev);
0369     struct config_field_entry *cfg_entry, *t;
0370     const struct config_field *field;
0371 
0372     dev_dbg(&dev->dev, "free-ing virtual configuration space fields\n");
0373     if (!dev_data)
0374         return;
0375 
0376     list_for_each_entry_safe(cfg_entry, t, &dev_data->config_fields, list) {
0377         list_del(&cfg_entry->list);
0378 
0379         field = cfg_entry->field;
0380 
0381         if (field->release)
0382             field->release(dev, OFFSET(cfg_entry), cfg_entry->data);
0383 
0384         kfree(cfg_entry);
0385     }
0386 }
0387 
0388 int xen_pcibk_config_add_field_offset(struct pci_dev *dev,
0389                     const struct config_field *field,
0390                     unsigned int base_offset)
0391 {
0392     int err = 0;
0393     struct xen_pcibk_dev_data *dev_data = pci_get_drvdata(dev);
0394     struct config_field_entry *cfg_entry;
0395     void *tmp;
0396 
0397     cfg_entry = kmalloc(sizeof(*cfg_entry), GFP_KERNEL);
0398     if (!cfg_entry) {
0399         err = -ENOMEM;
0400         goto out;
0401     }
0402 
0403     cfg_entry->data = NULL;
0404     cfg_entry->field = field;
0405     cfg_entry->base_offset = base_offset;
0406 
0407     /* silently ignore duplicate fields */
0408     err = xen_pcibk_field_is_dup(dev, OFFSET(cfg_entry));
0409     if (err)
0410         goto out;
0411 
0412     if (field->init) {
0413         tmp = field->init(dev, OFFSET(cfg_entry));
0414 
0415         if (IS_ERR(tmp)) {
0416             err = PTR_ERR(tmp);
0417             goto out;
0418         }
0419 
0420         cfg_entry->data = tmp;
0421     }
0422 
0423     dev_dbg(&dev->dev, "added config field at offset 0x%02x\n",
0424         OFFSET(cfg_entry));
0425     list_add_tail(&cfg_entry->list, &dev_data->config_fields);
0426 
0427 out:
0428     if (err)
0429         kfree(cfg_entry);
0430 
0431     return err;
0432 }
0433 
0434 /* This sets up the device's virtual configuration space to keep track of
0435  * certain registers (like the base address registers (BARs) so that we can
0436  * keep the client from manipulating them directly.
0437  */
0438 int xen_pcibk_config_init_dev(struct pci_dev *dev)
0439 {
0440     int err = 0;
0441     struct xen_pcibk_dev_data *dev_data = pci_get_drvdata(dev);
0442 
0443     dev_dbg(&dev->dev, "initializing virtual configuration space\n");
0444 
0445     INIT_LIST_HEAD(&dev_data->config_fields);
0446 
0447     err = xen_pcibk_config_header_add_fields(dev);
0448     if (err)
0449         goto out;
0450 
0451     err = xen_pcibk_config_capability_add_fields(dev);
0452     if (err)
0453         goto out;
0454 
0455     err = xen_pcibk_config_quirks_init(dev);
0456 
0457 out:
0458     return err;
0459 }
0460 
0461 int xen_pcibk_config_init(void)
0462 {
0463     return xen_pcibk_config_capability_init();
0464 }