xen/events/events_2l.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Xen event channels (2-level ABI)
0004  *
0005  * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
0006  */
0007
0008 #define pr_fmt(fmt) "xen:" KBUILD_MODNAME ": " fmt
0009
0010 #include <linux/linkage.h>
0011 #include <linux/interrupt.h>
0012 #include <linux/irq.h>
0013
0014 #include <asm/sync_bitops.h>
0015 #include <asm/xen/hypercall.h>
0016 #include <asm/xen/hypervisor.h>
0017
0018 #include <xen/xen.h>
0019 #include <xen/xen-ops.h>
0020 #include <xen/events.h>
0021 #include <xen/interface/xen.h>
0022 #include <xen/interface/event_channel.h>
0023
0024 #include "events_internal.h"
0025
0026 /*
0027  * Note sizeof(xen_ulong_t) can be more than sizeof(unsigned long). Be
0028  * careful to only use bitops which allow for this (e.g
0029  * test_bit/find_first_bit and friends but not __ffs) and to pass
0030  * BITS_PER_EVTCHN_WORD as the bitmask length.
0031  */
0032 #define BITS_PER_EVTCHN_WORD (sizeof(xen_ulong_t)*8)
0033 /*
0034  * Make a bitmask (i.e. unsigned long *) of a xen_ulong_t
0035  * array. Primarily to avoid long lines (hence the terse name).
0036  */
0037 #define BM(x) (unsigned long *)(x)
0038 /* Find the first set bit in a evtchn mask */
0039 #define EVTCHN_FIRST_BIT(w) find_first_bit(BM(&(w)), BITS_PER_EVTCHN_WORD)
0040
0041 #define EVTCHN_MASK_SIZE (EVTCHN_2L_NR_CHANNELS/BITS_PER_EVTCHN_WORD)
0042
0043 static DEFINE_PER_CPU(xen_ulong_t [EVTCHN_MASK_SIZE], cpu_evtchn_mask);
0044
0045 static unsigned evtchn_2l_max_channels(void)
0046 {
0047     return EVTCHN_2L_NR_CHANNELS;
0048 }
0049
0050 static void evtchn_2l_remove(evtchn_port_t evtchn, unsigned int cpu)
0051 {
0052     clear_bit(evtchn, BM(per_cpu(cpu_evtchn_mask, cpu)));
0053 }
0054
0055 static void evtchn_2l_bind_to_cpu(evtchn_port_t evtchn, unsigned int cpu,
0056                   unsigned int old_cpu)
0057 {
0058     clear_bit(evtchn, BM(per_cpu(cpu_evtchn_mask, old_cpu)));
0059     set_bit(evtchn, BM(per_cpu(cpu_evtchn_mask, cpu)));
0060 }
0061
0062 static void evtchn_2l_clear_pending(evtchn_port_t port)
0063 {
0064     struct shared_info *s = HYPERVISOR_shared_info;
0065     sync_clear_bit(port, BM(&s->evtchn_pending[0]));
0066 }
0067
0068 static void evtchn_2l_set_pending(evtchn_port_t port)
0069 {
0070     struct shared_info *s = HYPERVISOR_shared_info;
0071     sync_set_bit(port, BM(&s->evtchn_pending[0]));
0072 }
0073
0074 static bool evtchn_2l_is_pending(evtchn_port_t port)
0075 {
0076     struct shared_info *s = HYPERVISOR_shared_info;
0077     return sync_test_bit(port, BM(&s->evtchn_pending[0]));
0078 }
0079
0080 static void evtchn_2l_mask(evtchn_port_t port)
0081 {
0082     struct shared_info *s = HYPERVISOR_shared_info;
0083     sync_set_bit(port, BM(&s->evtchn_mask[0]));
0084 }
0085
0086 static void evtchn_2l_unmask(evtchn_port_t port)
0087 {
0088     struct shared_info *s = HYPERVISOR_shared_info;
0089     unsigned int cpu = get_cpu();
0090     int do_hypercall = 0, evtchn_pending = 0;
0091
0092     BUG_ON(!irqs_disabled());
0093
0094     smp_wmb();  /* All writes before unmask must be visible. */
0095
0096     if (unlikely((cpu != cpu_from_evtchn(port))))
0097         do_hypercall = 1;
0098     else {
0099         /*
0100          * Need to clear the mask before checking pending to
0101          * avoid a race with an event becoming pending.
0102          *
0103          * EVTCHNOP_unmask will only trigger an upcall if the
0104          * mask bit was set, so if a hypercall is needed
0105          * remask the event.
0106          */
0107         sync_clear_bit(port, BM(&s->evtchn_mask[0]));
0108         evtchn_pending = sync_test_bit(port, BM(&s->evtchn_pending[0]));
0109
0110         if (unlikely(evtchn_pending && xen_hvm_domain())) {
0111             sync_set_bit(port, BM(&s->evtchn_mask[0]));
0112             do_hypercall = 1;
0113         }
0114     }
0115
0116     /* Slow path (hypercall) if this is a non-local port or if this is
0117      * an hvm domain and an event is pending (hvm domains don't have
0118      * their own implementation of irq_enable). */
0119     if (do_hypercall) {
0120         struct evtchn_unmask unmask = { .port = port };
0121         (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
0122     } else {
0123         struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
0124
0125         /*
0126          * The following is basically the equivalent of
0127          * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
0128          * the interrupt edge' if the channel is masked.
0129          */
0130         if (evtchn_pending &&
0131             !sync_test_and_set_bit(port / BITS_PER_EVTCHN_WORD,
0132                        BM(&vcpu_info->evtchn_pending_sel)))
0133             vcpu_info->evtchn_upcall_pending = 1;
0134     }
0135
0136     put_cpu();
0137 }
0138
0139 static DEFINE_PER_CPU(unsigned int, current_word_idx);
0140 static DEFINE_PER_CPU(unsigned int, current_bit_idx);
0141
0142 /*
0143  * Mask out the i least significant bits of w
0144  */
0145 #define MASK_LSBS(w, i) (w & ((~((xen_ulong_t)0UL)) << i))
0146
0147 static inline xen_ulong_t active_evtchns(unsigned int cpu,
0148                      struct shared_info *sh,
0149                      unsigned int idx)
0150 {
0151     return sh->evtchn_pending[idx] &
0152         per_cpu(cpu_evtchn_mask, cpu)[idx] &
0153         ~sh->evtchn_mask[idx];
0154 }
0155
0156 /*
0157  * Search the CPU's pending events bitmasks.  For each one found, map
0158  * the event number to an irq, and feed it into do_IRQ() for handling.
0159  *
0160  * Xen uses a two-level bitmap to speed searching.  The first level is
0161  * a bitset of words which contain pending event bits.  The second
0162  * level is a bitset of pending events themselves.
0163  */
0164 static void evtchn_2l_handle_events(unsigned cpu, struct evtchn_loop_ctrl *ctrl)
0165 {
0166     int irq;
0167     xen_ulong_t pending_words;
0168     xen_ulong_t pending_bits;
0169     int start_word_idx, start_bit_idx;
0170     int word_idx, bit_idx;
0171     int i;
0172     struct shared_info *s = HYPERVISOR_shared_info;
0173     struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
0174
0175     /* Timer interrupt has highest priority. */
0176     irq = irq_from_virq(cpu, VIRQ_TIMER);
0177     if (irq != -1) {
0178         evtchn_port_t evtchn = evtchn_from_irq(irq);
0179         word_idx = evtchn / BITS_PER_LONG;
0180         bit_idx = evtchn % BITS_PER_LONG;
0181         if (active_evtchns(cpu, s, word_idx) & (1ULL << bit_idx))
0182             generic_handle_irq(irq);
0183     }
0184
0185     /*
0186      * Master flag must be cleared /before/ clearing
0187      * selector flag. xchg_xen_ulong must contain an
0188      * appropriate barrier.
0189      */
0190     pending_words = xchg_xen_ulong(&vcpu_info->evtchn_pending_sel, 0);
0191
0192     start_word_idx = __this_cpu_read(current_word_idx);
0193     start_bit_idx = __this_cpu_read(current_bit_idx);
0194
0195     word_idx = start_word_idx;
0196
0197     for (i = 0; pending_words != 0; i++) {
0198         xen_ulong_t words;
0199
0200         words = MASK_LSBS(pending_words, word_idx);
0201
0202         /*
0203          * If we masked out all events, wrap to beginning.
0204          */
0205         if (words == 0) {
0206             word_idx = 0;
0207             bit_idx = 0;
0208             continue;
0209         }
0210         word_idx = EVTCHN_FIRST_BIT(words);
0211
0212         pending_bits = active_evtchns(cpu, s, word_idx);
0213         bit_idx = 0; /* usually scan entire word from start */
0214         /*
0215          * We scan the starting word in two parts.
0216          *
0217          * 1st time: start in the middle, scanning the
0218          * upper bits.
0219          *
0220          * 2nd time: scan the whole word (not just the
0221          * parts skipped in the first pass) -- if an
0222          * event in the previously scanned bits is
0223          * pending again it would just be scanned on
0224          * the next loop anyway.
0225          */
0226         if (word_idx == start_word_idx) {
0227             if (i == 0)
0228                 bit_idx = start_bit_idx;
0229         }
0230
0231         do {
0232             xen_ulong_t bits;
0233             evtchn_port_t port;
0234
0235             bits = MASK_LSBS(pending_bits, bit_idx);
0236
0237             /* If we masked out all events, move on. */
0238             if (bits == 0)
0239                 break;
0240
0241             bit_idx = EVTCHN_FIRST_BIT(bits);
0242
0243             /* Process port. */
0244             port = (word_idx * BITS_PER_EVTCHN_WORD) + bit_idx;
0245             handle_irq_for_port(port, ctrl);
0246
0247             bit_idx = (bit_idx + 1) % BITS_PER_EVTCHN_WORD;
0248
0249             /* Next caller starts at last processed + 1 */
0250             __this_cpu_write(current_word_idx,
0251                      bit_idx ? word_idx :
0252                      (word_idx+1) % BITS_PER_EVTCHN_WORD);
0253             __this_cpu_write(current_bit_idx, bit_idx);
0254         } while (bit_idx != 0);
0255
0256         /* Scan start_l1i twice; all others once. */
0257         if ((word_idx != start_word_idx) || (i != 0))
0258             pending_words &= ~(1UL << word_idx);
0259
0260         word_idx = (word_idx + 1) % BITS_PER_EVTCHN_WORD;
0261     }
0262 }
0263
0264 irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
0265 {
0266     struct shared_info *sh = HYPERVISOR_shared_info;
0267     int cpu = smp_processor_id();
0268     xen_ulong_t *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu);
0269     int i;
0270     unsigned long flags;
0271     static DEFINE_SPINLOCK(debug_lock);
0272     struct vcpu_info *v;
0273
0274     spin_lock_irqsave(&debug_lock, flags);
0275
0276     printk("\nvcpu %d\n  ", cpu);
0277
0278     for_each_online_cpu(i) {
0279         int pending;
0280         v = per_cpu(xen_vcpu, i);
0281         pending = (get_irq_regs() && i == cpu)
0282             ? xen_irqs_disabled(get_irq_regs())
0283             : v->evtchn_upcall_mask;
0284         printk("%d: masked=%d pending=%d event_sel %0*"PRI_xen_ulong"\n  ", i,
0285                pending, v->evtchn_upcall_pending,
0286                (int)(sizeof(v->evtchn_pending_sel)*2),
0287                v->evtchn_pending_sel);
0288     }
0289     v = per_cpu(xen_vcpu, cpu);
0290
0291     printk("\npending:\n   ");
0292     for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
0293         printk("%0*"PRI_xen_ulong"%s",
0294                (int)sizeof(sh->evtchn_pending[0])*2,
0295                sh->evtchn_pending[i],
0296                i % 8 == 0 ? "\n   " : " ");
0297     printk("\nglobal mask:\n   ");
0298     for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
0299         printk("%0*"PRI_xen_ulong"%s",
0300                (int)(sizeof(sh->evtchn_mask[0])*2),
0301                sh->evtchn_mask[i],
0302                i % 8 == 0 ? "\n   " : " ");
0303
0304     printk("\nglobally unmasked:\n   ");
0305     for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
0306         printk("%0*"PRI_xen_ulong"%s",
0307                (int)(sizeof(sh->evtchn_mask[0])*2),
0308                sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
0309                i % 8 == 0 ? "\n   " : " ");
0310
0311     printk("\nlocal cpu%d mask:\n   ", cpu);
0312     for (i = (EVTCHN_2L_NR_CHANNELS/BITS_PER_EVTCHN_WORD)-1; i >= 0; i--)
0313         printk("%0*"PRI_xen_ulong"%s", (int)(sizeof(cpu_evtchn[0])*2),
0314                cpu_evtchn[i],
0315                i % 8 == 0 ? "\n   " : " ");
0316
0317     printk("\nlocally unmasked:\n   ");
0318     for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
0319         xen_ulong_t pending = sh->evtchn_pending[i]
0320             & ~sh->evtchn_mask[i]
0321             & cpu_evtchn[i];
0322         printk("%0*"PRI_xen_ulong"%s",
0323                (int)(sizeof(sh->evtchn_mask[0])*2),
0324                pending, i % 8 == 0 ? "\n   " : " ");
0325     }
0326
0327     printk("\npending list:\n");
0328     for (i = 0; i < EVTCHN_2L_NR_CHANNELS; i++) {
0329         if (sync_test_bit(i, BM(sh->evtchn_pending))) {
0330             int word_idx = i / BITS_PER_EVTCHN_WORD;
0331             printk("  %d: event %d -> irq %d%s%s%s\n",
0332                    cpu_from_evtchn(i), i,
0333                    get_evtchn_to_irq(i),
0334                    sync_test_bit(word_idx, BM(&v->evtchn_pending_sel))
0335                    ? "" : " l2-clear",
0336                    !sync_test_bit(i, BM(sh->evtchn_mask))
0337                    ? "" : " globally-masked",
0338                    sync_test_bit(i, BM(cpu_evtchn))
0339                    ? "" : " locally-masked");
0340         }
0341     }
0342
0343     spin_unlock_irqrestore(&debug_lock, flags);
0344
0345     return IRQ_HANDLED;
0346 }
0347
0348 static void evtchn_2l_resume(void)
0349 {
0350     int i;
0351
0352     for_each_online_cpu(i)
0353         memset(per_cpu(cpu_evtchn_mask, i), 0, sizeof(xen_ulong_t) *
0354                 EVTCHN_2L_NR_CHANNELS/BITS_PER_EVTCHN_WORD);
0355 }
0356
0357 static int evtchn_2l_percpu_deinit(unsigned int cpu)
0358 {
0359     memset(per_cpu(cpu_evtchn_mask, cpu), 0, sizeof(xen_ulong_t) *
0360             EVTCHN_2L_NR_CHANNELS/BITS_PER_EVTCHN_WORD);
0361
0362     return 0;
0363 }
0364
0365 static const struct evtchn_ops evtchn_ops_2l = {
0366     .max_channels      = evtchn_2l_max_channels,
0367     .nr_channels       = evtchn_2l_max_channels,
0368     .remove            = evtchn_2l_remove,
0369     .bind_to_cpu       = evtchn_2l_bind_to_cpu,
0370     .clear_pending     = evtchn_2l_clear_pending,
0371     .set_pending       = evtchn_2l_set_pending,
0372     .is_pending        = evtchn_2l_is_pending,
0373     .mask              = evtchn_2l_mask,
0374     .unmask            = evtchn_2l_unmask,
0375     .handle_events     = evtchn_2l_handle_events,
0376     .resume            = evtchn_2l_resume,
0377     .percpu_deinit     = evtchn_2l_percpu_deinit,
0378 };
0379
0380 void __init xen_evtchn_2l_init(void)
0381 {
0382     pr_info("Using 2-level ABI\n");
0383     evtchn_ops = &evtchn_ops_2l;
0384 }