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0001 /* SPDX-License-Identifier: GPL-1.0+ */ 0002 /* 0003 * Industrial Computer Source WDT500/501 driver 0004 * 0005 * (c) Copyright 1995 CymruNET Ltd 0006 * Innovation Centre 0007 * Singleton Park 0008 * Swansea 0009 * Wales 0010 * UK 0011 * SA2 8PP 0012 * 0013 * http://www.cymru.net 0014 * 0015 * Release 0.04. 0016 */ 0017 0018 0019 #define WDT_COUNT0 (io+0) 0020 #define WDT_COUNT1 (io+1) 0021 #define WDT_COUNT2 (io+2) 0022 #define WDT_CR (io+3) 0023 #define WDT_SR (io+4) /* Start buzzer on PCI write */ 0024 #define WDT_RT (io+5) /* Stop buzzer on PCI write */ 0025 #define WDT_BUZZER (io+6) /* PCI only: rd=disable, wr=enable */ 0026 #define WDT_DC (io+7) 0027 0028 /* The following are only on the PCI card, they're outside of I/O space on 0029 * the ISA card: */ 0030 #define WDT_CLOCK (io+12) /* COUNT2: rd=16.67MHz, wr=2.0833MHz */ 0031 /* inverted opto isolated reset output: */ 0032 #define WDT_OPTONOTRST (io+13) /* wr=enable, rd=disable */ 0033 /* opto isolated reset output: */ 0034 #define WDT_OPTORST (io+14) /* wr=enable, rd=disable */ 0035 /* programmable outputs: */ 0036 #define WDT_PROGOUT (io+15) /* wr=enable, rd=disable */ 0037 0038 /* FAN 501 500 */ 0039 #define WDC_SR_WCCR 1 /* Active low */ /* X X X */ 0040 #define WDC_SR_TGOOD 2 /* X X - */ 0041 #define WDC_SR_ISOI0 4 /* X X X */ 0042 #define WDC_SR_ISII1 8 /* X X X */ 0043 #define WDC_SR_FANGOOD 16 /* X - - */ 0044 #define WDC_SR_PSUOVER 32 /* Active low */ /* X X - */ 0045 #define WDC_SR_PSUUNDR 64 /* Active low */ /* X X - */ 0046 #define WDC_SR_IRQ 128 /* Active low */ /* X X X */ 0047
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