drivers/watchdog/omap_wdt.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * omap_wdt.c
0004  *
0005  * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
0006  *
0007  * Author: MontaVista Software, Inc.
0008  *   <gdavis@mvista.com> or <source@mvista.com>
0009  *
0010  * 2003 (c) MontaVista Software, Inc.
0011  *
0012  * History:
0013  *
0014  * 20030527: George G. Davis <gdavis@mvista.com>
0015  *  Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
0016  *  (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
0017  *  Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
0018  *
0019  * Copyright (c) 2004 Texas Instruments.
0020  *  1. Modified to support OMAP1610 32-KHz watchdog timer
0021  *  2. Ported to 2.6 kernel
0022  *
0023  * Copyright (c) 2005 David Brownell
0024  *  Use the driver model and standard identifiers; handle bigger timeouts.
0025  */
0026
0027 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
0028
0029 #include <linux/module.h>
0030 #include <linux/mod_devicetable.h>
0031 #include <linux/types.h>
0032 #include <linux/kernel.h>
0033 #include <linux/mm.h>
0034 #include <linux/watchdog.h>
0035 #include <linux/reboot.h>
0036 #include <linux/err.h>
0037 #include <linux/platform_device.h>
0038 #include <linux/moduleparam.h>
0039 #include <linux/io.h>
0040 #include <linux/slab.h>
0041 #include <linux/pm_runtime.h>
0042 #include <linux/platform_data/omap-wd-timer.h>
0043
0044 #include "omap_wdt.h"
0045
0046 static bool nowayout = WATCHDOG_NOWAYOUT;
0047 module_param(nowayout, bool, 0);
0048 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
0049     "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
0050
0051 static unsigned timer_margin;
0052 module_param(timer_margin, uint, 0);
0053 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
0054
0055 #define to_omap_wdt_dev(_wdog)  container_of(_wdog, struct omap_wdt_dev, wdog)
0056
0057 static bool early_enable;
0058 module_param(early_enable, bool, 0);
0059 MODULE_PARM_DESC(early_enable,
0060     "Watchdog is started on module insertion (default=0)");
0061
0062 struct omap_wdt_dev {
0063     struct watchdog_device wdog;
0064     void __iomem    *base;          /* physical */
0065     struct device   *dev;
0066     bool        omap_wdt_users;
0067     int     wdt_trgr_pattern;
0068     struct mutex    lock;       /* to avoid races with PM */
0069 };
0070
0071 static void omap_wdt_reload(struct omap_wdt_dev *wdev)
0072 {
0073     void __iomem    *base = wdev->base;
0074
0075     /* wait for posted write to complete */
0076     while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x08)
0077         cpu_relax();
0078
0079     wdev->wdt_trgr_pattern = ~wdev->wdt_trgr_pattern;
0080     writel_relaxed(wdev->wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
0081
0082     /* wait for posted write to complete */
0083     while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x08)
0084         cpu_relax();
0085     /* reloaded WCRR from WLDR */
0086 }
0087
0088 static void omap_wdt_enable(struct omap_wdt_dev *wdev)
0089 {
0090     void __iomem *base = wdev->base;
0091
0092     /* Sequence to enable the watchdog */
0093     writel_relaxed(0xBBBB, base + OMAP_WATCHDOG_SPR);
0094     while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x10)
0095         cpu_relax();
0096
0097     writel_relaxed(0x4444, base + OMAP_WATCHDOG_SPR);
0098     while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x10)
0099         cpu_relax();
0100 }
0101
0102 static void omap_wdt_disable(struct omap_wdt_dev *wdev)
0103 {
0104     void __iomem *base = wdev->base;
0105
0106     /* sequence required to disable watchdog */
0107     writel_relaxed(0xAAAA, base + OMAP_WATCHDOG_SPR);   /* TIMER_MODE */
0108     while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x10)
0109         cpu_relax();
0110
0111     writel_relaxed(0x5555, base + OMAP_WATCHDOG_SPR);   /* TIMER_MODE */
0112     while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x10)
0113         cpu_relax();
0114 }
0115
0116 static void omap_wdt_set_timer(struct omap_wdt_dev *wdev,
0117                    unsigned int timeout)
0118 {
0119     u32 pre_margin = GET_WLDR_VAL(timeout);
0120     void __iomem *base = wdev->base;
0121
0122     /* just count up at 32 KHz */
0123     while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x04)
0124         cpu_relax();
0125
0126     writel_relaxed(pre_margin, base + OMAP_WATCHDOG_LDR);
0127     while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x04)
0128         cpu_relax();
0129 }
0130
0131 static int omap_wdt_start(struct watchdog_device *wdog)
0132 {
0133     struct omap_wdt_dev *wdev = to_omap_wdt_dev(wdog);
0134     void __iomem *base = wdev->base;
0135
0136     mutex_lock(&wdev->lock);
0137
0138     wdev->omap_wdt_users = true;
0139
0140     pm_runtime_get_sync(wdev->dev);
0141
0142     /*
0143      * Make sure the watchdog is disabled. This is unfortunately required
0144      * because writing to various registers with the watchdog running has no
0145      * effect.
0146      */
0147     omap_wdt_disable(wdev);
0148
0149     /* initialize prescaler */
0150     while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x01)
0151         cpu_relax();
0152
0153     writel_relaxed((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
0154     while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x01)
0155         cpu_relax();
0156
0157     omap_wdt_set_timer(wdev, wdog->timeout);
0158     omap_wdt_reload(wdev); /* trigger loading of new timeout value */
0159     omap_wdt_enable(wdev);
0160
0161     mutex_unlock(&wdev->lock);
0162
0163     return 0;
0164 }
0165
0166 static int omap_wdt_stop(struct watchdog_device *wdog)
0167 {
0168     struct omap_wdt_dev *wdev = to_omap_wdt_dev(wdog);
0169
0170     mutex_lock(&wdev->lock);
0171     omap_wdt_disable(wdev);
0172     pm_runtime_put_sync(wdev->dev);
0173     wdev->omap_wdt_users = false;
0174     mutex_unlock(&wdev->lock);
0175     return 0;
0176 }
0177
0178 static int omap_wdt_ping(struct watchdog_device *wdog)
0179 {
0180     struct omap_wdt_dev *wdev = to_omap_wdt_dev(wdog);
0181
0182     mutex_lock(&wdev->lock);
0183     omap_wdt_reload(wdev);
0184     mutex_unlock(&wdev->lock);
0185
0186     return 0;
0187 }
0188
0189 static int omap_wdt_set_timeout(struct watchdog_device *wdog,
0190                 unsigned int timeout)
0191 {
0192     struct omap_wdt_dev *wdev = to_omap_wdt_dev(wdog);
0193
0194     mutex_lock(&wdev->lock);
0195     omap_wdt_disable(wdev);
0196     omap_wdt_set_timer(wdev, timeout);
0197     omap_wdt_enable(wdev);
0198     omap_wdt_reload(wdev);
0199     wdog->timeout = timeout;
0200     mutex_unlock(&wdev->lock);
0201
0202     return 0;
0203 }
0204
0205 static unsigned int omap_wdt_get_timeleft(struct watchdog_device *wdog)
0206 {
0207     struct omap_wdt_dev *wdev = to_omap_wdt_dev(wdog);
0208     void __iomem *base = wdev->base;
0209     u32 value;
0210
0211     value = readl_relaxed(base + OMAP_WATCHDOG_CRR);
0212     return GET_WCCR_SECS(value);
0213 }
0214
0215 static const struct watchdog_info omap_wdt_info = {
0216     .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
0217     .identity = "OMAP Watchdog",
0218 };
0219
0220 static const struct watchdog_ops omap_wdt_ops = {
0221     .owner      = THIS_MODULE,
0222     .start      = omap_wdt_start,
0223     .stop       = omap_wdt_stop,
0224     .ping       = omap_wdt_ping,
0225     .set_timeout    = omap_wdt_set_timeout,
0226     .get_timeleft   = omap_wdt_get_timeleft,
0227 };
0228
0229 static int omap_wdt_probe(struct platform_device *pdev)
0230 {
0231     struct omap_wd_timer_platform_data *pdata = dev_get_platdata(&pdev->dev);
0232     struct omap_wdt_dev *wdev;
0233     int ret;
0234
0235     wdev = devm_kzalloc(&pdev->dev, sizeof(*wdev), GFP_KERNEL);
0236     if (!wdev)
0237         return -ENOMEM;
0238
0239     wdev->omap_wdt_users    = false;
0240     wdev->dev       = &pdev->dev;
0241     wdev->wdt_trgr_pattern  = 0x1234;
0242     mutex_init(&wdev->lock);
0243
0244     /* reserve static register mappings */
0245     wdev->base = devm_platform_ioremap_resource(pdev, 0);
0246     if (IS_ERR(wdev->base))
0247         return PTR_ERR(wdev->base);
0248
0249     wdev->wdog.info = &omap_wdt_info;
0250     wdev->wdog.ops = &omap_wdt_ops;
0251     wdev->wdog.min_timeout = TIMER_MARGIN_MIN;
0252     wdev->wdog.max_timeout = TIMER_MARGIN_MAX;
0253     wdev->wdog.timeout = TIMER_MARGIN_DEFAULT;
0254     wdev->wdog.parent = &pdev->dev;
0255
0256     watchdog_init_timeout(&wdev->wdog, timer_margin, &pdev->dev);
0257
0258     watchdog_set_nowayout(&wdev->wdog, nowayout);
0259
0260     platform_set_drvdata(pdev, wdev);
0261
0262     pm_runtime_enable(wdev->dev);
0263     pm_runtime_get_sync(wdev->dev);
0264
0265     if (pdata && pdata->read_reset_sources) {
0266         u32 rs = pdata->read_reset_sources();
0267         if (rs & (1 << OMAP_MPU_WD_RST_SRC_ID_SHIFT))
0268             wdev->wdog.bootstatus = WDIOF_CARDRESET;
0269     }
0270
0271     if (early_enable) {
0272         omap_wdt_start(&wdev->wdog);
0273         set_bit(WDOG_HW_RUNNING, &wdev->wdog.status);
0274     } else {
0275         omap_wdt_disable(wdev);
0276     }
0277
0278     ret = watchdog_register_device(&wdev->wdog);
0279     if (ret) {
0280         pm_runtime_put(wdev->dev);
0281         pm_runtime_disable(wdev->dev);
0282         return ret;
0283     }
0284
0285     pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
0286         readl_relaxed(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
0287         wdev->wdog.timeout);
0288
0289     if (early_enable)
0290         omap_wdt_start(&wdev->wdog);
0291
0292     pm_runtime_put(wdev->dev);
0293
0294     return 0;
0295 }
0296
0297 static void omap_wdt_shutdown(struct platform_device *pdev)
0298 {
0299     struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
0300
0301     mutex_lock(&wdev->lock);
0302     if (wdev->omap_wdt_users) {
0303         omap_wdt_disable(wdev);
0304         pm_runtime_put_sync(wdev->dev);
0305     }
0306     mutex_unlock(&wdev->lock);
0307 }
0308
0309 static int omap_wdt_remove(struct platform_device *pdev)
0310 {
0311     struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
0312
0313     pm_runtime_disable(wdev->dev);
0314     watchdog_unregister_device(&wdev->wdog);
0315
0316     return 0;
0317 }
0318
0319 #ifdef  CONFIG_PM
0320
0321 /* REVISIT ... not clear this is the best way to handle system suspend; and
0322  * it's very inappropriate for selective device suspend (e.g. suspending this
0323  * through sysfs rather than by stopping the watchdog daemon).  Also, this
0324  * may not play well enough with NOWAYOUT...
0325  */
0326
0327 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
0328 {
0329     struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
0330
0331     mutex_lock(&wdev->lock);
0332     if (wdev->omap_wdt_users) {
0333         omap_wdt_disable(wdev);
0334         pm_runtime_put_sync(wdev->dev);
0335     }
0336     mutex_unlock(&wdev->lock);
0337
0338     return 0;
0339 }
0340
0341 static int omap_wdt_resume(struct platform_device *pdev)
0342 {
0343     struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
0344
0345     mutex_lock(&wdev->lock);
0346     if (wdev->omap_wdt_users) {
0347         pm_runtime_get_sync(wdev->dev);
0348         omap_wdt_enable(wdev);
0349         omap_wdt_reload(wdev);
0350     }
0351     mutex_unlock(&wdev->lock);
0352
0353     return 0;
0354 }
0355
0356 #else
0357 #define omap_wdt_suspend    NULL
0358 #define omap_wdt_resume     NULL
0359 #endif
0360
0361 static const struct of_device_id omap_wdt_of_match[] = {
0362     { .compatible = "ti,omap3-wdt", },
0363     {},
0364 };
0365 MODULE_DEVICE_TABLE(of, omap_wdt_of_match);
0366
0367 static struct platform_driver omap_wdt_driver = {
0368     .probe      = omap_wdt_probe,
0369     .remove     = omap_wdt_remove,
0370     .shutdown   = omap_wdt_shutdown,
0371     .suspend    = omap_wdt_suspend,
0372     .resume     = omap_wdt_resume,
0373     .driver     = {
0374         .name   = "omap_wdt",
0375         .of_match_table = omap_wdt_of_match,
0376     },
0377 };
0378
0379 module_platform_driver(omap_wdt_driver);
0380
0381 MODULE_AUTHOR("George G. Davis");
0382 MODULE_LICENSE("GPL");
0383 MODULE_ALIAS("platform:omap_wdt");