drivers/watchdog/octeon-wdt-nmi.S

0001 /*
0002  * This file is subject to the terms and conditions of the GNU General Public
0003  * License.  See the file "COPYING" in the main directory of this archive
0004  * for more details.
0005  *
0006  * Copyright (C) 2007-2017 Cavium, Inc.
0007  */
0008 #include <asm/asm.h>
0009 #include <asm/regdef.h>
0010
0011 #define CVMSEG_BASE -32768
0012 #define CVMSEG_SIZE 6912
0013 #define SAVE_REG(r) sd $r, CVMSEG_BASE + CVMSEG_SIZE - ((32 - r) * 8)($0)
0014
0015         NESTED(octeon_wdt_nmi_stage2, 0, sp)
0016     .set    push
0017     .set    noreorder
0018     .set    noat
0019     /* Clear Dcache so cvmseg works right. */
0020     cache   1,0($0)
0021     /* Use K0 to do a read/modify/write of CVMMEMCTL */
0022     dmfc0   k0, $11, 7
0023     /* Clear out the size of CVMSEG */
0024     dins    k0, $0, 0, 6
0025     /* Set CVMSEG to its largest value */
0026     ori k0, k0, 0x1c0 | 54
0027     /* Store the CVMMEMCTL value */
0028     dmtc0   k0, $11, 7
0029     /*
0030      * Restore K0 from the debug scratch register, it was saved in
0031      * the boot-vector code.
0032      */
0033     dmfc0   k0, $31
0034
0035     /*
0036      * Save all registers to the top CVMSEG. This shouldn't
0037      * corrupt any state used by the kernel. Also all registers
0038      * should have the value right before the NMI.
0039      */
0040     SAVE_REG(0)
0041     SAVE_REG(1)
0042     SAVE_REG(2)
0043     SAVE_REG(3)
0044     SAVE_REG(4)
0045     SAVE_REG(5)
0046     SAVE_REG(6)
0047     SAVE_REG(7)
0048     SAVE_REG(8)
0049     SAVE_REG(9)
0050     SAVE_REG(10)
0051     SAVE_REG(11)
0052     SAVE_REG(12)
0053     SAVE_REG(13)
0054     SAVE_REG(14)
0055     SAVE_REG(15)
0056     SAVE_REG(16)
0057     SAVE_REG(17)
0058     SAVE_REG(18)
0059     SAVE_REG(19)
0060     SAVE_REG(20)
0061     SAVE_REG(21)
0062     SAVE_REG(22)
0063     SAVE_REG(23)
0064     SAVE_REG(24)
0065     SAVE_REG(25)
0066     SAVE_REG(26)
0067     SAVE_REG(27)
0068     SAVE_REG(28)
0069     SAVE_REG(29)
0070     SAVE_REG(30)
0071     SAVE_REG(31)
0072     /* Write zero to all CVMSEG locations per Core-15169 */
0073     dli a0, CVMSEG_SIZE - (33 * 8)
0074 1:  sd  zero, CVMSEG_BASE(a0)
0075     daddiu  a0, a0, -8
0076     bgez    a0, 1b
0077     nop
0078     /* Set the stack to begin right below the registers */
0079     dli sp, CVMSEG_BASE + CVMSEG_SIZE - (32 * 8)
0080     /* Load the address of the third stage handler */
0081     dla $25, octeon_wdt_nmi_stage3
0082     /* Call the third stage handler */
0083     jal $25
0084     /* a0 is the address of the saved registers */
0085      move   a0, sp
0086     /* Loop forvever if we get here. */
0087 2:  b   2b
0088     nop
0089     .set pop
0090     END(octeon_wdt_nmi_stage2)