drivers/watchdog/nv_tco.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  *  nv_tco 0.01:    TCO timer driver for NV chipsets
0004  *
0005  *  (c) Copyright 2005 Google Inc., All Rights Reserved.
0006  *
0007  *  Based off i8xx_tco.c:
0008  *  (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>, All Rights
0009  *  Reserved.
0010  *              https://www.kernelconcepts.de
0011  *
0012  *  TCO timer driver for NV chipsets
0013  *  based on softdog.c by Alan Cox <alan@redhat.com>
0014  */
0015
0016 /*
0017  *  Includes, defines, variables, module parameters, ...
0018  */
0019
0020 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
0021
0022 #include <linux/module.h>
0023 #include <linux/moduleparam.h>
0024 #include <linux/types.h>
0025 #include <linux/miscdevice.h>
0026 #include <linux/watchdog.h>
0027 #include <linux/init.h>
0028 #include <linux/fs.h>
0029 #include <linux/pci.h>
0030 #include <linux/ioport.h>
0031 #include <linux/jiffies.h>
0032 #include <linux/platform_device.h>
0033 #include <linux/uaccess.h>
0034 #include <linux/io.h>
0035
0036 #include "nv_tco.h"
0037
0038 /* Module and version information */
0039 #define TCO_VERSION "0.01"
0040 #define TCO_MODULE_NAME "NV_TCO"
0041 #define TCO_DRIVER_NAME   TCO_MODULE_NAME ", v" TCO_VERSION
0042
0043 /* internal variables */
0044 static unsigned int tcobase;
0045 static DEFINE_SPINLOCK(tco_lock);   /* Guards the hardware */
0046 static unsigned long timer_alive;
0047 static char tco_expect_close;
0048 static struct pci_dev *tco_pci;
0049
0050 /* the watchdog platform device */
0051 static struct platform_device *nv_tco_platform_device;
0052
0053 /* module parameters */
0054 #define WATCHDOG_HEARTBEAT 30   /* 30 sec default heartbeat (2<heartbeat<39) */
0055 static int heartbeat = WATCHDOG_HEARTBEAT;  /* in seconds */
0056 module_param(heartbeat, int, 0);
0057 MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (2<heartbeat<39, "
0058                 "default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
0059
0060 static bool nowayout = WATCHDOG_NOWAYOUT;
0061 module_param(nowayout, bool, 0);
0062 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started"
0063         " (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
0064
0065 /*
0066  * Some TCO specific functions
0067  */
0068 static inline unsigned char seconds_to_ticks(int seconds)
0069 {
0070     /* the internal timer is stored as ticks which decrement
0071      * every 0.6 seconds */
0072     return (seconds * 10) / 6;
0073 }
0074
0075 static void tco_timer_start(void)
0076 {
0077     u32 val;
0078     unsigned long flags;
0079
0080     spin_lock_irqsave(&tco_lock, flags);
0081     val = inl(TCO_CNT(tcobase));
0082     val &= ~TCO_CNT_TCOHALT;
0083     outl(val, TCO_CNT(tcobase));
0084     spin_unlock_irqrestore(&tco_lock, flags);
0085 }
0086
0087 static void tco_timer_stop(void)
0088 {
0089     u32 val;
0090     unsigned long flags;
0091
0092     spin_lock_irqsave(&tco_lock, flags);
0093     val = inl(TCO_CNT(tcobase));
0094     val |= TCO_CNT_TCOHALT;
0095     outl(val, TCO_CNT(tcobase));
0096     spin_unlock_irqrestore(&tco_lock, flags);
0097 }
0098
0099 static void tco_timer_keepalive(void)
0100 {
0101     unsigned long flags;
0102
0103     spin_lock_irqsave(&tco_lock, flags);
0104     outb(0x01, TCO_RLD(tcobase));
0105     spin_unlock_irqrestore(&tco_lock, flags);
0106 }
0107
0108 static int tco_timer_set_heartbeat(int t)
0109 {
0110     int ret = 0;
0111     unsigned char tmrval;
0112     unsigned long flags;
0113     u8 val;
0114
0115     /*
0116      * note seconds_to_ticks(t) > t, so if t > 0x3f, so is
0117      * tmrval=seconds_to_ticks(t).  Check that the count in seconds isn't
0118      * out of range on it's own (to avoid overflow in tmrval).
0119      */
0120     if (t < 0 || t > 0x3f)
0121         return -EINVAL;
0122     tmrval = seconds_to_ticks(t);
0123
0124     /* "Values of 0h-3h are ignored and should not be attempted" */
0125     if (tmrval > 0x3f || tmrval < 0x04)
0126         return -EINVAL;
0127
0128     /* Write new heartbeat to watchdog */
0129     spin_lock_irqsave(&tco_lock, flags);
0130     val = inb(TCO_TMR(tcobase));
0131     val &= 0xc0;
0132     val |= tmrval;
0133     outb(val, TCO_TMR(tcobase));
0134     val = inb(TCO_TMR(tcobase));
0135
0136     if ((val & 0x3f) != tmrval)
0137         ret = -EINVAL;
0138     spin_unlock_irqrestore(&tco_lock, flags);
0139
0140     if (ret)
0141         return ret;
0142
0143     heartbeat = t;
0144     return 0;
0145 }
0146
0147 /*
0148  *  /dev/watchdog handling
0149  */
0150
0151 static int nv_tco_open(struct inode *inode, struct file *file)
0152 {
0153     /* /dev/watchdog can only be opened once */
0154     if (test_and_set_bit(0, &timer_alive))
0155         return -EBUSY;
0156
0157     /* Reload and activate timer */
0158     tco_timer_keepalive();
0159     tco_timer_start();
0160     return stream_open(inode, file);
0161 }
0162
0163 static int nv_tco_release(struct inode *inode, struct file *file)
0164 {
0165     /* Shut off the timer */
0166     if (tco_expect_close == 42) {
0167         tco_timer_stop();
0168     } else {
0169         pr_crit("Unexpected close, not stopping watchdog!\n");
0170         tco_timer_keepalive();
0171     }
0172     clear_bit(0, &timer_alive);
0173     tco_expect_close = 0;
0174     return 0;
0175 }
0176
0177 static ssize_t nv_tco_write(struct file *file, const char __user *data,
0178                 size_t len, loff_t *ppos)
0179 {
0180     /* See if we got the magic character 'V' and reload the timer */
0181     if (len) {
0182         if (!nowayout) {
0183             size_t i;
0184
0185             /*
0186              * note: just in case someone wrote the magic character
0187              * five months ago...
0188              */
0189             tco_expect_close = 0;
0190
0191             /*
0192              * scan to see whether or not we got the magic
0193              * character
0194              */
0195             for (i = 0; i != len; i++) {
0196                 char c;
0197                 if (get_user(c, data + i))
0198                     return -EFAULT;
0199                 if (c == 'V')
0200                     tco_expect_close = 42;
0201             }
0202         }
0203
0204         /* someone wrote to us, we should reload the timer */
0205         tco_timer_keepalive();
0206     }
0207     return len;
0208 }
0209
0210 static long nv_tco_ioctl(struct file *file, unsigned int cmd,
0211              unsigned long arg)
0212 {
0213     int new_options, retval = -EINVAL;
0214     int new_heartbeat;
0215     void __user *argp = (void __user *)arg;
0216     int __user *p = argp;
0217     static const struct watchdog_info ident = {
0218         .options =      WDIOF_SETTIMEOUT |
0219                     WDIOF_KEEPALIVEPING |
0220                     WDIOF_MAGICCLOSE,
0221         .firmware_version = 0,
0222         .identity =     TCO_MODULE_NAME,
0223     };
0224
0225     switch (cmd) {
0226     case WDIOC_GETSUPPORT:
0227         return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
0228     case WDIOC_GETSTATUS:
0229     case WDIOC_GETBOOTSTATUS:
0230         return put_user(0, p);
0231     case WDIOC_SETOPTIONS:
0232         if (get_user(new_options, p))
0233             return -EFAULT;
0234         if (new_options & WDIOS_DISABLECARD) {
0235             tco_timer_stop();
0236             retval = 0;
0237         }
0238         if (new_options & WDIOS_ENABLECARD) {
0239             tco_timer_keepalive();
0240             tco_timer_start();
0241             retval = 0;
0242         }
0243         return retval;
0244     case WDIOC_KEEPALIVE:
0245         tco_timer_keepalive();
0246         return 0;
0247     case WDIOC_SETTIMEOUT:
0248         if (get_user(new_heartbeat, p))
0249             return -EFAULT;
0250         if (tco_timer_set_heartbeat(new_heartbeat))
0251             return -EINVAL;
0252         tco_timer_keepalive();
0253         fallthrough;
0254     case WDIOC_GETTIMEOUT:
0255         return put_user(heartbeat, p);
0256     default:
0257         return -ENOTTY;
0258     }
0259 }
0260
0261 /*
0262  *  Kernel Interfaces
0263  */
0264
0265 static const struct file_operations nv_tco_fops = {
0266     .owner =        THIS_MODULE,
0267     .llseek =       no_llseek,
0268     .write =        nv_tco_write,
0269     .unlocked_ioctl =   nv_tco_ioctl,
0270     .compat_ioctl =     compat_ptr_ioctl,
0271     .open =         nv_tco_open,
0272     .release =      nv_tco_release,
0273 };
0274
0275 static struct miscdevice nv_tco_miscdev = {
0276     .minor =    WATCHDOG_MINOR,
0277     .name =     "watchdog",
0278     .fops =     &nv_tco_fops,
0279 };
0280
0281 /*
0282  * Data for PCI driver interface
0283  *
0284  * This data only exists for exporting the supported
0285  * PCI ids via MODULE_DEVICE_TABLE.  We do not actually
0286  * register a pci_driver, because someone else might one day
0287  * want to register another driver on the same PCI id.
0288  */
0289 static const struct pci_device_id tco_pci_tbl[] = {
0290     { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS,
0291       PCI_ANY_ID, PCI_ANY_ID, },
0292     { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS,
0293       PCI_ANY_ID, PCI_ANY_ID, },
0294     { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP78S_SMBUS,
0295       PCI_ANY_ID, PCI_ANY_ID, },
0296     { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP79_SMBUS,
0297       PCI_ANY_ID, PCI_ANY_ID, },
0298     { 0, },         /* End of list */
0299 };
0300 MODULE_DEVICE_TABLE(pci, tco_pci_tbl);
0301
0302 /*
0303  *  Init & exit routines
0304  */
0305
0306 static unsigned char nv_tco_getdevice(void)
0307 {
0308     struct pci_dev *dev = NULL;
0309     u32 val;
0310
0311     /* Find the PCI device */
0312     for_each_pci_dev(dev) {
0313         if (pci_match_id(tco_pci_tbl, dev) != NULL) {
0314             tco_pci = dev;
0315             break;
0316         }
0317     }
0318
0319     if (!tco_pci)
0320         return 0;
0321
0322     /* Find the base io port */
0323     pci_read_config_dword(tco_pci, 0x64, &val);
0324     val &= 0xffff;
0325     if (val == 0x0001 || val == 0x0000) {
0326         /* Something is wrong here, bar isn't setup */
0327         pr_err("failed to get tcobase address\n");
0328         return 0;
0329     }
0330     val &= 0xff00;
0331     tcobase = val + 0x40;
0332
0333     if (!request_region(tcobase, 0x10, "NV TCO")) {
0334         pr_err("I/O address 0x%04x already in use\n", tcobase);
0335         return 0;
0336     }
0337
0338     /* Set a reasonable heartbeat before we stop the timer */
0339     tco_timer_set_heartbeat(30);
0340
0341     /*
0342      * Stop the TCO before we change anything so we don't race with
0343      * a zeroed timer.
0344      */
0345     tco_timer_keepalive();
0346     tco_timer_stop();
0347
0348     /* Disable SMI caused by TCO */
0349     if (!request_region(MCP51_SMI_EN(tcobase), 4, "NV TCO")) {
0350         pr_err("I/O address 0x%04x already in use\n",
0351                MCP51_SMI_EN(tcobase));
0352         goto out;
0353     }
0354     val = inl(MCP51_SMI_EN(tcobase));
0355     val &= ~MCP51_SMI_EN_TCO;
0356     outl(val, MCP51_SMI_EN(tcobase));
0357     val = inl(MCP51_SMI_EN(tcobase));
0358     release_region(MCP51_SMI_EN(tcobase), 4);
0359     if (val & MCP51_SMI_EN_TCO) {
0360         pr_err("Could not disable SMI caused by TCO\n");
0361         goto out;
0362     }
0363
0364     /* Check chipset's NO_REBOOT bit */
0365     pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);
0366     val |= MCP51_SMBUS_SETUP_B_TCO_REBOOT;
0367     pci_write_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, val);
0368     pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);
0369     if (!(val & MCP51_SMBUS_SETUP_B_TCO_REBOOT)) {
0370         pr_err("failed to reset NO_REBOOT flag, reboot disabled by hardware\n");
0371         goto out;
0372     }
0373
0374     return 1;
0375 out:
0376     release_region(tcobase, 0x10);
0377     return 0;
0378 }
0379
0380 static int nv_tco_init(struct platform_device *dev)
0381 {
0382     int ret;
0383
0384     /* Check whether or not the hardware watchdog is there */
0385     if (!nv_tco_getdevice())
0386         return -ENODEV;
0387
0388     /* Check to see if last reboot was due to watchdog timeout */
0389     pr_info("Watchdog reboot %sdetected\n",
0390         inl(TCO_STS(tcobase)) & TCO_STS_TCO2TO_STS ? "" : "not ");
0391
0392     /* Clear out the old status */
0393     outl(TCO_STS_RESET, TCO_STS(tcobase));
0394
0395     /*
0396      * Check that the heartbeat value is within it's range.
0397      * If not, reset to the default.
0398      */
0399     if (tco_timer_set_heartbeat(heartbeat)) {
0400         heartbeat = WATCHDOG_HEARTBEAT;
0401         tco_timer_set_heartbeat(heartbeat);
0402         pr_info("heartbeat value must be 2<heartbeat<39, using %d\n",
0403             heartbeat);
0404     }
0405
0406     ret = misc_register(&nv_tco_miscdev);
0407     if (ret != 0) {
0408         pr_err("cannot register miscdev on minor=%d (err=%d)\n",
0409                WATCHDOG_MINOR, ret);
0410         goto unreg_region;
0411     }
0412
0413     clear_bit(0, &timer_alive);
0414
0415     tco_timer_stop();
0416
0417     pr_info("initialized (0x%04x). heartbeat=%d sec (nowayout=%d)\n",
0418         tcobase, heartbeat, nowayout);
0419
0420     return 0;
0421
0422 unreg_region:
0423     release_region(tcobase, 0x10);
0424     return ret;
0425 }
0426
0427 static void nv_tco_cleanup(void)
0428 {
0429     u32 val;
0430
0431     /* Stop the timer before we leave */
0432     if (!nowayout)
0433         tco_timer_stop();
0434
0435     /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
0436     pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);
0437     val &= ~MCP51_SMBUS_SETUP_B_TCO_REBOOT;
0438     pci_write_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, val);
0439     pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);
0440     if (val & MCP51_SMBUS_SETUP_B_TCO_REBOOT) {
0441         pr_crit("Couldn't unset REBOOT bit.  Machine may soon reset\n");
0442     }
0443
0444     /* Deregister */
0445     misc_deregister(&nv_tco_miscdev);
0446     release_region(tcobase, 0x10);
0447 }
0448
0449 static int nv_tco_remove(struct platform_device *dev)
0450 {
0451     if (tcobase)
0452         nv_tco_cleanup();
0453
0454     return 0;
0455 }
0456
0457 static void nv_tco_shutdown(struct platform_device *dev)
0458 {
0459     u32 val;
0460
0461     tco_timer_stop();
0462
0463     /* Some BIOSes fail the POST (once) if the NO_REBOOT flag is not
0464      * unset during shutdown. */
0465     pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);
0466     val &= ~MCP51_SMBUS_SETUP_B_TCO_REBOOT;
0467     pci_write_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, val);
0468 }
0469
0470 static struct platform_driver nv_tco_driver = {
0471     .probe      = nv_tco_init,
0472     .remove     = nv_tco_remove,
0473     .shutdown   = nv_tco_shutdown,
0474     .driver     = {
0475         .name   = TCO_MODULE_NAME,
0476     },
0477 };
0478
0479 static int __init nv_tco_init_module(void)
0480 {
0481     int err;
0482
0483     pr_info("NV TCO WatchDog Timer Driver v%s\n", TCO_VERSION);
0484
0485     err = platform_driver_register(&nv_tco_driver);
0486     if (err)
0487         return err;
0488
0489     nv_tco_platform_device = platform_device_register_simple(
0490                     TCO_MODULE_NAME, -1, NULL, 0);
0491     if (IS_ERR(nv_tco_platform_device)) {
0492         err = PTR_ERR(nv_tco_platform_device);
0493         goto unreg_platform_driver;
0494     }
0495
0496     return 0;
0497
0498 unreg_platform_driver:
0499     platform_driver_unregister(&nv_tco_driver);
0500     return err;
0501 }
0502
0503 static void __exit nv_tco_cleanup_module(void)
0504 {
0505     platform_device_unregister(nv_tco_platform_device);
0506     platform_driver_unregister(&nv_tco_driver);
0507     pr_info("NV TCO Watchdog Module Unloaded\n");
0508 }
0509
0510 module_init(nv_tco_init_module);
0511 module_exit(nv_tco_cleanup_module);
0512
0513 MODULE_AUTHOR("Mike Waychison");
0514 MODULE_DESCRIPTION("TCO timer driver for NV chipsets");
0515 MODULE_LICENSE("GPL");