drivers/watchdog/i6300esb.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  *  i6300esb:   Watchdog timer driver for Intel 6300ESB chipset
0004  *
0005  *  (c) Copyright 2004 Google Inc.
0006  *  (c) Copyright 2005 David Härdeman <david@2gen.com>
0007  *
0008  *  based on i810-tco.c which is in turn based on softdog.c
0009  *
0010  *  The timer is implemented in the following I/O controller hubs:
0011  *  (See the intel documentation on http://developer.intel.com.)
0012  *  6300ESB chip : document number 300641-004
0013  *
0014  *  2004YYZZ Ross Biro
0015  *  Initial version 0.01
0016  *  2004YYZZ Ross Biro
0017  *  Version 0.02
0018  *  20050210 David Härdeman <david@2gen.com>
0019  *  Ported driver to kernel 2.6
0020  *  20171016 Radu Rendec <rrendec@arista.com>
0021  *  Change driver to use the watchdog subsystem
0022  *  Add support for multiple 6300ESB devices
0023  */
0024
0025 /*
0026  *      Includes, defines, variables, module parameters, ...
0027  */
0028
0029 #include <linux/module.h>
0030 #include <linux/types.h>
0031 #include <linux/kernel.h>
0032 #include <linux/fs.h>
0033 #include <linux/mm.h>
0034 #include <linux/miscdevice.h>
0035 #include <linux/watchdog.h>
0036 #include <linux/pci.h>
0037 #include <linux/ioport.h>
0038 #include <linux/uaccess.h>
0039 #include <linux/io.h>
0040
0041 /* Module and version information */
0042 #define ESB_MODULE_NAME "i6300ESB timer"
0043
0044 /* PCI configuration registers */
0045 #define ESB_CONFIG_REG  0x60            /* Config register                   */
0046 #define ESB_LOCK_REG    0x68            /* WDT lock register                 */
0047
0048 /* Memory mapped registers */
0049 #define ESB_TIMER1_REG(w) ((w)->base + 0x00)/* Timer1 value after each reset */
0050 #define ESB_TIMER2_REG(w) ((w)->base + 0x04)/* Timer2 value after each reset */
0051 #define ESB_GINTSR_REG(w) ((w)->base + 0x08)/* General Interrupt Status Reg  */
0052 #define ESB_RELOAD_REG(w) ((w)->base + 0x0c)/* Reload register               */
0053
0054 /* Lock register bits */
0055 #define ESB_WDT_FUNC    (0x01 << 2)   /* Watchdog functionality            */
0056 #define ESB_WDT_ENABLE  (0x01 << 1)   /* Enable WDT                        */
0057 #define ESB_WDT_LOCK    (0x01 << 0)   /* Lock (nowayout)                   */
0058
0059 /* Config register bits */
0060 #define ESB_WDT_REBOOT  (0x01 << 5)   /* Enable reboot on timeout          */
0061 #define ESB_WDT_FREQ    (0x01 << 2)   /* Decrement frequency               */
0062 #define ESB_WDT_INTTYPE (0x03 << 0)   /* Interrupt type on timer1 timeout  */
0063
0064 /* Reload register bits */
0065 #define ESB_WDT_TIMEOUT (0x01 << 9)    /* Watchdog timed out                */
0066 #define ESB_WDT_RELOAD  (0x01 << 8)    /* prevent timeout                   */
0067
0068 /* Magic constants */
0069 #define ESB_UNLOCK1     0x80            /* Step 1 to unlock reset registers  */
0070 #define ESB_UNLOCK2     0x86            /* Step 2 to unlock reset registers  */
0071
0072 /* module parameters */
0073 /* 30 sec default heartbeat (1 < heartbeat < 2*1023) */
0074 #define ESB_HEARTBEAT_MIN   1
0075 #define ESB_HEARTBEAT_MAX   2046
0076 #define ESB_HEARTBEAT_DEFAULT   30
0077 #define ESB_HEARTBEAT_RANGE __MODULE_STRING(ESB_HEARTBEAT_MIN) \
0078     "<heartbeat<" __MODULE_STRING(ESB_HEARTBEAT_MAX)
0079 static int heartbeat; /* in seconds */
0080 module_param(heartbeat, int, 0);
0081 MODULE_PARM_DESC(heartbeat,
0082     "Watchdog heartbeat in seconds. (" ESB_HEARTBEAT_RANGE
0083     ", default=" __MODULE_STRING(ESB_HEARTBEAT_DEFAULT) ")");
0084
0085 static bool nowayout = WATCHDOG_NOWAYOUT;
0086 module_param(nowayout, bool, 0);
0087 MODULE_PARM_DESC(nowayout,
0088         "Watchdog cannot be stopped once started (default="
0089                 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
0090
0091 /* internal variables */
0092 struct esb_dev {
0093     struct watchdog_device wdd;
0094     void __iomem *base;
0095     struct pci_dev *pdev;
0096 };
0097
0098 #define to_esb_dev(wptr) container_of(wptr, struct esb_dev, wdd)
0099
0100 /*
0101  * Some i6300ESB specific functions
0102  */
0103
0104 /*
0105  * Prepare for reloading the timer by unlocking the proper registers.
0106  * This is performed by first writing 0x80 followed by 0x86 to the
0107  * reload register. After this the appropriate registers can be written
0108  * to once before they need to be unlocked again.
0109  */
0110 static inline void esb_unlock_registers(struct esb_dev *edev)
0111 {
0112     writew(ESB_UNLOCK1, ESB_RELOAD_REG(edev));
0113     writew(ESB_UNLOCK2, ESB_RELOAD_REG(edev));
0114 }
0115
0116 static int esb_timer_start(struct watchdog_device *wdd)
0117 {
0118     struct esb_dev *edev = to_esb_dev(wdd);
0119     int _wdd_nowayout = test_bit(WDOG_NO_WAY_OUT, &wdd->status);
0120     u8 val;
0121
0122     esb_unlock_registers(edev);
0123     writew(ESB_WDT_RELOAD, ESB_RELOAD_REG(edev));
0124     /* Enable or Enable + Lock? */
0125     val = ESB_WDT_ENABLE | (_wdd_nowayout ? ESB_WDT_LOCK : 0x00);
0126     pci_write_config_byte(edev->pdev, ESB_LOCK_REG, val);
0127     return 0;
0128 }
0129
0130 static int esb_timer_stop(struct watchdog_device *wdd)
0131 {
0132     struct esb_dev *edev = to_esb_dev(wdd);
0133     u8 val;
0134
0135     /* First, reset timers as suggested by the docs */
0136     esb_unlock_registers(edev);
0137     writew(ESB_WDT_RELOAD, ESB_RELOAD_REG(edev));
0138     /* Then disable the WDT */
0139     pci_write_config_byte(edev->pdev, ESB_LOCK_REG, 0x0);
0140     pci_read_config_byte(edev->pdev, ESB_LOCK_REG, &val);
0141
0142     /* Returns 0 if the timer was disabled, non-zero otherwise */
0143     return val & ESB_WDT_ENABLE;
0144 }
0145
0146 static int esb_timer_keepalive(struct watchdog_device *wdd)
0147 {
0148     struct esb_dev *edev = to_esb_dev(wdd);
0149
0150     esb_unlock_registers(edev);
0151     writew(ESB_WDT_RELOAD, ESB_RELOAD_REG(edev));
0152     /* FIXME: Do we need to flush anything here? */
0153     return 0;
0154 }
0155
0156 static int esb_timer_set_heartbeat(struct watchdog_device *wdd,
0157         unsigned int time)
0158 {
0159     struct esb_dev *edev = to_esb_dev(wdd);
0160     u32 val;
0161
0162     /* We shift by 9, so if we are passed a value of 1 sec,
0163      * val will be 1 << 9 = 512, then write that to two
0164      * timers => 2 * 512 = 1024 (which is decremented at 1KHz)
0165      */
0166     val = time << 9;
0167
0168     /* Write timer 1 */
0169     esb_unlock_registers(edev);
0170     writel(val, ESB_TIMER1_REG(edev));
0171
0172     /* Write timer 2 */
0173     esb_unlock_registers(edev);
0174     writel(val, ESB_TIMER2_REG(edev));
0175
0176     /* Reload */
0177     esb_unlock_registers(edev);
0178     writew(ESB_WDT_RELOAD, ESB_RELOAD_REG(edev));
0179
0180     /* FIXME: Do we need to flush everything out? */
0181
0182     /* Done */
0183     wdd->timeout = time;
0184     return 0;
0185 }
0186
0187 /*
0188  * Watchdog Subsystem Interfaces
0189  */
0190
0191 static struct watchdog_info esb_info = {
0192     .identity = ESB_MODULE_NAME,
0193     .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
0194 };
0195
0196 static const struct watchdog_ops esb_ops = {
0197     .owner = THIS_MODULE,
0198     .start = esb_timer_start,
0199     .stop = esb_timer_stop,
0200     .set_timeout = esb_timer_set_heartbeat,
0201     .ping = esb_timer_keepalive,
0202 };
0203
0204 /*
0205  * Data for PCI driver interface
0206  */
0207 static const struct pci_device_id esb_pci_tbl[] = {
0208     { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_9), },
0209     { 0, },                 /* End of list */
0210 };
0211 MODULE_DEVICE_TABLE(pci, esb_pci_tbl);
0212
0213 /*
0214  *      Init & exit routines
0215  */
0216
0217 static unsigned char esb_getdevice(struct esb_dev *edev)
0218 {
0219     if (pci_enable_device(edev->pdev)) {
0220         dev_err(&edev->pdev->dev, "failed to enable device\n");
0221         goto err_devput;
0222     }
0223
0224     if (pci_request_region(edev->pdev, 0, ESB_MODULE_NAME)) {
0225         dev_err(&edev->pdev->dev, "failed to request region\n");
0226         goto err_disable;
0227     }
0228
0229     edev->base = pci_ioremap_bar(edev->pdev, 0);
0230     if (edev->base == NULL) {
0231         /* Something's wrong here, BASEADDR has to be set */
0232         dev_err(&edev->pdev->dev, "failed to get BASEADDR\n");
0233         goto err_release;
0234     }
0235
0236     /* Done */
0237     dev_set_drvdata(&edev->pdev->dev, edev);
0238     return 1;
0239
0240 err_release:
0241     pci_release_region(edev->pdev, 0);
0242 err_disable:
0243     pci_disable_device(edev->pdev);
0244 err_devput:
0245     return 0;
0246 }
0247
0248 static void esb_initdevice(struct esb_dev *edev)
0249 {
0250     u8 val1;
0251     u16 val2;
0252
0253     /*
0254      * Config register:
0255      * Bit    5 : 0 = Enable WDT_OUTPUT
0256      * Bit    2 : 0 = set the timer frequency to the PCI clock
0257      * divided by 2^15 (approx 1KHz).
0258      * Bits 1:0 : 11 = WDT_INT_TYPE Disabled.
0259      * The watchdog has two timers, it can be setup so that the
0260      * expiry of timer1 results in an interrupt and the expiry of
0261      * timer2 results in a reboot. We set it to not generate
0262      * any interrupts as there is not much we can do with it
0263      * right now.
0264      */
0265     pci_write_config_word(edev->pdev, ESB_CONFIG_REG, 0x0003);
0266
0267     /* Check that the WDT isn't already locked */
0268     pci_read_config_byte(edev->pdev, ESB_LOCK_REG, &val1);
0269     if (val1 & ESB_WDT_LOCK)
0270         dev_warn(&edev->pdev->dev, "nowayout already set\n");
0271
0272     /* Set the timer to watchdog mode and disable it for now */
0273     pci_write_config_byte(edev->pdev, ESB_LOCK_REG, 0x00);
0274
0275     /* Check if the watchdog was previously triggered */
0276     esb_unlock_registers(edev);
0277     val2 = readw(ESB_RELOAD_REG(edev));
0278     if (val2 & ESB_WDT_TIMEOUT)
0279         edev->wdd.bootstatus = WDIOF_CARDRESET;
0280
0281     /* Reset WDT_TIMEOUT flag and timers */
0282     esb_unlock_registers(edev);
0283     writew((ESB_WDT_TIMEOUT | ESB_WDT_RELOAD), ESB_RELOAD_REG(edev));
0284
0285     /* And set the correct timeout value */
0286     esb_timer_set_heartbeat(&edev->wdd, edev->wdd.timeout);
0287 }
0288
0289 static int esb_probe(struct pci_dev *pdev,
0290         const struct pci_device_id *ent)
0291 {
0292     struct esb_dev *edev;
0293     int ret;
0294
0295     edev = devm_kzalloc(&pdev->dev, sizeof(*edev), GFP_KERNEL);
0296     if (!edev)
0297         return -ENOMEM;
0298
0299     /* Check whether or not the hardware watchdog is there */
0300     edev->pdev = pdev;
0301     if (!esb_getdevice(edev))
0302         return -ENODEV;
0303
0304     /* Initialize the watchdog and make sure it does not run */
0305     edev->wdd.info = &esb_info;
0306     edev->wdd.ops = &esb_ops;
0307     edev->wdd.min_timeout = ESB_HEARTBEAT_MIN;
0308     edev->wdd.max_timeout = ESB_HEARTBEAT_MAX;
0309     edev->wdd.timeout = ESB_HEARTBEAT_DEFAULT;
0310     watchdog_init_timeout(&edev->wdd, heartbeat, NULL);
0311     watchdog_set_nowayout(&edev->wdd, nowayout);
0312     watchdog_stop_on_reboot(&edev->wdd);
0313     watchdog_stop_on_unregister(&edev->wdd);
0314     esb_initdevice(edev);
0315
0316     /* Register the watchdog so that userspace has access to it */
0317     ret = watchdog_register_device(&edev->wdd);
0318     if (ret != 0)
0319         goto err_unmap;
0320     dev_info(&pdev->dev,
0321         "initialized. heartbeat=%d sec (nowayout=%d)\n",
0322         edev->wdd.timeout, nowayout);
0323     return 0;
0324
0325 err_unmap:
0326     iounmap(edev->base);
0327     pci_release_region(edev->pdev, 0);
0328     pci_disable_device(edev->pdev);
0329     return ret;
0330 }
0331
0332 static void esb_remove(struct pci_dev *pdev)
0333 {
0334     struct esb_dev *edev = dev_get_drvdata(&pdev->dev);
0335
0336     watchdog_unregister_device(&edev->wdd);
0337     iounmap(edev->base);
0338     pci_release_region(edev->pdev, 0);
0339     pci_disable_device(edev->pdev);
0340 }
0341
0342 static struct pci_driver esb_driver = {
0343     .name       = ESB_MODULE_NAME,
0344     .id_table   = esb_pci_tbl,
0345     .probe          = esb_probe,
0346     .remove         = esb_remove,
0347 };
0348
0349 module_pci_driver(esb_driver);
0350
0351 MODULE_AUTHOR("Ross Biro and David Härdeman");
0352 MODULE_DESCRIPTION("Watchdog driver for Intel 6300ESB chipsets");
0353 MODULE_LICENSE("GPL");