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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Copyright (c) 2004 Evgeniy Polyakov <zbr@ioremap.net>
0004  */
0005 
0006 #include <asm/io.h>
0007 
0008 #include <linux/delay.h>
0009 #include <linux/moduleparam.h>
0010 #include <linux/module.h>
0011 
0012 #include "w1_internal.h"
0013 
0014 static int w1_delay_parm = 1;
0015 module_param_named(delay_coef, w1_delay_parm, int, 0);
0016 
0017 static int w1_disable_irqs = 0;
0018 module_param_named(disable_irqs, w1_disable_irqs, int, 0);
0019 
0020 static u8 w1_crc8_table[] = {
0021     0, 94, 188, 226, 97, 63, 221, 131, 194, 156, 126, 32, 163, 253, 31, 65,
0022     157, 195, 33, 127, 252, 162, 64, 30, 95, 1, 227, 189, 62, 96, 130, 220,
0023     35, 125, 159, 193, 66, 28, 254, 160, 225, 191, 93, 3, 128, 222, 60, 98,
0024     190, 224, 2, 92, 223, 129, 99, 61, 124, 34, 192, 158, 29, 67, 161, 255,
0025     70, 24, 250, 164, 39, 121, 155, 197, 132, 218, 56, 102, 229, 187, 89, 7,
0026     219, 133, 103, 57, 186, 228, 6, 88, 25, 71, 165, 251, 120, 38, 196, 154,
0027     101, 59, 217, 135, 4, 90, 184, 230, 167, 249, 27, 69, 198, 152, 122, 36,
0028     248, 166, 68, 26, 153, 199, 37, 123, 58, 100, 134, 216, 91, 5, 231, 185,
0029     140, 210, 48, 110, 237, 179, 81, 15, 78, 16, 242, 172, 47, 113, 147, 205,
0030     17, 79, 173, 243, 112, 46, 204, 146, 211, 141, 111, 49, 178, 236, 14, 80,
0031     175, 241, 19, 77, 206, 144, 114, 44, 109, 51, 209, 143, 12, 82, 176, 238,
0032     50, 108, 142, 208, 83, 13, 239, 177, 240, 174, 76, 18, 145, 207, 45, 115,
0033     202, 148, 118, 40, 171, 245, 23, 73, 8, 86, 180, 234, 105, 55, 213, 139,
0034     87, 9, 235, 181, 54, 104, 138, 212, 149, 203, 41, 119, 244, 170, 72, 22,
0035     233, 183, 85, 11, 136, 214, 52, 106, 43, 117, 151, 201, 74, 20, 246, 168,
0036     116, 42, 200, 150, 21, 75, 169, 247, 182, 232, 10, 84, 215, 137, 107, 53
0037 };
0038 
0039 static void w1_delay(unsigned long tm)
0040 {
0041     udelay(tm * w1_delay_parm);
0042 }
0043 
0044 static void w1_write_bit(struct w1_master *dev, int bit);
0045 static u8 w1_read_bit(struct w1_master *dev);
0046 
0047 /**
0048  * w1_touch_bit() - Generates a write-0 or write-1 cycle and samples the level.
0049  * @dev:    the master device
0050  * @bit:    0 - write a 0, 1 - write a 0 read the level
0051  */
0052 u8 w1_touch_bit(struct w1_master *dev, int bit)
0053 {
0054     if (dev->bus_master->touch_bit)
0055         return dev->bus_master->touch_bit(dev->bus_master->data, bit);
0056     else if (bit)
0057         return w1_read_bit(dev);
0058     else {
0059         w1_write_bit(dev, 0);
0060         return 0;
0061     }
0062 }
0063 EXPORT_SYMBOL_GPL(w1_touch_bit);
0064 
0065 /**
0066  * w1_write_bit() - Generates a write-0 or write-1 cycle.
0067  * @dev:    the master device
0068  * @bit:    bit to write
0069  *
0070  * Only call if dev->bus_master->touch_bit is NULL
0071  */
0072 static void w1_write_bit(struct w1_master *dev, int bit)
0073 {
0074     unsigned long flags = 0;
0075 
0076     if(w1_disable_irqs) local_irq_save(flags);
0077 
0078     if (bit) {
0079         dev->bus_master->write_bit(dev->bus_master->data, 0);
0080         w1_delay(6);
0081         dev->bus_master->write_bit(dev->bus_master->data, 1);
0082         w1_delay(64);
0083     } else {
0084         dev->bus_master->write_bit(dev->bus_master->data, 0);
0085         w1_delay(60);
0086         dev->bus_master->write_bit(dev->bus_master->data, 1);
0087         w1_delay(10);
0088     }
0089 
0090     if(w1_disable_irqs) local_irq_restore(flags);
0091 }
0092 
0093 /**
0094  * w1_pre_write() - pre-write operations
0095  * @dev:    the master device
0096  *
0097  * Pre-write operation, currently only supporting strong pullups.
0098  * Program the hardware for a strong pullup, if one has been requested and
0099  * the hardware supports it.
0100  */
0101 static void w1_pre_write(struct w1_master *dev)
0102 {
0103     if (dev->pullup_duration &&
0104         dev->enable_pullup && dev->bus_master->set_pullup) {
0105         dev->bus_master->set_pullup(dev->bus_master->data,
0106             dev->pullup_duration);
0107     }
0108 }
0109 
0110 /**
0111  * w1_post_write() - post-write options
0112  * @dev:    the master device
0113  *
0114  * Post-write operation, currently only supporting strong pullups.
0115  * If a strong pullup was requested, clear it if the hardware supports
0116  * them, or execute the delay otherwise, in either case clear the request.
0117  */
0118 static void w1_post_write(struct w1_master *dev)
0119 {
0120     if (dev->pullup_duration) {
0121         if (dev->enable_pullup && dev->bus_master->set_pullup)
0122             dev->bus_master->set_pullup(dev->bus_master->data, 0);
0123         else
0124             msleep(dev->pullup_duration);
0125         dev->pullup_duration = 0;
0126     }
0127 }
0128 
0129 /**
0130  * w1_write_8() - Writes 8 bits.
0131  * @dev:    the master device
0132  * @byte:   the byte to write
0133  */
0134 void w1_write_8(struct w1_master *dev, u8 byte)
0135 {
0136     int i;
0137 
0138     if (dev->bus_master->write_byte) {
0139         w1_pre_write(dev);
0140         dev->bus_master->write_byte(dev->bus_master->data, byte);
0141     }
0142     else
0143         for (i = 0; i < 8; ++i) {
0144             if (i == 7)
0145                 w1_pre_write(dev);
0146             w1_touch_bit(dev, (byte >> i) & 0x1);
0147         }
0148     w1_post_write(dev);
0149 }
0150 EXPORT_SYMBOL_GPL(w1_write_8);
0151 
0152 
0153 /**
0154  * w1_read_bit() - Generates a write-1 cycle and samples the level.
0155  * @dev:    the master device
0156  *
0157  * Only call if dev->bus_master->touch_bit is NULL
0158  */
0159 static u8 w1_read_bit(struct w1_master *dev)
0160 {
0161     int result;
0162     unsigned long flags = 0;
0163 
0164     /* sample timing is critical here */
0165     local_irq_save(flags);
0166     dev->bus_master->write_bit(dev->bus_master->data, 0);
0167     w1_delay(6);
0168     dev->bus_master->write_bit(dev->bus_master->data, 1);
0169     w1_delay(9);
0170 
0171     result = dev->bus_master->read_bit(dev->bus_master->data);
0172     local_irq_restore(flags);
0173 
0174     w1_delay(55);
0175 
0176     return result & 0x1;
0177 }
0178 
0179 /**
0180  * w1_triplet() - * Does a triplet - used for searching ROM addresses.
0181  * @dev:    the master device
0182  * @bdir:   the bit to write if both id_bit and comp_bit are 0
0183  *
0184  * Return bits:
0185  *  bit 0 = id_bit
0186  *  bit 1 = comp_bit
0187  *  bit 2 = dir_taken
0188  *
0189  * If both bits 0 & 1 are set, the search should be restarted.
0190  *
0191  * Return:        bit fields - see above
0192  */
0193 u8 w1_triplet(struct w1_master *dev, int bdir)
0194 {
0195     if (dev->bus_master->triplet)
0196         return dev->bus_master->triplet(dev->bus_master->data, bdir);
0197     else {
0198         u8 id_bit   = w1_touch_bit(dev, 1);
0199         u8 comp_bit = w1_touch_bit(dev, 1);
0200         u8 retval;
0201 
0202         if (id_bit && comp_bit)
0203             return 0x03;  /* error */
0204 
0205         if (!id_bit && !comp_bit) {
0206             /* Both bits are valid, take the direction given */
0207             retval = bdir ? 0x04 : 0;
0208         } else {
0209             /* Only one bit is valid, take that direction */
0210             bdir = id_bit;
0211             retval = id_bit ? 0x05 : 0x02;
0212         }
0213 
0214         if (dev->bus_master->touch_bit)
0215             w1_touch_bit(dev, bdir);
0216         else
0217             w1_write_bit(dev, bdir);
0218         return retval;
0219     }
0220 }
0221 EXPORT_SYMBOL_GPL(w1_triplet);
0222 
0223 /**
0224  * w1_read_8() - Reads 8 bits.
0225  * @dev:    the master device
0226  *
0227  * Return:        the byte read
0228  */
0229 u8 w1_read_8(struct w1_master *dev)
0230 {
0231     int i;
0232     u8 res = 0;
0233 
0234     if (dev->bus_master->read_byte)
0235         res = dev->bus_master->read_byte(dev->bus_master->data);
0236     else
0237         for (i = 0; i < 8; ++i)
0238             res |= (w1_touch_bit(dev,1) << i);
0239 
0240     return res;
0241 }
0242 EXPORT_SYMBOL_GPL(w1_read_8);
0243 
0244 /**
0245  * w1_write_block() - Writes a series of bytes.
0246  * @dev:    the master device
0247  * @buf:    pointer to the data to write
0248  * @len:    the number of bytes to write
0249  */
0250 void w1_write_block(struct w1_master *dev, const u8 *buf, int len)
0251 {
0252     int i;
0253 
0254     if (dev->bus_master->write_block) {
0255         w1_pre_write(dev);
0256         dev->bus_master->write_block(dev->bus_master->data, buf, len);
0257     }
0258     else
0259         for (i = 0; i < len; ++i)
0260             w1_write_8(dev, buf[i]); /* calls w1_pre_write */
0261     w1_post_write(dev);
0262 }
0263 EXPORT_SYMBOL_GPL(w1_write_block);
0264 
0265 /**
0266  * w1_touch_block() - Touches a series of bytes.
0267  * @dev:    the master device
0268  * @buf:    pointer to the data to write
0269  * @len:    the number of bytes to write
0270  */
0271 void w1_touch_block(struct w1_master *dev, u8 *buf, int len)
0272 {
0273     int i, j;
0274     u8 tmp;
0275 
0276     for (i = 0; i < len; ++i) {
0277         tmp = 0;
0278         for (j = 0; j < 8; ++j) {
0279             if (j == 7)
0280                 w1_pre_write(dev);
0281             tmp |= w1_touch_bit(dev, (buf[i] >> j) & 0x1) << j;
0282         }
0283 
0284         buf[i] = tmp;
0285     }
0286 }
0287 EXPORT_SYMBOL_GPL(w1_touch_block);
0288 
0289 /**
0290  * w1_read_block() - Reads a series of bytes.
0291  * @dev:    the master device
0292  * @buf:    pointer to the buffer to fill
0293  * @len:    the number of bytes to read
0294  * Return:  the number of bytes read
0295  */
0296 u8 w1_read_block(struct w1_master *dev, u8 *buf, int len)
0297 {
0298     int i;
0299     u8 ret;
0300 
0301     if (dev->bus_master->read_block)
0302         ret = dev->bus_master->read_block(dev->bus_master->data, buf, len);
0303     else {
0304         for (i = 0; i < len; ++i)
0305             buf[i] = w1_read_8(dev);
0306         ret = len;
0307     }
0308 
0309     return ret;
0310 }
0311 EXPORT_SYMBOL_GPL(w1_read_block);
0312 
0313 /**
0314  * w1_reset_bus() - Issues a reset bus sequence.
0315  * @dev:    the master device
0316  * Return:  0=Device present, 1=No device present or error
0317  */
0318 int w1_reset_bus(struct w1_master *dev)
0319 {
0320     int result;
0321     unsigned long flags = 0;
0322 
0323     if(w1_disable_irqs) local_irq_save(flags);
0324 
0325     if (dev->bus_master->reset_bus)
0326         result = dev->bus_master->reset_bus(dev->bus_master->data) & 0x1;
0327     else {
0328         dev->bus_master->write_bit(dev->bus_master->data, 0);
0329         /* minimum 480, max ? us
0330          * be nice and sleep, except 18b20 spec lists 960us maximum,
0331          * so until we can sleep with microsecond accuracy, spin.
0332          * Feel free to come up with some other way to give up the
0333          * cpu for such a short amount of time AND get it back in
0334          * the maximum amount of time.
0335          */
0336         w1_delay(500);
0337         dev->bus_master->write_bit(dev->bus_master->data, 1);
0338         w1_delay(70);
0339 
0340         result = dev->bus_master->read_bit(dev->bus_master->data) & 0x1;
0341         /* minimum 70 (above) + 430 = 500 us
0342          * There aren't any timing requirements between a reset and
0343          * the following transactions.  Sleeping is safe here.
0344          */
0345         /* w1_delay(430); min required time */
0346         msleep(1);
0347     }
0348 
0349     if(w1_disable_irqs) local_irq_restore(flags);
0350 
0351     return result;
0352 }
0353 EXPORT_SYMBOL_GPL(w1_reset_bus);
0354 
0355 u8 w1_calc_crc8(u8 * data, int len)
0356 {
0357     u8 crc = 0;
0358 
0359     while (len--)
0360         crc = w1_crc8_table[crc ^ *data++];
0361 
0362     return crc;
0363 }
0364 EXPORT_SYMBOL_GPL(w1_calc_crc8);
0365 
0366 void w1_search_devices(struct w1_master *dev, u8 search_type, w1_slave_found_callback cb)
0367 {
0368     dev->attempts++;
0369     if (dev->bus_master->search)
0370         dev->bus_master->search(dev->bus_master->data, dev,
0371             search_type, cb);
0372     else
0373         w1_search(dev, search_type, cb);
0374 }
0375 
0376 /**
0377  * w1_reset_select_slave() - reset and select a slave
0378  * @sl:     the slave to select
0379  *
0380  * Resets the bus and then selects the slave by sending either a skip rom
0381  * or a rom match.  A skip rom is issued if there is only one device
0382  * registered on the bus.
0383  * The w1 master lock must be held.
0384  *
0385  * Return:  0=success, anything else=error
0386  */
0387 int w1_reset_select_slave(struct w1_slave *sl)
0388 {
0389     if (w1_reset_bus(sl->master))
0390         return -1;
0391 
0392     if (sl->master->slave_count == 1)
0393         w1_write_8(sl->master, W1_SKIP_ROM);
0394     else {
0395         u8 match[9] = {W1_MATCH_ROM, };
0396         u64 rn = le64_to_cpu(*((u64*)&sl->reg_num));
0397 
0398         memcpy(&match[1], &rn, 8);
0399         w1_write_block(sl->master, match, 9);
0400     }
0401     return 0;
0402 }
0403 EXPORT_SYMBOL_GPL(w1_reset_select_slave);
0404 
0405 /**
0406  * w1_reset_resume_command() - resume instead of another match ROM
0407  * @dev:    the master device
0408  *
0409  * When the workflow with a slave amongst many requires several
0410  * successive commands a reset between each, this function is similar
0411  * to doing a reset then a match ROM for the last matched ROM. The
0412  * advantage being that the matched ROM step is skipped in favor of the
0413  * resume command. The slave must support the command of course.
0414  *
0415  * If the bus has only one slave, traditionnaly the match ROM is skipped
0416  * and a "SKIP ROM" is done for efficiency. On multi-slave busses, this
0417  * doesn't work of course, but the resume command is the next best thing.
0418  *
0419  * The w1 master lock must be held.
0420  */
0421 int w1_reset_resume_command(struct w1_master *dev)
0422 {
0423     if (w1_reset_bus(dev))
0424         return -1;
0425 
0426     w1_write_8(dev, dev->slave_count > 1 ? W1_RESUME_CMD : W1_SKIP_ROM);
0427     return 0;
0428 }
0429 EXPORT_SYMBOL_GPL(w1_reset_resume_command);
0430 
0431 /**
0432  * w1_next_pullup() - register for a strong pullup
0433  * @dev:    the master device
0434  * @delay:  time in milliseconds
0435  *
0436  * Put out a strong pull-up of the specified duration after the next write
0437  * operation.  Not all hardware supports strong pullups.  Hardware that
0438  * doesn't support strong pullups will sleep for the given time after the
0439  * write operation without a strong pullup.  This is a one shot request for
0440  * the next write, specifying zero will clear a previous request.
0441  * The w1 master lock must be held.
0442  *
0443  * Return:  0=success, anything else=error
0444  */
0445 void w1_next_pullup(struct w1_master *dev, int delay)
0446 {
0447     dev->pullup_duration = delay;
0448 }
0449 EXPORT_SYMBOL_GPL(w1_next_pullup);
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