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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  *  w1_ds28e17.c - w1 family 19 (DS28E17) driver
0004  *
0005  * Copyright (c) 2016 Jan Kandziora <jjj@gmx.de>
0006  */
0007 
0008 #include <linux/crc16.h>
0009 #include <linux/delay.h>
0010 #include <linux/device.h>
0011 #include <linux/i2c.h>
0012 #include <linux/kernel.h>
0013 #include <linux/module.h>
0014 #include <linux/moduleparam.h>
0015 #include <linux/slab.h>
0016 #include <linux/types.h>
0017 #include <linux/uaccess.h>
0018 
0019 #define CRC16_INIT 0
0020 
0021 #include <linux/w1.h>
0022 
0023 #define W1_FAMILY_DS28E17 0x19
0024 
0025 /* Module setup. */
0026 MODULE_LICENSE("GPL v2");
0027 MODULE_AUTHOR("Jan Kandziora <jjj@gmx.de>");
0028 MODULE_DESCRIPTION("w1 family 19 driver for DS28E17, 1-wire to I2C master bridge");
0029 MODULE_ALIAS("w1-family-" __stringify(W1_FAMILY_DS28E17));
0030 
0031 
0032 /* Default I2C speed to be set when a DS28E17 is detected. */
0033 static int i2c_speed = 100;
0034 module_param_named(speed, i2c_speed, int, (S_IRUSR | S_IWUSR));
0035 MODULE_PARM_DESC(speed, "Default I2C speed to be set when a DS28E17 is detected");
0036 
0037 /* Default I2C stretch value to be set when a DS28E17 is detected. */
0038 static char i2c_stretch = 1;
0039 module_param_named(stretch, i2c_stretch, byte, (S_IRUSR | S_IWUSR));
0040 MODULE_PARM_DESC(stretch, "Default I2C stretch value to be set when a DS28E17 is detected");
0041 
0042 /* DS28E17 device command codes. */
0043 #define W1_F19_WRITE_DATA_WITH_STOP      0x4B
0044 #define W1_F19_WRITE_DATA_NO_STOP        0x5A
0045 #define W1_F19_WRITE_DATA_ONLY           0x69
0046 #define W1_F19_WRITE_DATA_ONLY_WITH_STOP 0x78
0047 #define W1_F19_READ_DATA_WITH_STOP       0x87
0048 #define W1_F19_WRITE_READ_DATA_WITH_STOP 0x2D
0049 #define W1_F19_WRITE_CONFIGURATION       0xD2
0050 #define W1_F19_READ_CONFIGURATION        0xE1
0051 #define W1_F19_ENABLE_SLEEP_MODE         0x1E
0052 #define W1_F19_READ_DEVICE_REVISION      0xC4
0053 
0054 /* DS28E17 status bits */
0055 #define W1_F19_STATUS_CRC     0x01
0056 #define W1_F19_STATUS_ADDRESS 0x02
0057 #define W1_F19_STATUS_START   0x08
0058 
0059 /*
0060  * Maximum number of I2C bytes to transfer within one CRC16 protected onewire
0061  * command.
0062  * */
0063 #define W1_F19_WRITE_DATA_LIMIT 255
0064 
0065 /* Maximum number of I2C bytes to read with one onewire command. */
0066 #define W1_F19_READ_DATA_LIMIT 255
0067 
0068 /* Constants for calculating the busy sleep. */
0069 #define W1_F19_BUSY_TIMEBASES { 90, 23, 10 }
0070 #define W1_F19_BUSY_GRATUITY  1000
0071 
0072 /* Number of checks for the busy flag before timeout. */
0073 #define W1_F19_BUSY_CHECKS 1000
0074 
0075 
0076 /* Slave specific data. */
0077 struct w1_f19_data {
0078     u8 speed;
0079     u8 stretch;
0080     struct i2c_adapter adapter;
0081 };
0082 
0083 
0084 /* Wait a while until the busy flag clears. */
0085 static int w1_f19_i2c_busy_wait(struct w1_slave *sl, size_t count)
0086 {
0087     const unsigned long timebases[3] = W1_F19_BUSY_TIMEBASES;
0088     struct w1_f19_data *data = sl->family_data;
0089     unsigned int checks;
0090 
0091     /* Check the busy flag first in any case.*/
0092     if (w1_touch_bit(sl->master, 1) == 0)
0093         return 0;
0094 
0095     /*
0096      * Do a generously long sleep in the beginning,
0097      * as we have to wait at least this time for all
0098      * the I2C bytes at the given speed to be transferred.
0099      */
0100     usleep_range(timebases[data->speed] * (data->stretch) * count,
0101         timebases[data->speed] * (data->stretch) * count
0102         + W1_F19_BUSY_GRATUITY);
0103 
0104     /* Now continusly check the busy flag sent by the DS28E17. */
0105     checks = W1_F19_BUSY_CHECKS;
0106     while ((checks--) > 0) {
0107         /* Return success if the busy flag is cleared. */
0108         if (w1_touch_bit(sl->master, 1) == 0)
0109             return 0;
0110 
0111         /* Wait one non-streched byte timeslot. */
0112         udelay(timebases[data->speed]);
0113     }
0114 
0115     /* Timeout. */
0116     dev_warn(&sl->dev, "busy timeout\n");
0117     return -ETIMEDOUT;
0118 }
0119 
0120 
0121 /* Utility function: result. */
0122 static size_t w1_f19_error(struct w1_slave *sl, u8 w1_buf[])
0123 {
0124     /* Warnings. */
0125     if (w1_buf[0] & W1_F19_STATUS_CRC)
0126         dev_warn(&sl->dev, "crc16 mismatch\n");
0127     if (w1_buf[0] & W1_F19_STATUS_ADDRESS)
0128         dev_warn(&sl->dev, "i2c device not responding\n");
0129     if ((w1_buf[0] & (W1_F19_STATUS_CRC | W1_F19_STATUS_ADDRESS)) == 0
0130             && w1_buf[1] != 0) {
0131         dev_warn(&sl->dev, "i2c short write, %d bytes not acknowledged\n",
0132             w1_buf[1]);
0133     }
0134 
0135     /* Check error conditions. */
0136     if (w1_buf[0] & W1_F19_STATUS_ADDRESS)
0137         return -ENXIO;
0138     if (w1_buf[0] & W1_F19_STATUS_START)
0139         return -EAGAIN;
0140     if (w1_buf[0] != 0 || w1_buf[1] != 0)
0141         return -EIO;
0142 
0143     /* All ok. */
0144     return 0;
0145 }
0146 
0147 
0148 /* Utility function: write data to I2C slave, single chunk. */
0149 static int __w1_f19_i2c_write(struct w1_slave *sl,
0150     const u8 *command, size_t command_count,
0151     const u8 *buffer, size_t count)
0152 {
0153     u16 crc;
0154     int error;
0155     u8 w1_buf[2];
0156 
0157     /* Send command and I2C data to DS28E17. */
0158     crc = crc16(CRC16_INIT, command, command_count);
0159     w1_write_block(sl->master, command, command_count);
0160 
0161     w1_buf[0] = count;
0162     crc = crc16(crc, w1_buf, 1);
0163     w1_write_8(sl->master, w1_buf[0]);
0164 
0165     crc = crc16(crc, buffer, count);
0166     w1_write_block(sl->master, buffer, count);
0167 
0168     w1_buf[0] = ~(crc & 0xFF);
0169     w1_buf[1] = ~((crc >> 8) & 0xFF);
0170     w1_write_block(sl->master, w1_buf, 2);
0171 
0172     /* Wait until busy flag clears (or timeout). */
0173     if (w1_f19_i2c_busy_wait(sl, count + 1) < 0)
0174         return -ETIMEDOUT;
0175 
0176     /* Read status from DS28E17. */
0177     w1_read_block(sl->master, w1_buf, 2);
0178 
0179     /* Check error conditions. */
0180     error = w1_f19_error(sl, w1_buf);
0181     if (error < 0)
0182         return error;
0183 
0184     /* Return number of bytes written. */
0185     return count;
0186 }
0187 
0188 
0189 /* Write data to I2C slave. */
0190 static int w1_f19_i2c_write(struct w1_slave *sl, u16 i2c_address,
0191     const u8 *buffer, size_t count, bool stop)
0192 {
0193     int result;
0194     int remaining = count;
0195     const u8 *p;
0196     u8 command[2];
0197 
0198     /* Check input. */
0199     if (count == 0)
0200         return -EOPNOTSUPP;
0201 
0202     /* Check whether we need multiple commands. */
0203     if (count <= W1_F19_WRITE_DATA_LIMIT) {
0204         /*
0205          * Small data amount. Data can be sent with
0206          * a single onewire command.
0207          */
0208 
0209         /* Send all data to DS28E17. */
0210         command[0] = (stop ? W1_F19_WRITE_DATA_WITH_STOP
0211             : W1_F19_WRITE_DATA_NO_STOP);
0212         command[1] = i2c_address << 1;
0213         result = __w1_f19_i2c_write(sl, command, 2, buffer, count);
0214     } else {
0215         /* Large data amount. Data has to be sent in multiple chunks. */
0216 
0217         /* Send first chunk to DS28E17. */
0218         p = buffer;
0219         command[0] = W1_F19_WRITE_DATA_NO_STOP;
0220         command[1] = i2c_address << 1;
0221         result = __w1_f19_i2c_write(sl, command, 2, p,
0222             W1_F19_WRITE_DATA_LIMIT);
0223         if (result < 0)
0224             return result;
0225 
0226         /* Resume to same DS28E17. */
0227         if (w1_reset_resume_command(sl->master))
0228             return -EIO;
0229 
0230         /* Next data chunk. */
0231         p += W1_F19_WRITE_DATA_LIMIT;
0232         remaining -= W1_F19_WRITE_DATA_LIMIT;
0233 
0234         while (remaining > W1_F19_WRITE_DATA_LIMIT) {
0235             /* Send intermediate chunk to DS28E17. */
0236             command[0] = W1_F19_WRITE_DATA_ONLY;
0237             result = __w1_f19_i2c_write(sl, command, 1, p,
0238                     W1_F19_WRITE_DATA_LIMIT);
0239             if (result < 0)
0240                 return result;
0241 
0242             /* Resume to same DS28E17. */
0243             if (w1_reset_resume_command(sl->master))
0244                 return -EIO;
0245 
0246             /* Next data chunk. */
0247             p += W1_F19_WRITE_DATA_LIMIT;
0248             remaining -= W1_F19_WRITE_DATA_LIMIT;
0249         }
0250 
0251         /* Send final chunk to DS28E17. */
0252         command[0] = (stop ? W1_F19_WRITE_DATA_ONLY_WITH_STOP
0253             : W1_F19_WRITE_DATA_ONLY);
0254         result = __w1_f19_i2c_write(sl, command, 1, p, remaining);
0255     }
0256 
0257     return result;
0258 }
0259 
0260 
0261 /* Read data from I2C slave. */
0262 static int w1_f19_i2c_read(struct w1_slave *sl, u16 i2c_address,
0263     u8 *buffer, size_t count)
0264 {
0265     u16 crc;
0266     int error;
0267     u8 w1_buf[5];
0268 
0269     /* Check input. */
0270     if (count == 0)
0271         return -EOPNOTSUPP;
0272 
0273     /* Send command to DS28E17. */
0274     w1_buf[0] = W1_F19_READ_DATA_WITH_STOP;
0275     w1_buf[1] = i2c_address << 1 | 0x01;
0276     w1_buf[2] = count;
0277     crc = crc16(CRC16_INIT, w1_buf, 3);
0278     w1_buf[3] = ~(crc & 0xFF);
0279     w1_buf[4] = ~((crc >> 8) & 0xFF);
0280     w1_write_block(sl->master, w1_buf, 5);
0281 
0282     /* Wait until busy flag clears (or timeout). */
0283     if (w1_f19_i2c_busy_wait(sl, count + 1) < 0)
0284         return -ETIMEDOUT;
0285 
0286     /* Read status from DS28E17. */
0287     w1_buf[0] = w1_read_8(sl->master);
0288     w1_buf[1] = 0;
0289 
0290     /* Check error conditions. */
0291     error = w1_f19_error(sl, w1_buf);
0292     if (error < 0)
0293         return error;
0294 
0295     /* Read received I2C data from DS28E17. */
0296     return w1_read_block(sl->master, buffer, count);
0297 }
0298 
0299 
0300 /* Write to, then read data from I2C slave. */
0301 static int w1_f19_i2c_write_read(struct w1_slave *sl, u16 i2c_address,
0302     const u8 *wbuffer, size_t wcount, u8 *rbuffer, size_t rcount)
0303 {
0304     u16 crc;
0305     int error;
0306     u8 w1_buf[3];
0307 
0308     /* Check input. */
0309     if (wcount == 0 || rcount == 0)
0310         return -EOPNOTSUPP;
0311 
0312     /* Send command and I2C data to DS28E17. */
0313     w1_buf[0] = W1_F19_WRITE_READ_DATA_WITH_STOP;
0314     w1_buf[1] = i2c_address << 1;
0315     w1_buf[2] = wcount;
0316     crc = crc16(CRC16_INIT, w1_buf, 3);
0317     w1_write_block(sl->master, w1_buf, 3);
0318 
0319     crc = crc16(crc, wbuffer, wcount);
0320     w1_write_block(sl->master, wbuffer, wcount);
0321 
0322     w1_buf[0] = rcount;
0323     crc = crc16(crc, w1_buf, 1);
0324     w1_buf[1] = ~(crc & 0xFF);
0325     w1_buf[2] = ~((crc >> 8) & 0xFF);
0326     w1_write_block(sl->master, w1_buf, 3);
0327 
0328     /* Wait until busy flag clears (or timeout). */
0329     if (w1_f19_i2c_busy_wait(sl, wcount + rcount + 2) < 0)
0330         return -ETIMEDOUT;
0331 
0332     /* Read status from DS28E17. */
0333     w1_read_block(sl->master, w1_buf, 2);
0334 
0335     /* Check error conditions. */
0336     error = w1_f19_error(sl, w1_buf);
0337     if (error < 0)
0338         return error;
0339 
0340     /* Read received I2C data from DS28E17. */
0341     return w1_read_block(sl->master, rbuffer, rcount);
0342 }
0343 
0344 
0345 /* Do an I2C master transfer. */
0346 static int w1_f19_i2c_master_transfer(struct i2c_adapter *adapter,
0347     struct i2c_msg *msgs, int num)
0348 {
0349     struct w1_slave *sl = (struct w1_slave *) adapter->algo_data;
0350     int i = 0;
0351     int result = 0;
0352 
0353     /* Start onewire transaction. */
0354     mutex_lock(&sl->master->bus_mutex);
0355 
0356     /* Select DS28E17. */
0357     if (w1_reset_select_slave(sl)) {
0358         i = -EIO;
0359         goto error;
0360     }
0361 
0362     /* Loop while there are still messages to transfer. */
0363     while (i < num) {
0364         /*
0365          * Check for special case: Small write followed
0366          * by read to same I2C device.
0367          */
0368         if (i < (num-1)
0369             && msgs[i].addr == msgs[i+1].addr
0370             && !(msgs[i].flags & I2C_M_RD)
0371             && (msgs[i+1].flags & I2C_M_RD)
0372             && (msgs[i].len <= W1_F19_WRITE_DATA_LIMIT)) {
0373             /*
0374              * The DS28E17 has a combined transfer
0375              * for small write+read.
0376              */
0377             result = w1_f19_i2c_write_read(sl, msgs[i].addr,
0378                 msgs[i].buf, msgs[i].len,
0379                 msgs[i+1].buf, msgs[i+1].len);
0380             if (result < 0) {
0381                 i = result;
0382                 goto error;
0383             }
0384 
0385             /*
0386              * Check if we should interpret the read data
0387              * as a length byte. The DS28E17 unfortunately
0388              * has no read without stop, so we can just do
0389              * another simple read in that case.
0390              */
0391             if (msgs[i+1].flags & I2C_M_RECV_LEN) {
0392                 result = w1_f19_i2c_read(sl, msgs[i+1].addr,
0393                     &(msgs[i+1].buf[1]), msgs[i+1].buf[0]);
0394                 if (result < 0) {
0395                     i = result;
0396                     goto error;
0397                 }
0398             }
0399 
0400             /* Eat up read message, too. */
0401             i++;
0402         } else if (msgs[i].flags & I2C_M_RD) {
0403             /* Read transfer. */
0404             result = w1_f19_i2c_read(sl, msgs[i].addr,
0405                 msgs[i].buf, msgs[i].len);
0406             if (result < 0) {
0407                 i = result;
0408                 goto error;
0409             }
0410 
0411             /*
0412              * Check if we should interpret the read data
0413              * as a length byte. The DS28E17 unfortunately
0414              * has no read without stop, so we can just do
0415              * another simple read in that case.
0416              */
0417             if (msgs[i].flags & I2C_M_RECV_LEN) {
0418                 result = w1_f19_i2c_read(sl,
0419                     msgs[i].addr,
0420                     &(msgs[i].buf[1]),
0421                     msgs[i].buf[0]);
0422                 if (result < 0) {
0423                     i = result;
0424                     goto error;
0425                 }
0426             }
0427         } else {
0428             /*
0429              * Write transfer.
0430              * Stop condition only for last
0431              * transfer.
0432              */
0433             result = w1_f19_i2c_write(sl,
0434                 msgs[i].addr,
0435                 msgs[i].buf,
0436                 msgs[i].len,
0437                 i == (num-1));
0438             if (result < 0) {
0439                 i = result;
0440                 goto error;
0441             }
0442         }
0443 
0444         /* Next message. */
0445         i++;
0446 
0447         /* Are there still messages to send/receive? */
0448         if (i < num) {
0449             /* Yes. Resume to same DS28E17. */
0450             if (w1_reset_resume_command(sl->master)) {
0451                 i = -EIO;
0452                 goto error;
0453             }
0454         }
0455     }
0456 
0457 error:
0458     /* End onewire transaction. */
0459     mutex_unlock(&sl->master->bus_mutex);
0460 
0461     /* Return number of messages processed or error. */
0462     return i;
0463 }
0464 
0465 
0466 /* Get I2C adapter functionality. */
0467 static u32 w1_f19_i2c_functionality(struct i2c_adapter *adapter)
0468 {
0469     /*
0470      * Plain I2C functions only.
0471      * SMBus is emulated by the kernel's I2C layer.
0472      * No "I2C_FUNC_SMBUS_QUICK"
0473      * No "I2C_FUNC_SMBUS_READ_BLOCK_DATA"
0474      * No "I2C_FUNC_SMBUS_BLOCK_PROC_CALL"
0475      */
0476     return I2C_FUNC_I2C |
0477         I2C_FUNC_SMBUS_BYTE |
0478         I2C_FUNC_SMBUS_BYTE_DATA |
0479         I2C_FUNC_SMBUS_WORD_DATA |
0480         I2C_FUNC_SMBUS_PROC_CALL |
0481         I2C_FUNC_SMBUS_WRITE_BLOCK_DATA |
0482         I2C_FUNC_SMBUS_I2C_BLOCK |
0483         I2C_FUNC_SMBUS_PEC;
0484 }
0485 
0486 
0487 /* I2C adapter quirks. */
0488 static const struct i2c_adapter_quirks w1_f19_i2c_adapter_quirks = {
0489     .max_read_len = W1_F19_READ_DATA_LIMIT,
0490 };
0491 
0492 /* I2C algorithm. */
0493 static const struct i2c_algorithm w1_f19_i2c_algorithm = {
0494     .master_xfer    = w1_f19_i2c_master_transfer,
0495     .functionality  = w1_f19_i2c_functionality,
0496 };
0497 
0498 
0499 /* Read I2C speed from DS28E17. */
0500 static int w1_f19_get_i2c_speed(struct w1_slave *sl)
0501 {
0502     struct w1_f19_data *data = sl->family_data;
0503     int result = -EIO;
0504 
0505     /* Start onewire transaction. */
0506     mutex_lock(&sl->master->bus_mutex);
0507 
0508     /* Select slave. */
0509     if (w1_reset_select_slave(sl))
0510         goto error;
0511 
0512     /* Read slave configuration byte. */
0513     w1_write_8(sl->master, W1_F19_READ_CONFIGURATION);
0514     result = w1_read_8(sl->master);
0515     if (result < 0 || result > 2) {
0516         result = -EIO;
0517         goto error;
0518     }
0519 
0520     /* Update speed in slave specific data. */
0521     data->speed = result;
0522 
0523 error:
0524     /* End onewire transaction. */
0525     mutex_unlock(&sl->master->bus_mutex);
0526 
0527     return result;
0528 }
0529 
0530 
0531 /* Set I2C speed on DS28E17. */
0532 static int __w1_f19_set_i2c_speed(struct w1_slave *sl, u8 speed)
0533 {
0534     struct w1_f19_data *data = sl->family_data;
0535     const int i2c_speeds[3] = { 100, 400, 900 };
0536     u8 w1_buf[2];
0537 
0538     /* Select slave. */
0539     if (w1_reset_select_slave(sl))
0540         return -EIO;
0541 
0542     w1_buf[0] = W1_F19_WRITE_CONFIGURATION;
0543     w1_buf[1] = speed;
0544     w1_write_block(sl->master, w1_buf, 2);
0545 
0546     /* Update speed in slave specific data. */
0547     data->speed = speed;
0548 
0549     dev_info(&sl->dev, "i2c speed set to %d kBaud\n", i2c_speeds[speed]);
0550 
0551     return 0;
0552 }
0553 
0554 static int w1_f19_set_i2c_speed(struct w1_slave *sl, u8 speed)
0555 {
0556     int result;
0557 
0558     /* Start onewire transaction. */
0559     mutex_lock(&sl->master->bus_mutex);
0560 
0561     /* Set I2C speed on DS28E17. */
0562     result = __w1_f19_set_i2c_speed(sl, speed);
0563 
0564     /* End onewire transaction. */
0565     mutex_unlock(&sl->master->bus_mutex);
0566 
0567     return result;
0568 }
0569 
0570 
0571 /* Sysfs attributes. */
0572 
0573 /* I2C speed attribute for a single chip. */
0574 static ssize_t speed_show(struct device *dev, struct device_attribute *attr,
0575                  char *buf)
0576 {
0577     struct w1_slave *sl = dev_to_w1_slave(dev);
0578     int result;
0579 
0580     /* Read current speed from slave. Updates data->speed. */
0581     result = w1_f19_get_i2c_speed(sl);
0582     if (result < 0)
0583         return result;
0584 
0585     /* Return current speed value. */
0586     return sprintf(buf, "%d\n", result);
0587 }
0588 
0589 static ssize_t speed_store(struct device *dev, struct device_attribute *attr,
0590                   const char *buf, size_t count)
0591 {
0592     struct w1_slave *sl = dev_to_w1_slave(dev);
0593     int error;
0594 
0595     /* Valid values are: "100", "400", "900" */
0596     if (count < 3 || count > 4 || !buf)
0597         return -EINVAL;
0598     if (count == 4 && buf[3] != '\n')
0599         return -EINVAL;
0600     if (buf[1] != '0' || buf[2] != '0')
0601         return -EINVAL;
0602 
0603     /* Set speed on slave. */
0604     switch (buf[0]) {
0605     case '1':
0606         error = w1_f19_set_i2c_speed(sl, 0);
0607         break;
0608     case '4':
0609         error = w1_f19_set_i2c_speed(sl, 1);
0610         break;
0611     case '9':
0612         error = w1_f19_set_i2c_speed(sl, 2);
0613         break;
0614     default:
0615         return -EINVAL;
0616     }
0617 
0618     if (error < 0)
0619         return error;
0620 
0621     /* Return bytes written. */
0622     return count;
0623 }
0624 
0625 static DEVICE_ATTR_RW(speed);
0626 
0627 
0628 /* Busy stretch attribute for a single chip. */
0629 static ssize_t stretch_show(struct device *dev, struct device_attribute *attr,
0630                  char *buf)
0631 {
0632     struct w1_slave *sl = dev_to_w1_slave(dev);
0633     struct w1_f19_data *data = sl->family_data;
0634 
0635     /* Return current stretch value. */
0636     return sprintf(buf, "%d\n", data->stretch);
0637 }
0638 
0639 static ssize_t stretch_store(struct device *dev, struct device_attribute *attr,
0640                   const char *buf, size_t count)
0641 {
0642     struct w1_slave *sl = dev_to_w1_slave(dev);
0643     struct w1_f19_data *data = sl->family_data;
0644 
0645     /* Valid values are '1' to '9' */
0646     if (count < 1 || count > 2 || !buf)
0647         return -EINVAL;
0648     if (count == 2 && buf[1] != '\n')
0649         return -EINVAL;
0650     if (buf[0] < '1' || buf[0] > '9')
0651         return -EINVAL;
0652 
0653     /* Set busy stretch value. */
0654     data->stretch = buf[0] & 0x0F;
0655 
0656     /* Return bytes written. */
0657     return count;
0658 }
0659 
0660 static DEVICE_ATTR_RW(stretch);
0661 
0662 
0663 /* All attributes. */
0664 static struct attribute *w1_f19_attrs[] = {
0665     &dev_attr_speed.attr,
0666     &dev_attr_stretch.attr,
0667     NULL,
0668 };
0669 
0670 static const struct attribute_group w1_f19_group = {
0671     .attrs      = w1_f19_attrs,
0672 };
0673 
0674 static const struct attribute_group *w1_f19_groups[] = {
0675     &w1_f19_group,
0676     NULL,
0677 };
0678 
0679 
0680 /* Slave add and remove functions. */
0681 static int w1_f19_add_slave(struct w1_slave *sl)
0682 {
0683     struct w1_f19_data *data = NULL;
0684 
0685     /* Allocate memory for slave specific data. */
0686     data = devm_kzalloc(&sl->dev, sizeof(*data), GFP_KERNEL);
0687     if (!data)
0688         return -ENOMEM;
0689     sl->family_data = data;
0690 
0691     /* Setup default I2C speed on slave. */
0692     switch (i2c_speed) {
0693     case 100:
0694         __w1_f19_set_i2c_speed(sl, 0);
0695         break;
0696     case 400:
0697         __w1_f19_set_i2c_speed(sl, 1);
0698         break;
0699     case 900:
0700         __w1_f19_set_i2c_speed(sl, 2);
0701         break;
0702     default:
0703         /*
0704          * A i2c_speed module parameter of anything else
0705          * than 100, 400, 900 means not to touch the
0706          * speed of the DS28E17.
0707          * We assume 400kBaud, the power-on value.
0708          */
0709         data->speed = 1;
0710     }
0711 
0712     /*
0713      * Setup default busy stretch
0714      * configuration for the DS28E17.
0715      */
0716     data->stretch = i2c_stretch;
0717 
0718     /* Setup I2C adapter. */
0719     data->adapter.owner      = THIS_MODULE;
0720     data->adapter.algo       = &w1_f19_i2c_algorithm;
0721     data->adapter.algo_data  = sl;
0722     strcpy(data->adapter.name, "w1-");
0723     strcat(data->adapter.name, sl->name);
0724     data->adapter.dev.parent = &sl->dev;
0725     data->adapter.quirks     = &w1_f19_i2c_adapter_quirks;
0726 
0727     return i2c_add_adapter(&data->adapter);
0728 }
0729 
0730 static void w1_f19_remove_slave(struct w1_slave *sl)
0731 {
0732     struct w1_f19_data *family_data = sl->family_data;
0733 
0734     /* Delete I2C adapter. */
0735     i2c_del_adapter(&family_data->adapter);
0736 
0737     /* Free slave specific data. */
0738     devm_kfree(&sl->dev, family_data);
0739     sl->family_data = NULL;
0740 }
0741 
0742 
0743 /* Declarations within the w1 subsystem. */
0744 static const struct w1_family_ops w1_f19_fops = {
0745     .add_slave = w1_f19_add_slave,
0746     .remove_slave = w1_f19_remove_slave,
0747     .groups = w1_f19_groups,
0748 };
0749 
0750 static struct w1_family w1_family_19 = {
0751     .fid = W1_FAMILY_DS28E17,
0752     .fops = &w1_f19_fops,
0753 };
0754 
0755 module_w1_family(w1_family_19);
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