w1/slaves/w1_ds2781.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * 1-Wire implementation for the ds2780 chip
0004  *
0005  * Author: Renata Sayakhova <renata@oktetlabs.ru>
0006  *
0007  * Based on w1-ds2760 driver
0008  */
0009
0010 #ifndef _W1_DS2781_H
0011 #define _W1_DS2781_H
0012
0013 /* Function commands */
0014 #define W1_DS2781_READ_DATA     0x69
0015 #define W1_DS2781_WRITE_DATA        0x6C
0016 #define W1_DS2781_COPY_DATA     0x48
0017 #define W1_DS2781_RECALL_DATA       0xB8
0018 #define W1_DS2781_LOCK          0x6A
0019
0020 /* Register map */
0021 /* Register 0x00 Reserved */
0022 #define DS2781_STATUS           0x01
0023 #define DS2781_RAAC_MSB         0x02
0024 #define DS2781_RAAC_LSB         0x03
0025 #define DS2781_RSAC_MSB         0x04
0026 #define DS2781_RSAC_LSB         0x05
0027 #define DS2781_RARC         0x06
0028 #define DS2781_RSRC         0x07
0029 #define DS2781_IAVG_MSB         0x08
0030 #define DS2781_IAVG_LSB         0x09
0031 #define DS2781_TEMP_MSB         0x0A
0032 #define DS2781_TEMP_LSB         0x0B
0033 #define DS2781_VOLT_MSB         0x0C
0034 #define DS2781_VOLT_LSB         0x0D
0035 #define DS2781_CURRENT_MSB      0x0E
0036 #define DS2781_CURRENT_LSB      0x0F
0037 #define DS2781_ACR_MSB          0x10
0038 #define DS2781_ACR_LSB          0x11
0039 #define DS2781_ACRL_MSB         0x12
0040 #define DS2781_ACRL_LSB         0x13
0041 #define DS2781_AS           0x14
0042 #define DS2781_SFR          0x15
0043 #define DS2781_FULL_MSB         0x16
0044 #define DS2781_FULL_LSB         0x17
0045 #define DS2781_AE_MSB           0x18
0046 #define DS2781_AE_LSB           0x19
0047 #define DS2781_SE_MSB           0x1A
0048 #define DS2781_SE_LSB           0x1B
0049 /* Register 0x1C - 0x1E Reserved */
0050 #define DS2781_EEPROM       0x1F
0051 #define DS2781_EEPROM_BLOCK0_START  0x20
0052 /* Register 0x20 - 0x2F User EEPROM */
0053 #define DS2781_EEPROM_BLOCK0_END    0x2F
0054 /* Register 0x30 - 0x5F Reserved */
0055 #define DS2781_EEPROM_BLOCK1_START  0x60
0056 #define DS2781_CONTROL          0x60
0057 #define DS2781_AB           0x61
0058 #define DS2781_AC_MSB           0x62
0059 #define DS2781_AC_LSB           0x63
0060 #define DS2781_VCHG         0x64
0061 #define DS2781_IMIN         0x65
0062 #define DS2781_VAE          0x66
0063 #define DS2781_IAE          0x67
0064 #define DS2781_AE_40            0x68
0065 #define DS2781_RSNSP            0x69
0066 #define DS2781_FULL_40_MSB      0x6A
0067 #define DS2781_FULL_40_LSB      0x6B
0068 #define DS2781_FULL_4_SLOPE     0x6C
0069 #define DS2781_FULL_3_SLOPE     0x6D
0070 #define DS2781_FULL_2_SLOPE     0x6E
0071 #define DS2781_FULL_1_SLOPE     0x6F
0072 #define DS2781_AE_4_SLOPE       0x70
0073 #define DS2781_AE_3_SLOPE       0x71
0074 #define DS2781_AE_2_SLOPE       0x72
0075 #define DS2781_AE_1_SLOPE       0x73
0076 #define DS2781_SE_4_SLOPE       0x74
0077 #define DS2781_SE_3_SLOPE       0x75
0078 #define DS2781_SE_2_SLOPE       0x76
0079 #define DS2781_SE_1_SLOPE       0x77
0080 #define DS2781_RSGAIN_MSB       0x78
0081 #define DS2781_RSGAIN_LSB       0x79
0082 #define DS2781_RSTC         0x7A
0083 #define DS2781_COB          0x7B
0084 #define DS2781_TBP34            0x7C
0085 #define DS2781_TBP23            0x7D
0086 #define DS2781_TBP12            0x7E
0087 #define DS2781_EEPROM_BLOCK1_END    0x7F
0088 /* Register 0x7D - 0xFF Reserved */
0089
0090 #define DS2781_FSGAIN_MSB       0xB0
0091 #define DS2781_FSGAIN_LSB       0xB1
0092
0093 /* Number of valid register addresses */
0094 #define DS2781_DATA_SIZE        0xB2
0095
0096 /* Status register bits */
0097 #define DS2781_STATUS_CHGTF     (1 << 7)
0098 #define DS2781_STATUS_AEF       (1 << 6)
0099 #define DS2781_STATUS_SEF       (1 << 5)
0100 #define DS2781_STATUS_LEARNF        (1 << 4)
0101 /* Bit 3 Reserved */
0102 #define DS2781_STATUS_UVF       (1 << 2)
0103 #define DS2781_STATUS_PORF      (1 << 1)
0104 /* Bit 0 Reserved */
0105
0106 /* Control register bits */
0107 /* Bit 7 Reserved */
0108 #define DS2781_CONTROL_NBEN     (1 << 7)
0109 #define DS2781_CONTROL_UVEN     (1 << 6)
0110 #define DS2781_CONTROL_PMOD     (1 << 5)
0111 #define DS2781_CONTROL_RNAOP        (1 << 4)
0112 #define DS1781_CONTROL_UVTH     (1 << 3)
0113 /* Bit 0 - 2 Reserved */
0114
0115 /* Special feature register bits */
0116 /* Bit 1 - 7 Reserved */
0117 #define DS2781_SFR_PIOSC        (1 << 0)
0118
0119 /* EEPROM register bits */
0120 #define DS2781_EEPROM_EEC       (1 << 7)
0121 #define DS2781_EEPROM_LOCK      (1 << 6)
0122 /* Bit 2 - 6 Reserved */
0123 #define DS2781_EEPROM_BL1       (1 << 1)
0124 #define DS2781_EEPROM_BL0       (1 << 0)
0125
0126 extern int w1_ds2781_io(struct device *dev, char *buf, int addr, size_t count,
0127             int io);
0128 extern int w1_ds2781_eeprom_cmd(struct device *dev, int addr, int cmd);
0129
0130 #endif /* !_W1_DS2781_H */