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0017 #include <linux/module.h>
0018 #include <linux/kernel.h>
0019 #include <linux/errno.h>
0020 #include <linux/string.h>
0021 #include <linux/delay.h>
0022 #include <linux/slab.h>
0023 #include <linux/mm.h>
0024 #include <linux/fb.h>
0025 #include <linux/pci.h>
0026 #include <asm/set_memory.h>
0027 #include <asm/tlbflush.h>
0028 #include <linux/mmzone.h>
0029
0030
0031
0032 #include "vermilion.h"
0033
0034 #define MODULE_NAME "vmlfb"
0035
0036 #define VML_TOHW(_val, _width) ((((_val) << (_width)) + 0x7FFF - (_val)) >> 16)
0037
0038 static struct mutex vml_mutex;
0039 static struct list_head global_no_mode;
0040 static struct list_head global_has_mode;
0041 static struct fb_ops vmlfb_ops;
0042 static struct vml_sys *subsys = NULL;
0043 static char *vml_default_mode = "1024x768@60";
0044 static const struct fb_videomode defaultmode = {
0045 NULL, 60, 1024, 768, 12896, 144, 24, 29, 3, 136, 6,
0046 0, FB_VMODE_NONINTERLACED
0047 };
0048
0049 static u32 vml_mem_requested = (10 * 1024 * 1024);
0050 static u32 vml_mem_contig = (4 * 1024 * 1024);
0051 static u32 vml_mem_min = (4 * 1024 * 1024);
0052
0053 static u32 vml_clocks[] = {
0054 6750,
0055 13500,
0056 27000,
0057 29700,
0058 37125,
0059 54000,
0060 59400,
0061 74250,
0062 120000,
0063 148500
0064 };
0065
0066 static u32 vml_num_clocks = ARRAY_SIZE(vml_clocks);
0067
0068
0069
0070
0071
0072
0073 static int vmlfb_alloc_vram_area(struct vram_area *va, unsigned max_order,
0074 unsigned min_order)
0075 {
0076 gfp_t flags;
0077 unsigned long i;
0078
0079 max_order++;
0080 do {
0081
0082
0083
0084
0085
0086
0087
0088 flags = __GFP_DMA | __GFP_HIGH | __GFP_KSWAPD_RECLAIM;
0089 va->logical =
0090 __get_free_pages(flags, --max_order);
0091 } while (va->logical == 0 && max_order > min_order);
0092
0093 if (!va->logical)
0094 return -ENOMEM;
0095
0096 va->phys = virt_to_phys((void *)va->logical);
0097 va->size = PAGE_SIZE << max_order;
0098 va->order = max_order;
0099
0100
0101
0102
0103
0104
0105
0106
0107 memset((void *)va->logical, 0x00, va->size);
0108 for (i = va->logical; i < va->logical + va->size; i += PAGE_SIZE) {
0109 get_page(virt_to_page(i));
0110 }
0111
0112
0113
0114
0115
0116 set_pages_uc(virt_to_page(va->logical), va->size >> PAGE_SHIFT);
0117
0118 printk(KERN_DEBUG MODULE_NAME
0119 ": Allocated %ld bytes vram area at 0x%08lx\n",
0120 va->size, va->phys);
0121
0122 return 0;
0123 }
0124
0125
0126
0127
0128
0129
0130 static void vmlfb_free_vram_area(struct vram_area *va)
0131 {
0132 unsigned long j;
0133
0134 if (va->logical) {
0135
0136
0137
0138
0139
0140 set_pages_wb(virt_to_page(va->logical),
0141 va->size >> PAGE_SHIFT);
0142
0143
0144
0145
0146
0147
0148 for (j = va->logical; j < va->logical + va->size;
0149 j += PAGE_SIZE) {
0150 (void)put_page_testzero(virt_to_page(j));
0151 }
0152
0153 printk(KERN_DEBUG MODULE_NAME
0154 ": Freeing %ld bytes vram area at 0x%08lx\n",
0155 va->size, va->phys);
0156 free_pages(va->logical, va->order);
0157
0158 va->logical = 0;
0159 }
0160 }
0161
0162
0163
0164
0165
0166 static void vmlfb_free_vram(struct vml_info *vinfo)
0167 {
0168 int i;
0169
0170 for (i = 0; i < vinfo->num_areas; ++i) {
0171 vmlfb_free_vram_area(&vinfo->vram[i]);
0172 }
0173 vinfo->num_areas = 0;
0174 }
0175
0176
0177
0178
0179
0180
0181
0182
0183 static int vmlfb_alloc_vram(struct vml_info *vinfo,
0184 size_t requested,
0185 size_t min_total, size_t min_contig)
0186 {
0187 int i, j;
0188 int order;
0189 int contiguous;
0190 int err;
0191 struct vram_area *va;
0192 struct vram_area *va2;
0193
0194 vinfo->num_areas = 0;
0195 for (i = 0; i < VML_VRAM_AREAS; ++i) {
0196 va = &vinfo->vram[i];
0197 order = 0;
0198
0199 while (requested > (PAGE_SIZE << order) && order < MAX_ORDER)
0200 order++;
0201
0202 err = vmlfb_alloc_vram_area(va, order, 0);
0203
0204 if (err)
0205 break;
0206
0207 if (i == 0) {
0208 vinfo->vram_start = va->phys;
0209 vinfo->vram_logical = (void __iomem *) va->logical;
0210 vinfo->vram_contig_size = va->size;
0211 vinfo->num_areas = 1;
0212 } else {
0213 contiguous = 0;
0214
0215 for (j = 0; j < i; ++j) {
0216 va2 = &vinfo->vram[j];
0217 if (va->phys + va->size == va2->phys ||
0218 va2->phys + va2->size == va->phys) {
0219 contiguous = 1;
0220 break;
0221 }
0222 }
0223
0224 if (contiguous) {
0225 vinfo->num_areas++;
0226 if (va->phys < vinfo->vram_start) {
0227 vinfo->vram_start = va->phys;
0228 vinfo->vram_logical =
0229 (void __iomem *)va->logical;
0230 }
0231 vinfo->vram_contig_size += va->size;
0232 } else {
0233 vmlfb_free_vram_area(va);
0234 break;
0235 }
0236 }
0237
0238 if (requested < va->size)
0239 break;
0240 else
0241 requested -= va->size;
0242 }
0243
0244 if (vinfo->vram_contig_size > min_total &&
0245 vinfo->vram_contig_size > min_contig) {
0246
0247 printk(KERN_DEBUG MODULE_NAME
0248 ": Contiguous vram: %ld bytes at physical 0x%08lx.\n",
0249 (unsigned long)vinfo->vram_contig_size,
0250 (unsigned long)vinfo->vram_start);
0251
0252 return 0;
0253 }
0254
0255 printk(KERN_ERR MODULE_NAME
0256 ": Could not allocate requested minimal amount of vram.\n");
0257
0258 vmlfb_free_vram(vinfo);
0259
0260 return -ENOMEM;
0261 }
0262
0263
0264
0265
0266
0267 static int vmlfb_get_gpu(struct vml_par *par)
0268 {
0269 mutex_lock(&vml_mutex);
0270
0271 par->gpu = pci_get_device(PCI_VENDOR_ID_INTEL, VML_DEVICE_GPU, NULL);
0272
0273 if (!par->gpu) {
0274 mutex_unlock(&vml_mutex);
0275 return -ENODEV;
0276 }
0277
0278 mutex_unlock(&vml_mutex);
0279
0280 if (pci_enable_device(par->gpu) < 0)
0281 return -ENODEV;
0282
0283 return 0;
0284 }
0285
0286
0287
0288
0289 static int vmlfb_vram_offset(struct vml_info *vinfo, unsigned long offset)
0290 {
0291 unsigned long aoffset;
0292 unsigned i;
0293
0294 for (i = 0; i < vinfo->num_areas; ++i) {
0295 aoffset = offset - (vinfo->vram[i].phys - vinfo->vram_start);
0296
0297 if (aoffset < vinfo->vram[i].size) {
0298 return 0;
0299 }
0300 }
0301
0302 return -EINVAL;
0303 }
0304
0305
0306
0307
0308
0309 static int vmlfb_enable_mmio(struct vml_par *par)
0310 {
0311 int err;
0312
0313 par->vdc_mem_base = pci_resource_start(par->vdc, 0);
0314 par->vdc_mem_size = pci_resource_len(par->vdc, 0);
0315 if (!request_mem_region(par->vdc_mem_base, par->vdc_mem_size, "vmlfb")) {
0316 printk(KERN_ERR MODULE_NAME
0317 ": Could not claim display controller MMIO.\n");
0318 return -EBUSY;
0319 }
0320 par->vdc_mem = ioremap(par->vdc_mem_base, par->vdc_mem_size);
0321 if (par->vdc_mem == NULL) {
0322 printk(KERN_ERR MODULE_NAME
0323 ": Could not map display controller MMIO.\n");
0324 err = -ENOMEM;
0325 goto out_err_0;
0326 }
0327
0328 par->gpu_mem_base = pci_resource_start(par->gpu, 0);
0329 par->gpu_mem_size = pci_resource_len(par->gpu, 0);
0330 if (!request_mem_region(par->gpu_mem_base, par->gpu_mem_size, "vmlfb")) {
0331 printk(KERN_ERR MODULE_NAME ": Could not claim GPU MMIO.\n");
0332 err = -EBUSY;
0333 goto out_err_1;
0334 }
0335 par->gpu_mem = ioremap(par->gpu_mem_base, par->gpu_mem_size);
0336 if (par->gpu_mem == NULL) {
0337 printk(KERN_ERR MODULE_NAME ": Could not map GPU MMIO.\n");
0338 err = -ENOMEM;
0339 goto out_err_2;
0340 }
0341
0342 return 0;
0343
0344 out_err_2:
0345 release_mem_region(par->gpu_mem_base, par->gpu_mem_size);
0346 out_err_1:
0347 iounmap(par->vdc_mem);
0348 out_err_0:
0349 release_mem_region(par->vdc_mem_base, par->vdc_mem_size);
0350 return err;
0351 }
0352
0353
0354
0355
0356
0357 static void vmlfb_disable_mmio(struct vml_par *par)
0358 {
0359 iounmap(par->gpu_mem);
0360 release_mem_region(par->gpu_mem_base, par->gpu_mem_size);
0361 iounmap(par->vdc_mem);
0362 release_mem_region(par->vdc_mem_base, par->vdc_mem_size);
0363 }
0364
0365
0366
0367
0368
0369 static void vmlfb_release_devices(struct vml_par *par)
0370 {
0371 if (atomic_dec_and_test(&par->refcount)) {
0372 pci_disable_device(par->gpu);
0373 pci_disable_device(par->vdc);
0374 }
0375 }
0376
0377
0378
0379
0380
0381 static void vml_pci_remove(struct pci_dev *dev)
0382 {
0383 struct fb_info *info;
0384 struct vml_info *vinfo;
0385 struct vml_par *par;
0386
0387 info = pci_get_drvdata(dev);
0388 if (info) {
0389 vinfo = container_of(info, struct vml_info, info);
0390 par = vinfo->par;
0391 mutex_lock(&vml_mutex);
0392 unregister_framebuffer(info);
0393 fb_dealloc_cmap(&info->cmap);
0394 vmlfb_free_vram(vinfo);
0395 vmlfb_disable_mmio(par);
0396 vmlfb_release_devices(par);
0397 kfree(vinfo);
0398 kfree(par);
0399 mutex_unlock(&vml_mutex);
0400 }
0401 }
0402
0403 static void vmlfb_set_pref_pixel_format(struct fb_var_screeninfo *var)
0404 {
0405 switch (var->bits_per_pixel) {
0406 case 16:
0407 var->blue.offset = 0;
0408 var->blue.length = 5;
0409 var->green.offset = 5;
0410 var->green.length = 5;
0411 var->red.offset = 10;
0412 var->red.length = 5;
0413 var->transp.offset = 15;
0414 var->transp.length = 1;
0415 break;
0416 case 32:
0417 var->blue.offset = 0;
0418 var->blue.length = 8;
0419 var->green.offset = 8;
0420 var->green.length = 8;
0421 var->red.offset = 16;
0422 var->red.length = 8;
0423 var->transp.offset = 24;
0424 var->transp.length = 0;
0425 break;
0426 default:
0427 break;
0428 }
0429
0430 var->blue.msb_right = var->green.msb_right =
0431 var->red.msb_right = var->transp.msb_right = 0;
0432 }
0433
0434
0435
0436
0437
0438
0439
0440 static int vml_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
0441 {
0442 struct vml_info *vinfo;
0443 struct fb_info *info;
0444 struct vml_par *par;
0445 int err = 0;
0446
0447 par = kzalloc(sizeof(*par), GFP_KERNEL);
0448 if (par == NULL)
0449 return -ENOMEM;
0450
0451 vinfo = kzalloc(sizeof(*vinfo), GFP_KERNEL);
0452 if (vinfo == NULL) {
0453 err = -ENOMEM;
0454 goto out_err_0;
0455 }
0456
0457 vinfo->par = par;
0458 par->vdc = dev;
0459 atomic_set(&par->refcount, 1);
0460
0461 switch (id->device) {
0462 case VML_DEVICE_VDC:
0463 if ((err = vmlfb_get_gpu(par)))
0464 goto out_err_1;
0465 pci_set_drvdata(dev, &vinfo->info);
0466 break;
0467 default:
0468 err = -ENODEV;
0469 goto out_err_1;
0470 }
0471
0472 info = &vinfo->info;
0473 info->flags = FBINFO_DEFAULT | FBINFO_PARTIAL_PAN_OK;
0474
0475 err = vmlfb_enable_mmio(par);
0476 if (err)
0477 goto out_err_2;
0478
0479 err = vmlfb_alloc_vram(vinfo, vml_mem_requested,
0480 vml_mem_contig, vml_mem_min);
0481 if (err)
0482 goto out_err_3;
0483
0484 strcpy(info->fix.id, "Vermilion Range");
0485 info->fix.mmio_start = 0;
0486 info->fix.mmio_len = 0;
0487 info->fix.smem_start = vinfo->vram_start;
0488 info->fix.smem_len = vinfo->vram_contig_size;
0489 info->fix.type = FB_TYPE_PACKED_PIXELS;
0490 info->fix.visual = FB_VISUAL_TRUECOLOR;
0491 info->fix.ypanstep = 1;
0492 info->fix.xpanstep = 1;
0493 info->fix.ywrapstep = 0;
0494 info->fix.accel = FB_ACCEL_NONE;
0495 info->screen_base = vinfo->vram_logical;
0496 info->pseudo_palette = vinfo->pseudo_palette;
0497 info->par = par;
0498 info->fbops = &vmlfb_ops;
0499 info->device = &dev->dev;
0500
0501 INIT_LIST_HEAD(&vinfo->head);
0502 vinfo->pipe_disabled = 1;
0503 vinfo->cur_blank_mode = FB_BLANK_UNBLANK;
0504
0505 info->var.grayscale = 0;
0506 info->var.bits_per_pixel = 16;
0507 vmlfb_set_pref_pixel_format(&info->var);
0508
0509 if (!fb_find_mode
0510 (&info->var, info, vml_default_mode, NULL, 0, &defaultmode, 16)) {
0511 printk(KERN_ERR MODULE_NAME ": Could not find initial mode\n");
0512 }
0513
0514 if (fb_alloc_cmap(&info->cmap, 256, 1) < 0) {
0515 err = -ENOMEM;
0516 goto out_err_4;
0517 }
0518
0519 err = register_framebuffer(info);
0520 if (err) {
0521 printk(KERN_ERR MODULE_NAME ": Register framebuffer error.\n");
0522 goto out_err_5;
0523 }
0524
0525 printk("Initialized vmlfb\n");
0526
0527 return 0;
0528
0529 out_err_5:
0530 fb_dealloc_cmap(&info->cmap);
0531 out_err_4:
0532 vmlfb_free_vram(vinfo);
0533 out_err_3:
0534 vmlfb_disable_mmio(par);
0535 out_err_2:
0536 vmlfb_release_devices(par);
0537 out_err_1:
0538 kfree(vinfo);
0539 out_err_0:
0540 kfree(par);
0541 return err;
0542 }
0543
0544 static int vmlfb_open(struct fb_info *info, int user)
0545 {
0546
0547
0548
0549 return 0;
0550 }
0551
0552 static int vmlfb_release(struct fb_info *info, int user)
0553 {
0554
0555
0556
0557
0558 return 0;
0559 }
0560
0561 static int vml_nearest_clock(int clock)
0562 {
0563
0564 int i;
0565 int cur_index;
0566 int cur_diff;
0567 int diff;
0568
0569 cur_index = 0;
0570 cur_diff = clock - vml_clocks[0];
0571 cur_diff = (cur_diff < 0) ? -cur_diff : cur_diff;
0572 for (i = 1; i < vml_num_clocks; ++i) {
0573 diff = clock - vml_clocks[i];
0574 diff = (diff < 0) ? -diff : diff;
0575 if (diff < cur_diff) {
0576 cur_index = i;
0577 cur_diff = diff;
0578 }
0579 }
0580 return vml_clocks[cur_index];
0581 }
0582
0583 static int vmlfb_check_var_locked(struct fb_var_screeninfo *var,
0584 struct vml_info *vinfo)
0585 {
0586 u32 pitch;
0587 u64 mem;
0588 int nearest_clock;
0589 int clock;
0590 int clock_diff;
0591 struct fb_var_screeninfo v;
0592
0593 v = *var;
0594 clock = PICOS2KHZ(var->pixclock);
0595
0596 if (subsys && subsys->nearest_clock) {
0597 nearest_clock = subsys->nearest_clock(subsys, clock);
0598 } else {
0599 nearest_clock = vml_nearest_clock(clock);
0600 }
0601
0602
0603
0604
0605
0606 clock_diff = nearest_clock - clock;
0607 clock_diff = (clock_diff < 0) ? -clock_diff : clock_diff;
0608 if (clock_diff > clock / 5) {
0609 #if 0
0610 printk(KERN_DEBUG MODULE_NAME ": Diff failure. %d %d\n",clock_diff,clock);
0611 #endif
0612 return -EINVAL;
0613 }
0614
0615 v.pixclock = KHZ2PICOS(nearest_clock);
0616
0617 if (var->xres > VML_MAX_XRES || var->yres > VML_MAX_YRES) {
0618 printk(KERN_DEBUG MODULE_NAME ": Resolution failure.\n");
0619 return -EINVAL;
0620 }
0621 if (var->xres_virtual > VML_MAX_XRES_VIRTUAL) {
0622 printk(KERN_DEBUG MODULE_NAME
0623 ": Virtual resolution failure.\n");
0624 return -EINVAL;
0625 }
0626 switch (v.bits_per_pixel) {
0627 case 0 ... 16:
0628 v.bits_per_pixel = 16;
0629 break;
0630 case 17 ... 32:
0631 v.bits_per_pixel = 32;
0632 break;
0633 default:
0634 printk(KERN_DEBUG MODULE_NAME ": Invalid bpp: %d.\n",
0635 var->bits_per_pixel);
0636 return -EINVAL;
0637 }
0638
0639 pitch = ALIGN((var->xres * var->bits_per_pixel) >> 3, 0x40);
0640 mem = (u64)pitch * var->yres_virtual;
0641 if (mem > vinfo->vram_contig_size) {
0642 return -ENOMEM;
0643 }
0644
0645 switch (v.bits_per_pixel) {
0646 case 16:
0647 if (var->blue.offset != 0 ||
0648 var->blue.length != 5 ||
0649 var->green.offset != 5 ||
0650 var->green.length != 5 ||
0651 var->red.offset != 10 ||
0652 var->red.length != 5 ||
0653 var->transp.offset != 15 || var->transp.length != 1) {
0654 vmlfb_set_pref_pixel_format(&v);
0655 }
0656 break;
0657 case 32:
0658 if (var->blue.offset != 0 ||
0659 var->blue.length != 8 ||
0660 var->green.offset != 8 ||
0661 var->green.length != 8 ||
0662 var->red.offset != 16 ||
0663 var->red.length != 8 ||
0664 (var->transp.length != 0 && var->transp.length != 8) ||
0665 (var->transp.length == 8 && var->transp.offset != 24)) {
0666 vmlfb_set_pref_pixel_format(&v);
0667 }
0668 break;
0669 default:
0670 return -EINVAL;
0671 }
0672
0673 *var = v;
0674
0675 return 0;
0676 }
0677
0678 static int vmlfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
0679 {
0680 struct vml_info *vinfo = container_of(info, struct vml_info, info);
0681 int ret;
0682
0683 mutex_lock(&vml_mutex);
0684 ret = vmlfb_check_var_locked(var, vinfo);
0685 mutex_unlock(&vml_mutex);
0686
0687 return ret;
0688 }
0689
0690 static void vml_wait_vblank(struct vml_info *vinfo)
0691 {
0692
0693 mdelay(20);
0694 }
0695
0696 static void vmlfb_disable_pipe(struct vml_info *vinfo)
0697 {
0698 struct vml_par *par = vinfo->par;
0699
0700
0701 VML_WRITE32(par, VML_RCOMPSTAT, 0);
0702 while (!(VML_READ32(par, VML_RCOMPSTAT) & VML_MDVO_VDC_I_RCOMP)) ;
0703
0704
0705 VML_WRITE32(par, VML_DSPCCNTR,
0706 VML_READ32(par, VML_DSPCCNTR) & ~VML_GFX_ENABLE);
0707 (void)VML_READ32(par, VML_DSPCCNTR);
0708
0709 vml_wait_vblank(vinfo);
0710
0711
0712 VML_WRITE32(par, VML_PIPEACONF, 0);
0713 (void)VML_READ32(par, VML_PIPEACONF);
0714
0715 vinfo->pipe_disabled = 1;
0716 }
0717
0718 #ifdef VERMILION_DEBUG
0719 static void vml_dump_regs(struct vml_info *vinfo)
0720 {
0721 struct vml_par *par = vinfo->par;
0722
0723 printk(KERN_DEBUG MODULE_NAME ": Modesetting register dump:\n");
0724 printk(KERN_DEBUG MODULE_NAME ": \tHTOTAL_A : 0x%08x\n",
0725 (unsigned)VML_READ32(par, VML_HTOTAL_A));
0726 printk(KERN_DEBUG MODULE_NAME ": \tHBLANK_A : 0x%08x\n",
0727 (unsigned)VML_READ32(par, VML_HBLANK_A));
0728 printk(KERN_DEBUG MODULE_NAME ": \tHSYNC_A : 0x%08x\n",
0729 (unsigned)VML_READ32(par, VML_HSYNC_A));
0730 printk(KERN_DEBUG MODULE_NAME ": \tVTOTAL_A : 0x%08x\n",
0731 (unsigned)VML_READ32(par, VML_VTOTAL_A));
0732 printk(KERN_DEBUG MODULE_NAME ": \tVBLANK_A : 0x%08x\n",
0733 (unsigned)VML_READ32(par, VML_VBLANK_A));
0734 printk(KERN_DEBUG MODULE_NAME ": \tVSYNC_A : 0x%08x\n",
0735 (unsigned)VML_READ32(par, VML_VSYNC_A));
0736 printk(KERN_DEBUG MODULE_NAME ": \tDSPCSTRIDE : 0x%08x\n",
0737 (unsigned)VML_READ32(par, VML_DSPCSTRIDE));
0738 printk(KERN_DEBUG MODULE_NAME ": \tDSPCSIZE : 0x%08x\n",
0739 (unsigned)VML_READ32(par, VML_DSPCSIZE));
0740 printk(KERN_DEBUG MODULE_NAME ": \tDSPCPOS : 0x%08x\n",
0741 (unsigned)VML_READ32(par, VML_DSPCPOS));
0742 printk(KERN_DEBUG MODULE_NAME ": \tDSPARB : 0x%08x\n",
0743 (unsigned)VML_READ32(par, VML_DSPARB));
0744 printk(KERN_DEBUG MODULE_NAME ": \tDSPCADDR : 0x%08x\n",
0745 (unsigned)VML_READ32(par, VML_DSPCADDR));
0746 printk(KERN_DEBUG MODULE_NAME ": \tBCLRPAT_A : 0x%08x\n",
0747 (unsigned)VML_READ32(par, VML_BCLRPAT_A));
0748 printk(KERN_DEBUG MODULE_NAME ": \tCANVSCLR_A : 0x%08x\n",
0749 (unsigned)VML_READ32(par, VML_CANVSCLR_A));
0750 printk(KERN_DEBUG MODULE_NAME ": \tPIPEASRC : 0x%08x\n",
0751 (unsigned)VML_READ32(par, VML_PIPEASRC));
0752 printk(KERN_DEBUG MODULE_NAME ": \tPIPEACONF : 0x%08x\n",
0753 (unsigned)VML_READ32(par, VML_PIPEACONF));
0754 printk(KERN_DEBUG MODULE_NAME ": \tDSPCCNTR : 0x%08x\n",
0755 (unsigned)VML_READ32(par, VML_DSPCCNTR));
0756 printk(KERN_DEBUG MODULE_NAME ": \tRCOMPSTAT : 0x%08x\n",
0757 (unsigned)VML_READ32(par, VML_RCOMPSTAT));
0758 printk(KERN_DEBUG MODULE_NAME ": End of modesetting register dump.\n");
0759 }
0760 #endif
0761
0762 static int vmlfb_set_par_locked(struct vml_info *vinfo)
0763 {
0764 struct vml_par *par = vinfo->par;
0765 struct fb_info *info = &vinfo->info;
0766 struct fb_var_screeninfo *var = &info->var;
0767 u32 htotal, hactive, hblank_start, hblank_end, hsync_start, hsync_end;
0768 u32 vtotal, vactive, vblank_start, vblank_end, vsync_start, vsync_end;
0769 u32 dspcntr;
0770 int clock;
0771
0772 vinfo->bytes_per_pixel = var->bits_per_pixel >> 3;
0773 vinfo->stride = ALIGN(var->xres_virtual * vinfo->bytes_per_pixel, 0x40);
0774 info->fix.line_length = vinfo->stride;
0775
0776 if (!subsys)
0777 return 0;
0778
0779 htotal =
0780 var->xres + var->right_margin + var->hsync_len + var->left_margin;
0781 hactive = var->xres;
0782 hblank_start = var->xres;
0783 hblank_end = htotal;
0784 hsync_start = hactive + var->right_margin;
0785 hsync_end = hsync_start + var->hsync_len;
0786
0787 vtotal =
0788 var->yres + var->lower_margin + var->vsync_len + var->upper_margin;
0789 vactive = var->yres;
0790 vblank_start = var->yres;
0791 vblank_end = vtotal;
0792 vsync_start = vactive + var->lower_margin;
0793 vsync_end = vsync_start + var->vsync_len;
0794
0795 dspcntr = VML_GFX_ENABLE | VML_GFX_GAMMABYPASS;
0796 clock = PICOS2KHZ(var->pixclock);
0797
0798 if (subsys->nearest_clock) {
0799 clock = subsys->nearest_clock(subsys, clock);
0800 } else {
0801 clock = vml_nearest_clock(clock);
0802 }
0803 printk(KERN_DEBUG MODULE_NAME
0804 ": Set mode Hfreq : %d kHz, Vfreq : %d Hz.\n", clock / htotal,
0805 ((clock / htotal) * 1000) / vtotal);
0806
0807 switch (var->bits_per_pixel) {
0808 case 16:
0809 dspcntr |= VML_GFX_ARGB1555;
0810 break;
0811 case 32:
0812 if (var->transp.length == 8)
0813 dspcntr |= VML_GFX_ARGB8888 | VML_GFX_ALPHAMULT;
0814 else
0815 dspcntr |= VML_GFX_RGB0888;
0816 break;
0817 default:
0818 return -EINVAL;
0819 }
0820
0821 vmlfb_disable_pipe(vinfo);
0822 mb();
0823
0824 if (subsys->set_clock)
0825 subsys->set_clock(subsys, clock);
0826 else
0827 return -EINVAL;
0828
0829 VML_WRITE32(par, VML_HTOTAL_A, ((htotal - 1) << 16) | (hactive - 1));
0830 VML_WRITE32(par, VML_HBLANK_A,
0831 ((hblank_end - 1) << 16) | (hblank_start - 1));
0832 VML_WRITE32(par, VML_HSYNC_A,
0833 ((hsync_end - 1) << 16) | (hsync_start - 1));
0834 VML_WRITE32(par, VML_VTOTAL_A, ((vtotal - 1) << 16) | (vactive - 1));
0835 VML_WRITE32(par, VML_VBLANK_A,
0836 ((vblank_end - 1) << 16) | (vblank_start - 1));
0837 VML_WRITE32(par, VML_VSYNC_A,
0838 ((vsync_end - 1) << 16) | (vsync_start - 1));
0839 VML_WRITE32(par, VML_DSPCSTRIDE, vinfo->stride);
0840 VML_WRITE32(par, VML_DSPCSIZE,
0841 ((var->yres - 1) << 16) | (var->xres - 1));
0842 VML_WRITE32(par, VML_DSPCPOS, 0x00000000);
0843 VML_WRITE32(par, VML_DSPARB, VML_FIFO_DEFAULT);
0844 VML_WRITE32(par, VML_BCLRPAT_A, 0x00000000);
0845 VML_WRITE32(par, VML_CANVSCLR_A, 0x00000000);
0846 VML_WRITE32(par, VML_PIPEASRC,
0847 ((var->xres - 1) << 16) | (var->yres - 1));
0848
0849 wmb();
0850 VML_WRITE32(par, VML_PIPEACONF, VML_PIPE_ENABLE);
0851 wmb();
0852 VML_WRITE32(par, VML_DSPCCNTR, dspcntr);
0853 wmb();
0854 VML_WRITE32(par, VML_DSPCADDR, (u32) vinfo->vram_start +
0855 var->yoffset * vinfo->stride +
0856 var->xoffset * vinfo->bytes_per_pixel);
0857
0858 VML_WRITE32(par, VML_RCOMPSTAT, VML_MDVO_PAD_ENABLE);
0859
0860 while (!(VML_READ32(par, VML_RCOMPSTAT) &
0861 (VML_MDVO_VDC_I_RCOMP | VML_MDVO_PAD_ENABLE))) ;
0862
0863 vinfo->pipe_disabled = 0;
0864 #ifdef VERMILION_DEBUG
0865 vml_dump_regs(vinfo);
0866 #endif
0867
0868 return 0;
0869 }
0870
0871 static int vmlfb_set_par(struct fb_info *info)
0872 {
0873 struct vml_info *vinfo = container_of(info, struct vml_info, info);
0874 int ret;
0875
0876 mutex_lock(&vml_mutex);
0877 list_move(&vinfo->head, (subsys) ? &global_has_mode : &global_no_mode);
0878 ret = vmlfb_set_par_locked(vinfo);
0879
0880 mutex_unlock(&vml_mutex);
0881 return ret;
0882 }
0883
0884 static int vmlfb_blank_locked(struct vml_info *vinfo)
0885 {
0886 struct vml_par *par = vinfo->par;
0887 u32 cur = VML_READ32(par, VML_PIPEACONF);
0888
0889 switch (vinfo->cur_blank_mode) {
0890 case FB_BLANK_UNBLANK:
0891 if (vinfo->pipe_disabled) {
0892 vmlfb_set_par_locked(vinfo);
0893 }
0894 VML_WRITE32(par, VML_PIPEACONF, cur & ~VML_PIPE_FORCE_BORDER);
0895 (void)VML_READ32(par, VML_PIPEACONF);
0896 break;
0897 case FB_BLANK_NORMAL:
0898 if (vinfo->pipe_disabled) {
0899 vmlfb_set_par_locked(vinfo);
0900 }
0901 VML_WRITE32(par, VML_PIPEACONF, cur | VML_PIPE_FORCE_BORDER);
0902 (void)VML_READ32(par, VML_PIPEACONF);
0903 break;
0904 case FB_BLANK_VSYNC_SUSPEND:
0905 case FB_BLANK_HSYNC_SUSPEND:
0906 if (!vinfo->pipe_disabled) {
0907 vmlfb_disable_pipe(vinfo);
0908 }
0909 break;
0910 case FB_BLANK_POWERDOWN:
0911 if (!vinfo->pipe_disabled) {
0912 vmlfb_disable_pipe(vinfo);
0913 }
0914 break;
0915 default:
0916 return -EINVAL;
0917 }
0918
0919 return 0;
0920 }
0921
0922 static int vmlfb_blank(int blank_mode, struct fb_info *info)
0923 {
0924 struct vml_info *vinfo = container_of(info, struct vml_info, info);
0925 int ret;
0926
0927 mutex_lock(&vml_mutex);
0928 vinfo->cur_blank_mode = blank_mode;
0929 ret = vmlfb_blank_locked(vinfo);
0930 mutex_unlock(&vml_mutex);
0931 return ret;
0932 }
0933
0934 static int vmlfb_pan_display(struct fb_var_screeninfo *var,
0935 struct fb_info *info)
0936 {
0937 struct vml_info *vinfo = container_of(info, struct vml_info, info);
0938 struct vml_par *par = vinfo->par;
0939
0940 mutex_lock(&vml_mutex);
0941 VML_WRITE32(par, VML_DSPCADDR, (u32) vinfo->vram_start +
0942 var->yoffset * vinfo->stride +
0943 var->xoffset * vinfo->bytes_per_pixel);
0944 (void)VML_READ32(par, VML_DSPCADDR);
0945 mutex_unlock(&vml_mutex);
0946
0947 return 0;
0948 }
0949
0950 static int vmlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
0951 u_int transp, struct fb_info *info)
0952 {
0953 u32 v;
0954
0955 if (regno >= 16)
0956 return -EINVAL;
0957
0958 if (info->var.grayscale) {
0959 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
0960 }
0961
0962 if (info->fix.visual != FB_VISUAL_TRUECOLOR)
0963 return -EINVAL;
0964
0965 red = VML_TOHW(red, info->var.red.length);
0966 blue = VML_TOHW(blue, info->var.blue.length);
0967 green = VML_TOHW(green, info->var.green.length);
0968 transp = VML_TOHW(transp, info->var.transp.length);
0969
0970 v = (red << info->var.red.offset) |
0971 (green << info->var.green.offset) |
0972 (blue << info->var.blue.offset) |
0973 (transp << info->var.transp.offset);
0974
0975 switch (info->var.bits_per_pixel) {
0976 case 16:
0977 ((u32 *) info->pseudo_palette)[regno] = v;
0978 break;
0979 case 24:
0980 case 32:
0981 ((u32 *) info->pseudo_palette)[regno] = v;
0982 break;
0983 }
0984 return 0;
0985 }
0986
0987 static int vmlfb_mmap(struct fb_info *info, struct vm_area_struct *vma)
0988 {
0989 struct vml_info *vinfo = container_of(info, struct vml_info, info);
0990 unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
0991 int ret;
0992 unsigned long prot;
0993
0994 ret = vmlfb_vram_offset(vinfo, offset);
0995 if (ret)
0996 return -EINVAL;
0997
0998 prot = pgprot_val(vma->vm_page_prot) & ~_PAGE_CACHE_MASK;
0999 pgprot_val(vma->vm_page_prot) =
1000 prot | cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS);
1001
1002 return vm_iomap_memory(vma, vinfo->vram_start,
1003 vinfo->vram_contig_size);
1004 }
1005
1006 static int vmlfb_sync(struct fb_info *info)
1007 {
1008 return 0;
1009 }
1010
1011 static int vmlfb_cursor(struct fb_info *info, struct fb_cursor *cursor)
1012 {
1013 return -EINVAL;
1014 }
1015
1016 static struct fb_ops vmlfb_ops = {
1017 .owner = THIS_MODULE,
1018 .fb_open = vmlfb_open,
1019 .fb_release = vmlfb_release,
1020 .fb_check_var = vmlfb_check_var,
1021 .fb_set_par = vmlfb_set_par,
1022 .fb_blank = vmlfb_blank,
1023 .fb_pan_display = vmlfb_pan_display,
1024 .fb_fillrect = cfb_fillrect,
1025 .fb_copyarea = cfb_copyarea,
1026 .fb_imageblit = cfb_imageblit,
1027 .fb_cursor = vmlfb_cursor,
1028 .fb_sync = vmlfb_sync,
1029 .fb_mmap = vmlfb_mmap,
1030 .fb_setcolreg = vmlfb_setcolreg
1031 };
1032
1033 static const struct pci_device_id vml_ids[] = {
1034 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, VML_DEVICE_VDC)},
1035 {0}
1036 };
1037
1038 static struct pci_driver vmlfb_pci_driver = {
1039 .name = "vmlfb",
1040 .id_table = vml_ids,
1041 .probe = vml_pci_probe,
1042 .remove = vml_pci_remove,
1043 };
1044
1045 static void __exit vmlfb_cleanup(void)
1046 {
1047 pci_unregister_driver(&vmlfb_pci_driver);
1048 }
1049
1050 static int __init vmlfb_init(void)
1051 {
1052
1053 #ifndef MODULE
1054 char *option = NULL;
1055
1056 if (fb_get_options(MODULE_NAME, &option))
1057 return -ENODEV;
1058 #endif
1059
1060 printk(KERN_DEBUG MODULE_NAME ": initializing\n");
1061 mutex_init(&vml_mutex);
1062 INIT_LIST_HEAD(&global_no_mode);
1063 INIT_LIST_HEAD(&global_has_mode);
1064
1065 return pci_register_driver(&vmlfb_pci_driver);
1066 }
1067
1068 int vmlfb_register_subsys(struct vml_sys *sys)
1069 {
1070 struct vml_info *entry;
1071 struct list_head *list;
1072 u32 save_activate;
1073
1074 mutex_lock(&vml_mutex);
1075 if (subsys != NULL) {
1076 subsys->restore(subsys);
1077 }
1078 subsys = sys;
1079 subsys->save(subsys);
1080
1081
1082
1083
1084
1085
1086 list = global_no_mode.next;
1087 while (list != &global_no_mode) {
1088 list_del_init(list);
1089 entry = list_entry(list, struct vml_info, head);
1090
1091
1092
1093
1094
1095
1096 if (!vmlfb_check_var_locked(&entry->info.var, entry)) {
1097 vmlfb_set_par_locked(entry);
1098 list_add_tail(list, &global_has_mode);
1099 } else {
1100
1101
1102
1103
1104
1105
1106 mutex_unlock(&vml_mutex);
1107 save_activate = entry->info.var.activate;
1108 entry->info.var.bits_per_pixel = 16;
1109 vmlfb_set_pref_pixel_format(&entry->info.var);
1110 if (fb_find_mode(&entry->info.var,
1111 &entry->info,
1112 vml_default_mode, NULL, 0, NULL, 16)) {
1113 entry->info.var.activate |=
1114 FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
1115 fb_set_var(&entry->info, &entry->info.var);
1116 } else {
1117 printk(KERN_ERR MODULE_NAME
1118 ": Sorry. no mode found for this subsys.\n");
1119 }
1120 entry->info.var.activate = save_activate;
1121 mutex_lock(&vml_mutex);
1122 }
1123 vmlfb_blank_locked(entry);
1124 list = global_no_mode.next;
1125 }
1126 mutex_unlock(&vml_mutex);
1127
1128 printk(KERN_DEBUG MODULE_NAME ": Registered %s subsystem.\n",
1129 subsys->name ? subsys->name : "unknown");
1130 return 0;
1131 }
1132
1133 EXPORT_SYMBOL_GPL(vmlfb_register_subsys);
1134
1135 void vmlfb_unregister_subsys(struct vml_sys *sys)
1136 {
1137 struct vml_info *entry, *next;
1138
1139 mutex_lock(&vml_mutex);
1140 if (subsys != sys) {
1141 mutex_unlock(&vml_mutex);
1142 return;
1143 }
1144 subsys->restore(subsys);
1145 subsys = NULL;
1146 list_for_each_entry_safe(entry, next, &global_has_mode, head) {
1147 printk(KERN_DEBUG MODULE_NAME ": subsys disable pipe\n");
1148 vmlfb_disable_pipe(entry);
1149 list_move_tail(&entry->head, &global_no_mode);
1150 }
1151 mutex_unlock(&vml_mutex);
1152 }
1153
1154 EXPORT_SYMBOL_GPL(vmlfb_unregister_subsys);
1155
1156 module_init(vmlfb_init);
1157 module_exit(vmlfb_cleanup);
1158
1159 MODULE_AUTHOR("Tungsten Graphics");
1160 MODULE_DESCRIPTION("Initialization of the Vermilion display devices");
1161 MODULE_VERSION("1.0.0");
1162 MODULE_LICENSE("GPL");