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0001 /* SPDX-License-Identifier: GPL-2.0-or-later */ 0002 /* 0003 * valkyriefb.h: Constants of all sorts for valkyriefb 0004 * 0005 * Created 8 August 1998 by 0006 * Martin Costabel <costabel@wanadoo.fr> and Kevin Schoedel 0007 * 0008 * Vmode-switching changes and vmode 15/17 modifications created 29 August 0009 * 1998 by Barry K. Nathan <barryn@pobox.com>. 0010 * 0011 * vmode 10 changed by Steven Borley <sjb@salix.demon.co.uk>, 14 mai 2000 0012 * 0013 * Ported to 68k Macintosh by David Huggins-Daines <dhd@debian.org> 0014 * 0015 * Based directly on: 0016 * 0017 * controlfb.h: Constants of all sorts for controlfb 0018 * Copyright (C) 1998 Daniel Jacobowitz <dan@debian.org> 0019 * 0020 * pmc-valkyrie.h: Console support for PowerMac "control" display adaptor. 0021 * Copyright (C) 1997 Paul Mackerras. 0022 * 0023 * pmc-valkyrie.c: Console support for PowerMac "control" display adaptor. 0024 * Copyright (C) 1997 Paul Mackerras. 0025 * 0026 * and indirectly from: 0027 * 0028 * pmc-control.h: Console support for PowerMac "control" display adaptor. 0029 * Copyright (C) 1997 Paul Mackerras. 0030 * 0031 * pmc-control.c: Console support for PowerMac "control" display adaptor. 0032 * Copyright (C) 1996 Paul Mackerras. 0033 * 0034 * platinumfb.c: Console support for PowerMac "platinum" display adaptor. 0035 * Copyright (C) 1998 Jon Howell 0036 */ 0037 0038 #ifdef CONFIG_MAC 0039 /* Valkyrie registers are word-aligned on m68k */ 0040 #define VALKYRIE_REG_PADSIZE 3 0041 #else 0042 #define VALKYRIE_REG_PADSIZE 7 0043 #endif 0044 0045 /* 0046 * Structure of the registers for the Valkyrie colormap registers. 0047 */ 0048 struct cmap_regs { 0049 unsigned char addr; 0050 char pad1[VALKYRIE_REG_PADSIZE]; 0051 unsigned char lut; 0052 }; 0053 0054 /* 0055 * Structure of the registers for the "valkyrie" display adaptor. 0056 */ 0057 0058 struct vpreg { /* padded register */ 0059 unsigned char r; 0060 char pad[VALKYRIE_REG_PADSIZE]; 0061 }; 0062 0063 0064 struct valkyrie_regs { 0065 struct vpreg mode; 0066 struct vpreg depth; 0067 struct vpreg status; 0068 struct vpreg reg3; 0069 struct vpreg intr; 0070 struct vpreg reg5; 0071 struct vpreg intr_enb; 0072 struct vpreg msense; 0073 }; 0074 0075 /* 0076 * Register initialization tables for the valkyrie display. 0077 * 0078 * Dot clock rate is 0079 * 3.9064MHz * 2**clock_params[2] * clock_params[1] / clock_params[0]. 0080 */ 0081 struct valkyrie_regvals { 0082 unsigned char mode; 0083 unsigned char clock_params[3]; 0084 int pitch[2]; /* bytes/line, indexed by color_mode */ 0085 int hres; 0086 int vres; 0087 }; 0088 0089 #ifndef CONFIG_MAC 0090 /* Register values for 1024x768, 75Hz mode (17) */ 0091 /* I'm not sure which mode this is (16 or 17), so I'm defining it as 17, 0092 * since the equivalent mode in controlfb (which I adapted this from) is 0093 * also 17. Just because MacOS can't do this on Valkyrie doesn't mean we 0094 * can't! :) 0095 * 0096 * I was going to use 12, 31, 3, which I found by myself, but instead I'm 0097 * using 11, 28, 3 like controlfb, for consistency's sake. 0098 */ 0099 0100 static struct valkyrie_regvals valkyrie_reg_init_17 = { 0101 15, 0102 { 11, 28, 3 }, /* pixel clock = 79.55MHz for V=74.50Hz */ 0103 { 1024, 0 }, 0104 1024, 768 0105 }; 0106 0107 /* Register values for 1024x768, 72Hz mode (15) */ 0108 /* This used to be 12, 30, 3 for pixel clock = 78.12MHz for V=72.12Hz, but 0109 * that didn't match MacOS in the same video mode on this chip, and it also 0110 * caused the 15" Apple Studio Display to not work in this mode. While this 0111 * mode still doesn't match MacOS exactly (as far as I can tell), it's a lot 0112 * closer now, and it works with the Apple Studio Display. 0113 * 0114 * Yes, even though MacOS calls it "72Hz", in reality it's about 70Hz. 0115 */ 0116 static struct valkyrie_regvals valkyrie_reg_init_15 = { 0117 15, 0118 { 12, 29, 3 }, /* pixel clock = 75.52MHz for V=69.71Hz? */ 0119 /* I interpolated the V=69.71 from the vmode 14 and old 15 0120 * numbers. Is this result correct? 0121 */ 0122 { 1024, 0 }, 0123 1024, 768 0124 }; 0125 0126 /* Register values for 1024x768, 60Hz mode (14) */ 0127 static struct valkyrie_regvals valkyrie_reg_init_14 = { 0128 14, 0129 { 15, 31, 3 }, /* pixel clock = 64.58MHz for V=59.62Hz */ 0130 { 1024, 0 }, 0131 1024, 768 0132 }; 0133 #endif /* !defined CONFIG_MAC */ 0134 0135 /* Register values for 832x624, 75Hz mode (13) */ 0136 static struct valkyrie_regvals valkyrie_reg_init_13 = { 0137 9, 0138 { 23, 42, 3 }, /* pixel clock = 57.07MHz for V=74.27Hz */ 0139 { 832, 0 }, 0140 832, 624 0141 }; 0142 0143 /* Register values for 800x600, 72Hz mode (11) */ 0144 static struct valkyrie_regvals valkyrie_reg_init_11 = { 0145 13, 0146 { 17, 27, 3 }, /* pixel clock = 49.63MHz for V=71.66Hz */ 0147 { 800, 0 }, 0148 800, 600 0149 }; 0150 0151 /* Register values for 800x600, 60Hz mode (10) */ 0152 static struct valkyrie_regvals valkyrie_reg_init_10 = { 0153 12, 0154 { 25, 32, 3 }, /* pixel clock = 40.0015MHz, 0155 used to be 20,53,2, pixel clock 41.41MHz for V=59.78Hz */ 0156 { 800, 1600 }, 0157 800, 600 0158 }; 0159 0160 /* Register values for 640x480, 67Hz mode (6) */ 0161 static struct valkyrie_regvals valkyrie_reg_init_6 = { 0162 6, 0163 { 14, 27, 2 }, /* pixel clock = 30.13MHz for V=66.43Hz */ 0164 { 640, 1280 }, 0165 640, 480 0166 }; 0167 0168 /* Register values for 640x480, 60Hz mode (5) */ 0169 static struct valkyrie_regvals valkyrie_reg_init_5 = { 0170 11, 0171 { 23, 37, 2 }, /* pixel clock = 25.14MHz for V=59.85Hz */ 0172 { 640, 1280 }, 0173 640, 480 0174 }; 0175 0176 static struct valkyrie_regvals *valkyrie_reg_init[VMODE_MAX] = { 0177 NULL, 0178 NULL, 0179 NULL, 0180 NULL, 0181 &valkyrie_reg_init_5, 0182 &valkyrie_reg_init_6, 0183 NULL, 0184 NULL, 0185 NULL, 0186 &valkyrie_reg_init_10, 0187 &valkyrie_reg_init_11, 0188 NULL, 0189 &valkyrie_reg_init_13, 0190 #ifndef CONFIG_MAC 0191 &valkyrie_reg_init_14, 0192 &valkyrie_reg_init_15, 0193 NULL, 0194 &valkyrie_reg_init_17, 0195 #endif 0196 };
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