0001
0002 #ifndef __RIVAFB_H
0003 #define __RIVAFB_H
0004
0005 #include <linux/fb.h>
0006 #include <video/vga.h>
0007 #include <linux/i2c.h>
0008 #include <linux/i2c-algo-bit.h>
0009
0010 #include "riva_hw.h"
0011
0012
0013 #define NUM_SEQ_REGS 0x05
0014 #define NUM_CRT_REGS 0x41
0015 #define NUM_GRC_REGS 0x09
0016 #define NUM_ATC_REGS 0x15
0017
0018
0019 #define DDC_SCL_READ_MASK (1 << 2)
0020 #define DDC_SCL_WRITE_MASK (1 << 5)
0021 #define DDC_SDA_READ_MASK (1 << 3)
0022 #define DDC_SDA_WRITE_MASK (1 << 4)
0023
0024
0025
0026 struct riva_regs {
0027 u8 attr[NUM_ATC_REGS];
0028 u8 crtc[NUM_CRT_REGS];
0029 u8 gra[NUM_GRC_REGS];
0030 u8 seq[NUM_SEQ_REGS];
0031 u8 misc_output;
0032 RIVA_HW_STATE ext;
0033 };
0034
0035 struct riva_par;
0036
0037 struct riva_i2c_chan {
0038 struct riva_par *par;
0039 unsigned long ddc_base;
0040 struct i2c_adapter adapter;
0041 struct i2c_algo_bit_data algo;
0042 };
0043
0044 struct riva_par {
0045 RIVA_HW_INST riva;
0046 u32 pseudo_palette[16];
0047 u32 palette[16];
0048 u8 __iomem *ctrl_base;
0049 unsigned dclk_max;
0050
0051 struct riva_regs initial_state;
0052 struct riva_regs current_state;
0053 #ifdef CONFIG_X86
0054 struct vgastate state;
0055 #endif
0056 struct mutex open_lock;
0057 unsigned int ref_count;
0058 unsigned char *EDID;
0059 unsigned int Chipset;
0060 int forceCRTC;
0061 Bool SecondCRTC;
0062 int FlatPanel;
0063 struct pci_dev *pdev;
0064 int cursor_reset;
0065 int wc_cookie;
0066 struct riva_i2c_chan chan[3];
0067 };
0068
0069 void riva_common_setup(struct riva_par *);
0070 unsigned long riva_get_memlen(struct riva_par *);
0071 unsigned long riva_get_maxdclk(struct riva_par *);
0072 void riva_delete_i2c_busses(struct riva_par *par);
0073 void riva_create_i2c_busses(struct riva_par *par);
0074 int riva_probe_i2c_connector(struct riva_par *par, int conn, u8 **out_edid);
0075
0076 #endif