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0048 #ifndef __RIVA_HW_H__
0049 #define __RIVA_HW_H__
0050 #define RIVA_SW_VERSION 0x00010003
0051
0052 #ifndef Bool
0053 typedef int Bool;
0054 #endif
0055
0056 #ifndef TRUE
0057 #define TRUE 1
0058 #endif
0059 #ifndef FALSE
0060 #define FALSE 0
0061 #endif
0062 #ifndef NULL
0063 #define NULL 0
0064 #endif
0065
0066
0067
0068
0069 typedef unsigned char U008;
0070 typedef unsigned short U016;
0071 typedef unsigned int U032;
0072
0073
0074
0075
0076 #include <asm/io.h>
0077
0078 #define NV_WR08(p,i,d) (__raw_writeb((d), (void __iomem *)(p) + (i)))
0079 #define NV_RD08(p,i) (__raw_readb((void __iomem *)(p) + (i)))
0080 #define NV_WR16(p,i,d) (__raw_writew((d), (void __iomem *)(p) + (i)))
0081 #define NV_RD16(p,i) (__raw_readw((void __iomem *)(p) + (i)))
0082 #define NV_WR32(p,i,d) (__raw_writel((d), (void __iomem *)(p) + (i)))
0083 #define NV_RD32(p,i) (__raw_readl((void __iomem *)(p) + (i)))
0084
0085 #define VGA_WR08(p,i,d) (writeb((d), (void __iomem *)(p) + (i)))
0086 #define VGA_RD08(p,i) (readb((void __iomem *)(p) + (i)))
0087
0088
0089
0090
0091 #define NV_ARCH_03 0x03
0092 #define NV_ARCH_04 0x04
0093 #define NV_ARCH_10 0x10
0094 #define NV_ARCH_20 0x20
0095 #define NV_ARCH_30 0x30
0096 #define NV_ARCH_40 0x40
0097
0098
0099
0100
0101
0102
0103
0104
0105
0106
0107 typedef volatile struct
0108 {
0109 U032 reserved00[4];
0110 #ifdef __BIG_ENDIAN
0111 U032 FifoFree;
0112 #else
0113 U016 FifoFree;
0114 U016 Nop;
0115 #endif
0116 U032 reserved01[0x0BB];
0117 U032 Rop3;
0118 } RivaRop;
0119
0120
0121
0122 typedef volatile struct
0123 {
0124 U032 reserved00[4];
0125 #ifdef __BIG_ENDIAN
0126 U032 FifoFree;
0127 #else
0128 U016 FifoFree;
0129 U016 Nop;
0130 #endif
0131 U032 reserved01[0x0BD];
0132 U032 Shape;
0133 U032 reserved03[0x001];
0134 U032 Color0;
0135 U032 Color1;
0136 U032 Monochrome[2];
0137 } RivaPattern;
0138
0139
0140
0141 typedef volatile struct
0142 {
0143 U032 reserved00[4];
0144 #ifdef __BIG_ENDIAN
0145 U032 FifoFree;
0146 #else
0147 U016 FifoFree;
0148 U016 Nop;
0149 #endif
0150 U032 reserved01[0x0BB];
0151 U032 TopLeft;
0152 U032 WidthHeight;
0153 } RivaClip;
0154
0155
0156
0157 typedef volatile struct
0158 {
0159 U032 reserved00[4];
0160 #ifdef __BIG_ENDIAN
0161 U032 FifoFree;
0162 #else
0163 U016 FifoFree;
0164 U016 Nop[1];
0165 #endif
0166 U032 reserved01[0x0BC];
0167 U032 Color;
0168 U032 reserved03[0x03E];
0169 U032 TopLeft;
0170 U032 WidthHeight;
0171 } RivaRectangle;
0172
0173
0174
0175 typedef volatile struct
0176 {
0177 U032 reserved00[4];
0178 #ifdef __BIG_ENDIAN
0179 U032 FifoFree;
0180 #else
0181 U016 FifoFree;
0182 U016 Nop;
0183 #endif
0184 U032 reserved01[0x0BB];
0185 U032 TopLeftSrc;
0186 U032 TopLeftDst;
0187 U032 WidthHeight;
0188 } RivaScreenBlt;
0189
0190
0191
0192 typedef volatile struct
0193 {
0194 U032 reserved00[4];
0195 #ifdef __BIG_ENDIAN
0196 U032 FifoFree;
0197 #else
0198 U016 FifoFree;
0199 U016 Nop[1];
0200 #endif
0201 U032 reserved01[0x0BC];
0202 U032 TopLeft;
0203 U032 WidthHeight;
0204 U032 WidthHeightIn;
0205 U032 reserved02[0x03C];
0206 U032 Pixels;
0207 } RivaPixmap;
0208
0209
0210
0211 typedef volatile struct
0212 {
0213 U032 reserved00[4];
0214 #ifdef __BIG_ENDIAN
0215 U032 FifoFree;
0216 #else
0217 U016 FifoFree;
0218 U016 Nop;
0219 #endif
0220 U032 reserved01[0x0BB];
0221 U032 reserved03[(0x040)-1];
0222 U032 Color1A;
0223 struct
0224 {
0225 U032 TopLeft;
0226 U032 WidthHeight;
0227 } UnclippedRectangle[64];
0228 U032 reserved04[(0x080)-3];
0229 struct
0230 {
0231 U032 TopLeft;
0232 U032 BottomRight;
0233 } ClipB;
0234 U032 Color1B;
0235 struct
0236 {
0237 U032 TopLeft;
0238 U032 BottomRight;
0239 } ClippedRectangle[64];
0240 U032 reserved05[(0x080)-5];
0241 struct
0242 {
0243 U032 TopLeft;
0244 U032 BottomRight;
0245 } ClipC;
0246 U032 Color1C;
0247 U032 WidthHeightC;
0248 U032 PointC;
0249 U032 MonochromeData1C;
0250 U032 reserved06[(0x080)+121];
0251 struct
0252 {
0253 U032 TopLeft;
0254 U032 BottomRight;
0255 } ClipD;
0256 U032 Color1D;
0257 U032 WidthHeightInD;
0258 U032 WidthHeightOutD;
0259 U032 PointD;
0260 U032 MonochromeData1D;
0261 U032 reserved07[(0x080)+120];
0262 struct
0263 {
0264 U032 TopLeft;
0265 U032 BottomRight;
0266 } ClipE;
0267 U032 Color0E;
0268 U032 Color1E;
0269 U032 WidthHeightInE;
0270 U032 WidthHeightOutE;
0271 U032 PointE;
0272 U032 MonochromeData01E;
0273 } RivaBitmap;
0274
0275
0276
0277 typedef volatile struct
0278 {
0279 U032 reserved00[4];
0280 #ifdef __BIG_ENDIAN
0281 U032 FifoFree;
0282 #else
0283 U016 FifoFree;
0284 U016 Nop;
0285 #endif
0286 U032 reserved01[0x0BC];
0287 U032 TextureOffset;
0288 U032 TextureFormat;
0289 U032 TextureFilter;
0290 U032 FogColor;
0291
0292 #ifdef Control
0293 #undef Control
0294 #endif
0295 U032 Control;
0296 U032 AlphaTest;
0297 U032 reserved02[0x339];
0298 U032 FogAndIndex;
0299 U032 Color;
0300 float ScreenX;
0301 float ScreenY;
0302 float ScreenZ;
0303 float EyeM;
0304 float TextureS;
0305 float TextureT;
0306 } RivaTexturedTriangle03;
0307 typedef volatile struct
0308 {
0309 U032 reserved00[4];
0310 #ifdef __BIG_ENDIAN
0311 U032 FifoFree;
0312 #else
0313 U016 FifoFree;
0314 U016 Nop;
0315 #endif
0316 U032 reserved01[0x0BB];
0317 U032 ColorKey;
0318 U032 TextureOffset;
0319 U032 TextureFormat;
0320 U032 TextureFilter;
0321 U032 Blend;
0322
0323 #ifdef Control
0324 #undef Control
0325 #endif
0326 U032 Control;
0327 U032 FogColor;
0328 U032 reserved02[0x39];
0329 struct
0330 {
0331 float ScreenX;
0332 float ScreenY;
0333 float ScreenZ;
0334 float EyeM;
0335 U032 Color;
0336 U032 Specular;
0337 float TextureS;
0338 float TextureT;
0339 } Vertex[16];
0340 U032 DrawTriangle3D;
0341 } RivaTexturedTriangle05;
0342
0343
0344
0345 typedef volatile struct
0346 {
0347 U032 reserved00[4];
0348 #ifdef __BIG_ENDIAN
0349 U032 FifoFree;
0350 #else
0351 U016 FifoFree;
0352 U016 Nop[1];
0353 #endif
0354 U032 reserved01[0x0BC];
0355 U032 Color;
0356 U032 Reserved02[0x03e];
0357 struct {
0358 U032 point0;
0359 U032 point1;
0360 } Lin[16];
0361 struct {
0362 U032 point0X;
0363 U032 point0Y;
0364 U032 point1X;
0365 U032 point1Y;
0366 } Lin32[8];
0367 U032 PolyLin[32];
0368 struct {
0369 U032 x;
0370 U032 y;
0371 } PolyLin32[16];
0372 struct {
0373 U032 color;
0374 U032 point;
0375 } ColorPolyLin[16];
0376 } RivaLine;
0377
0378
0379
0380 typedef volatile struct
0381 {
0382 U032 reserved00[4];
0383 #ifdef __BIG_ENDIAN
0384 U032 FifoFree;
0385 #else
0386 U016 FifoFree;
0387 U016 Nop;
0388 #endif
0389 U032 reserved01[0x0BE];
0390 U032 Offset;
0391 } RivaSurface;
0392 typedef volatile struct
0393 {
0394 U032 reserved00[4];
0395 #ifdef __BIG_ENDIAN
0396 U032 FifoFree;
0397 #else
0398 U016 FifoFree;
0399 U016 Nop;
0400 #endif
0401 U032 reserved01[0x0BD];
0402 U032 Pitch;
0403 U032 RenderBufferOffset;
0404 U032 ZBufferOffset;
0405 } RivaSurface3D;
0406
0407
0408
0409
0410
0411
0412
0413 #define FP_ENABLE 1
0414 #define FP_DITHER 2
0415
0416 struct _riva_hw_inst;
0417 struct _riva_hw_state;
0418
0419
0420
0421 typedef struct _riva_hw_inst
0422 {
0423
0424
0425
0426 U032 Architecture;
0427 U032 Version;
0428 U032 Chipset;
0429 U032 CrystalFreqKHz;
0430 U032 RamAmountKBytes;
0431 U032 MaxVClockFreqKHz;
0432 U032 RamBandwidthKBytesPerSec;
0433 U032 EnableIRQ;
0434 U032 IO;
0435 U032 VBlankBit;
0436 U032 FifoFreeCount;
0437 U032 FifoEmptyCount;
0438 U032 CursorStart;
0439 U032 flatPanel;
0440 Bool twoHeads;
0441
0442
0443
0444 volatile U032 __iomem *PCRTC0;
0445 volatile U032 __iomem *PCRTC;
0446 volatile U032 __iomem *PRAMDAC0;
0447 volatile U032 __iomem *PFB;
0448 volatile U032 __iomem *PFIFO;
0449 volatile U032 __iomem *PGRAPH;
0450 volatile U032 __iomem *PEXTDEV;
0451 volatile U032 __iomem *PTIMER;
0452 volatile U032 __iomem *PMC;
0453 volatile U032 __iomem *PRAMIN;
0454 volatile U032 __iomem *FIFO;
0455 volatile U032 __iomem *CURSOR;
0456 volatile U008 __iomem *PCIO0;
0457 volatile U008 __iomem *PCIO;
0458 volatile U008 __iomem *PVIO;
0459 volatile U008 __iomem *PDIO0;
0460 volatile U008 __iomem *PDIO;
0461 volatile U032 __iomem *PRAMDAC;
0462
0463
0464
0465 int (*Busy)(struct _riva_hw_inst *);
0466 void (*LoadStateExt)(struct _riva_hw_inst *,struct _riva_hw_state *);
0467 void (*UnloadStateExt)(struct _riva_hw_inst *,struct _riva_hw_state *);
0468 void (*SetStartAddress)(struct _riva_hw_inst *,U032);
0469 void (*SetSurfaces2D)(struct _riva_hw_inst *,U032,U032);
0470 void (*SetSurfaces3D)(struct _riva_hw_inst *,U032,U032);
0471 int (*ShowHideCursor)(struct _riva_hw_inst *,int);
0472 void (*LockUnlock)(struct _riva_hw_inst *, int);
0473
0474
0475
0476 struct _riva_hw_state *CurrentState;
0477
0478
0479
0480 RivaRop __iomem *Rop;
0481 RivaPattern __iomem *Patt;
0482 RivaClip __iomem *Clip;
0483 RivaPixmap __iomem *Pixmap;
0484 RivaScreenBlt __iomem *Blt;
0485 RivaBitmap __iomem *Bitmap;
0486 RivaLine __iomem *Line;
0487 RivaTexturedTriangle03 __iomem *Tri03;
0488 RivaTexturedTriangle05 __iomem *Tri05;
0489 } RIVA_HW_INST;
0490
0491
0492
0493 typedef struct _riva_hw_state
0494 {
0495 U032 bpp;
0496 U032 width;
0497 U032 height;
0498 U032 interlace;
0499 U032 repaint0;
0500 U032 repaint1;
0501 U032 screen;
0502 U032 scale;
0503 U032 dither;
0504 U032 extra;
0505 U032 pixel;
0506 U032 horiz;
0507 U032 arbitration0;
0508 U032 arbitration1;
0509 U032 vpll;
0510 U032 vpll2;
0511 U032 pllsel;
0512 U032 general;
0513 U032 crtcOwner;
0514 U032 head;
0515 U032 head2;
0516 U032 config;
0517 U032 cursorConfig;
0518 U032 cursor0;
0519 U032 cursor1;
0520 U032 cursor2;
0521 U032 offset0;
0522 U032 offset1;
0523 U032 offset2;
0524 U032 offset3;
0525 U032 pitch0;
0526 U032 pitch1;
0527 U032 pitch2;
0528 U032 pitch3;
0529 } RIVA_HW_STATE;
0530
0531
0532
0533
0534
0535 extern int CalcStateExt
0536 (
0537 RIVA_HW_INST *chip,
0538 RIVA_HW_STATE *state,
0539 struct pci_dev *pdev,
0540 int bpp,
0541 int width,
0542 int hDisplaySize,
0543 int height,
0544 int dotClock
0545 );
0546
0547
0548
0549
0550 int RivaGetConfig(RIVA_HW_INST *chip, struct pci_dev *pdev, unsigned int c);
0551
0552
0553
0554
0555 #define RIVA_FIFO_FREE(hwinst,hwptr,cnt) \
0556 { \
0557 while ((hwinst).FifoFreeCount < (cnt)) { \
0558 mb();mb(); \
0559 (hwinst).FifoFreeCount = NV_RD32(&(hwinst).hwptr->FifoFree, 0) >> 2; \
0560 } \
0561 (hwinst).FifoFreeCount -= (cnt); \
0562 }
0563 #endif
0564