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0026 #ifndef __NVREG_H_
0027 #define __NVREG_H_
0028
0029
0030 #define BITMASK(t,b) (((unsigned)(1U << (((t)-(b)+1)))-1) << (b))
0031 #define MASKEXPAND(mask) BITMASK(1?mask,0?mask)
0032
0033
0034 #define SetBF(mask,value) ((value) << (0?mask))
0035 #define GetBF(var,mask) (((unsigned)((var) & MASKEXPAND(mask))) >> (0?mask) )
0036
0037 #define MaskAndSetBF(var,mask,value) (var)=(((var)&(~MASKEXPAND(mask)) \
0038 | SetBF(mask,value)))
0039
0040 #define DEVICE_BASE(device) (0?NV##_##device)
0041 #define DEVICE_SIZE(device) ((1?NV##_##device) - DEVICE_BASE(device)+1)
0042
0043
0044 #define DEVICE_ACCESS(device,reg) \
0045 nvCONTROL[(NV_##device##_##reg)/4]
0046
0047 #define DEVICE_WRITE(device,reg,value) DEVICE_ACCESS(device,reg)=(value)
0048 #define DEVICE_READ(device,reg) DEVICE_ACCESS(device,reg)
0049 #define DEVICE_PRINT(device,reg) \
0050 ErrorF("NV_"#device"_"#reg"=#%08lx\n",DEVICE_ACCESS(device,reg))
0051 #define DEVICE_DEF(device,mask,value) \
0052 SetBF(NV_##device##_##mask,NV_##device##_##mask##_##value)
0053 #define DEVICE_VALUE(device,mask,value) SetBF(NV_##device##_##mask,value)
0054 #define DEVICE_MASK(device,mask) MASKEXPAND(NV_##device##_##mask)
0055
0056 #define PDAC_Write(reg,value) DEVICE_WRITE(PDAC,reg,value)
0057 #define PDAC_Read(reg) DEVICE_READ(PDAC,reg)
0058 #define PDAC_Print(reg) DEVICE_PRINT(PDAC,reg)
0059 #define PDAC_Def(mask,value) DEVICE_DEF(PDAC,mask,value)
0060 #define PDAC_Val(mask,value) DEVICE_VALUE(PDAC,mask,value)
0061 #define PDAC_Mask(mask) DEVICE_MASK(PDAC,mask)
0062
0063 #define PFB_Write(reg,value) DEVICE_WRITE(PFB,reg,value)
0064 #define PFB_Read(reg) DEVICE_READ(PFB,reg)
0065 #define PFB_Print(reg) DEVICE_PRINT(PFB,reg)
0066 #define PFB_Def(mask,value) DEVICE_DEF(PFB,mask,value)
0067 #define PFB_Val(mask,value) DEVICE_VALUE(PFB,mask,value)
0068 #define PFB_Mask(mask) DEVICE_MASK(PFB,mask)
0069
0070 #define PRM_Write(reg,value) DEVICE_WRITE(PRM,reg,value)
0071 #define PRM_Read(reg) DEVICE_READ(PRM,reg)
0072 #define PRM_Print(reg) DEVICE_PRINT(PRM,reg)
0073 #define PRM_Def(mask,value) DEVICE_DEF(PRM,mask,value)
0074 #define PRM_Val(mask,value) DEVICE_VALUE(PRM,mask,value)
0075 #define PRM_Mask(mask) DEVICE_MASK(PRM,mask)
0076
0077 #define PGRAPH_Write(reg,value) DEVICE_WRITE(PGRAPH,reg,value)
0078 #define PGRAPH_Read(reg) DEVICE_READ(PGRAPH,reg)
0079 #define PGRAPH_Print(reg) DEVICE_PRINT(PGRAPH,reg)
0080 #define PGRAPH_Def(mask,value) DEVICE_DEF(PGRAPH,mask,value)
0081 #define PGRAPH_Val(mask,value) DEVICE_VALUE(PGRAPH,mask,value)
0082 #define PGRAPH_Mask(mask) DEVICE_MASK(PGRAPH,mask)
0083
0084 #define PDMA_Write(reg,value) DEVICE_WRITE(PDMA,reg,value)
0085 #define PDMA_Read(reg) DEVICE_READ(PDMA,reg)
0086 #define PDMA_Print(reg) DEVICE_PRINT(PDMA,reg)
0087 #define PDMA_Def(mask,value) DEVICE_DEF(PDMA,mask,value)
0088 #define PDMA_Val(mask,value) DEVICE_VALUE(PDMA,mask,value)
0089 #define PDMA_Mask(mask) DEVICE_MASK(PDMA,mask)
0090
0091 #define PTIMER_Write(reg,value) DEVICE_WRITE(PTIMER,reg,value)
0092 #define PTIMER_Read(reg) DEVICE_READ(PTIMER,reg)
0093 #define PTIMER_Print(reg) DEVICE_PRINT(PTIMER,reg)
0094 #define PTIMER_Def(mask,value) DEVICE_DEF(PTIMER,mask,value)
0095 #define PTIMER_Val(mask,value) DEVICE_VALUE(PTIEMR,mask,value)
0096 #define PTIMER_Mask(mask) DEVICE_MASK(PTIMER,mask)
0097
0098 #define PEXTDEV_Write(reg,value) DEVICE_WRITE(PEXTDEV,reg,value)
0099 #define PEXTDEV_Read(reg) DEVICE_READ(PEXTDEV,reg)
0100 #define PEXTDEV_Print(reg) DEVICE_PRINT(PEXTDEV,reg)
0101 #define PEXTDEV_Def(mask,value) DEVICE_DEF(PEXTDEV,mask,value)
0102 #define PEXTDEV_Val(mask,value) DEVICE_VALUE(PEXTDEV,mask,value)
0103 #define PEXTDEV_Mask(mask) DEVICE_MASK(PEXTDEV,mask)
0104
0105 #define PFIFO_Write(reg,value) DEVICE_WRITE(PFIFO,reg,value)
0106 #define PFIFO_Read(reg) DEVICE_READ(PFIFO,reg)
0107 #define PFIFO_Print(reg) DEVICE_PRINT(PFIFO,reg)
0108 #define PFIFO_Def(mask,value) DEVICE_DEF(PFIFO,mask,value)
0109 #define PFIFO_Val(mask,value) DEVICE_VALUE(PFIFO,mask,value)
0110 #define PFIFO_Mask(mask) DEVICE_MASK(PFIFO,mask)
0111
0112 #define PRAM_Write(reg,value) DEVICE_WRITE(PRAM,reg,value)
0113 #define PRAM_Read(reg) DEVICE_READ(PRAM,reg)
0114 #define PRAM_Print(reg) DEVICE_PRINT(PRAM,reg)
0115 #define PRAM_Def(mask,value) DEVICE_DEF(PRAM,mask,value)
0116 #define PRAM_Val(mask,value) DEVICE_VALUE(PRAM,mask,value)
0117 #define PRAM_Mask(mask) DEVICE_MASK(PRAM,mask)
0118
0119 #define PRAMFC_Write(reg,value) DEVICE_WRITE(PRAMFC,reg,value)
0120 #define PRAMFC_Read(reg) DEVICE_READ(PRAMFC,reg)
0121 #define PRAMFC_Print(reg) DEVICE_PRINT(PRAMFC,reg)
0122 #define PRAMFC_Def(mask,value) DEVICE_DEF(PRAMFC,mask,value)
0123 #define PRAMFC_Val(mask,value) DEVICE_VALUE(PRAMFC,mask,value)
0124 #define PRAMFC_Mask(mask) DEVICE_MASK(PRAMFC,mask)
0125
0126 #define PMC_Write(reg,value) DEVICE_WRITE(PMC,reg,value)
0127 #define PMC_Read(reg) DEVICE_READ(PMC,reg)
0128 #define PMC_Print(reg) DEVICE_PRINT(PMC,reg)
0129 #define PMC_Def(mask,value) DEVICE_DEF(PMC,mask,value)
0130 #define PMC_Val(mask,value) DEVICE_VALUE(PMC,mask,value)
0131 #define PMC_Mask(mask) DEVICE_MASK(PMC,mask)
0132
0133 #define PMC_Write(reg,value) DEVICE_WRITE(PMC,reg,value)
0134 #define PMC_Read(reg) DEVICE_READ(PMC,reg)
0135 #define PMC_Print(reg) DEVICE_PRINT(PMC,reg)
0136 #define PMC_Def(mask,value) DEVICE_DEF(PMC,mask,value)
0137 #define PMC_Val(mask,value) DEVICE_VALUE(PMC,mask,value)
0138 #define PMC_Mask(mask) DEVICE_MASK(PMC,mask)
0139
0140
0141 #define PBUS_Write(reg,value) DEVICE_WRITE(PBUS,reg,value)
0142 #define PBUS_Read(reg) DEVICE_READ(PBUS,reg)
0143 #define PBUS_Print(reg) DEVICE_PRINT(PBUS,reg)
0144 #define PBUS_Def(mask,value) DEVICE_DEF(PBUS,mask,value)
0145 #define PBUS_Val(mask,value) DEVICE_VALUE(PBUS,mask,value)
0146 #define PBUS_Mask(mask) DEVICE_MASK(PBUS,mask)
0147
0148
0149 #define PRAMDAC_Write(reg,value) DEVICE_WRITE(PRAMDAC,reg,value)
0150 #define PRAMDAC_Read(reg) DEVICE_READ(PRAMDAC,reg)
0151 #define PRAMDAC_Print(reg) DEVICE_PRINT(PRAMDAC,reg)
0152 #define PRAMDAC_Def(mask,value) DEVICE_DEF(PRAMDAC,mask,value)
0153 #define PRAMDAC_Val(mask,value) DEVICE_VALUE(PRAMDAC,mask,value)
0154 #define PRAMDAC_Mask(mask) DEVICE_MASK(PRAMDAC,mask)
0155
0156
0157 #define PDAC_ReadExt(reg) \
0158 ((PDAC_Write(INDEX_LO,(NV_PDAC_EXT_##reg) & 0xff)),\
0159 (PDAC_Write(INDEX_HI,((NV_PDAC_EXT_##reg) >> 8) & 0xff)),\
0160 (PDAC_Read(INDEX_DATA)))
0161
0162 #define PDAC_WriteExt(reg,value)\
0163 ((PDAC_Write(INDEX_LO,(NV_PDAC_EXT_##reg) & 0xff)),\
0164 (PDAC_Write(INDEX_HI,((NV_PDAC_EXT_##reg) >> 8) & 0xff)),\
0165 (PDAC_Write(INDEX_DATA,(value))))
0166
0167 #define CRTC_Write(index,value) outb((index), 0x3d4); outb(value, 0x3d5)
0168 #define CRTC_Read(index) (outb(index, 0x3d4),inb(0x3d5))
0169
0170 #define PCRTC_Write(index,value) CRTC_Write(NV_PCRTC_##index,value)
0171 #define PCRTC_Read(index) CRTC_Read(NV_PCRTC_##index)
0172
0173 #define PCRTC_Def(mask,value) DEVICE_DEF(PCRTC,mask,value)
0174 #define PCRTC_Val(mask,value) DEVICE_VALUE(PCRTC,mask,value)
0175 #define PCRTC_Mask(mask) DEVICE_MASK(PCRTC,mask)
0176
0177 #define SR_Write(index,value) outb(0x3c4,(index));outb(0x3c5,value)
0178 #define SR_Read(index) (outb(0x3c4,index),inb(0x3c5))
0179
0180 extern volatile unsigned *nvCONTROL;
0181
0182 typedef enum {NV1,NV3,NV4,NumNVChips} NVChipType;
0183
0184 NVChipType GetChipType(void);
0185
0186 #endif
0187
0188