video/fbdev/platinumfb.h

0001 /*
0002  * linux/drivers/video/platinumfb-hw.c -- Frame buffer device for the
0003  * Platinum on-board video in PowerMac 7200s (and some clones based
0004  * on the same motherboard.)
0005  *
0006  *  Created 09 Feb 1998 by Jon Howell <jonh@cs.dartmouth.edu>
0007  *
0008  * Copyright (C) 1998 Jon Howell
0009  *
0010  *  based on drivers/macintosh/platinum.c: Console support
0011  *  for PowerMac "platinum" display adaptor.
0012  *  Copyright (C) 1996 Paul Mackerras and Mark Abene.
0013  *
0014  *  based on skeletonfb.c:
0015  *  Created 28 Dec 1997 by Geert Uytterhoeven
0016  *
0017  * This file is subject to the terms and conditions of the GNU General Public
0018  * License.  See the file COPYING in the main directory of this archive
0019  * for more details.
0020  */
0021
0022 /*
0023  * Structure of the registers for the DACula colormap device.
0024  */
0025 struct cmap_regs {
0026     unsigned char addr;
0027     char pad1[15];
0028     unsigned char d1;
0029     char pad2[15];
0030     unsigned char d2;
0031     char pad3[15];
0032     unsigned char lut;
0033     char pad4[15];
0034 };
0035
0036 /*
0037  * Structure of the registers for the "platinum" display adaptor".
0038  */
0039 struct preg {           /* padded register */
0040     unsigned r;         /* notice this is 32 bits. */
0041     char pad[12];
0042 };
0043
0044 struct platinum_regs {
0045     struct preg reg[128];
0046 };
0047
0048 /*
0049  * Register initialization tables for the platinum display.
0050  *
0051  * It seems that there are two different types of platinum display
0052  * out there.  Older ones use the values in clocksel[1], for which
0053  * the formula for the clock frequency seems to be
0054  *  F = 14.3MHz * c0 / (c1 & 0x1f) / (1 << (c1 >> 5))
0055  * Newer ones use the values in clocksel[0], for which the formula
0056  * seems to be
0057  *  F = 15MHz * c0 / ((c1 & 0x1f) + 2) / (1 << (c1 >> 5))
0058  */
0059 struct platinum_regvals {
0060     int fb_offset;
0061     int pitch[3];
0062     unsigned regs[26];
0063     unsigned char offset[3];
0064     unsigned char mode[3];
0065     unsigned char dacula_ctrl[3];
0066     unsigned char clock_params[2][2];
0067 };
0068
0069 #define DIV2    0x20
0070 #define DIV4    0x40
0071 #define DIV8    0x60
0072 #define DIV16   0x80
0073
0074 /* 1280x1024, 75Hz (20) */
0075 static struct platinum_regvals platinum_reg_init_20 = {
0076     0x5c00,
0077     { 1312, 2592, 2592 },
0078     { 0xffc, 4, 0, 0, 0, 0, 0x428, 0,
0079       0, 0xb3, 0xd3, 0x12, 0x1a5, 0x23, 0x28, 0x2d,
0080       0x5e, 0x19e, 0x1a4, 0x854, 0x852, 4, 9, 0x50,
0081       0x850, 0x851 }, { 0x58, 0x5d, 0x5d },
0082     { 0, 0xff, 0xff }, { 0x51, 0x55, 0x55 },
0083     {{ 45, 3 }, { 66, 7 }}
0084 };
0085
0086 /* 1280x960, 75Hz (19) */
0087 static struct platinum_regvals platinum_reg_init_19 = {
0088     0x5c00,
0089     { 1312, 2592, 2592 },
0090     { 0xffc, 4, 0, 0, 0, 0, 0x428, 0,
0091       0, 0xb2, 0xd2, 0x12, 0x1a3, 0x23, 0x28, 0x2d,
0092       0x5c, 0x19c, 0x1a2, 0x7d0, 0x7ce, 4, 9, 0x4c,
0093       0x7cc, 0x7cd }, { 0x56, 0x5b, 0x5b },
0094     { 0, 0xff, 0xff }, { 0x51, 0x55, 0x55 },
0095     {{ 42, 3 }, { 44, 5 }}
0096 };
0097
0098 /* 1152x870, 75Hz (18) */
0099 static struct platinum_regvals platinum_reg_init_18 = {
0100     0x11b0,
0101     { 1184, 2336, 4640 },
0102     { 0xff0, 4, 0, 0, 0, 0, 0x38f, 0,
0103       0, 0x294, 0x16c, 0x20, 0x2d7, 0x3f, 0x49, 0x53,
0104       0x82, 0x2c2, 0x2d6, 0x726, 0x724, 4, 9, 0x52,
0105       0x71e, 0x722 }, { 0x74, 0x7c, 0x81 },
0106     { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
0107     {{ 26, 0 + DIV2 }, { 42, 6 }}
0108 };
0109
0110 /* 1024x768, 75Hz (17) */
0111 static struct platinum_regvals platinum_reg_init_17 = {
0112     0x10b0,
0113     { 1056, 2080, 4128 },
0114     { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
0115       0, 0x254, 0x14b, 0x18, 0x295, 0x2f, 0x32, 0x3b,
0116       0x80, 0x280, 0x296, 0x648, 0x646, 4, 9, 0x40,
0117       0x640, 0x644 }, { 0x72, 0x7a, 0x7f },
0118     { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
0119     {{ 54, 3 + DIV2 }, { 67, 12 }}
0120 };
0121
0122 /* 1024x768, 75Hz (16) */
0123 static struct platinum_regvals platinum_reg_init_16 = {
0124     0x10b0,
0125     { 1056, 2080, 4128 },
0126     { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
0127       0, 0x250, 0x147, 0x17, 0x28f, 0x2f, 0x35, 0x47,
0128       0x82, 0x282, 0x28e, 0x640, 0x63e, 4, 9, 0x3c,
0129       0x63c, 0x63d }, { 0x74, 0x7c, 0x81 },
0130     { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
0131     {{ 20, 0 + DIV2 }, { 11, 2 }}
0132 };
0133
0134 /* 1024x768, 70Hz (15) */
0135 static struct platinum_regvals platinum_reg_init_15 = {
0136     0x10b0,
0137     { 1056, 2080, 4128 },
0138     { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
0139       0, 0x254, 0x14b, 0x22, 0x297, 0x43, 0x49, 0x5b,
0140       0x86, 0x286, 0x296, 0x64c, 0x64a, 0xa, 0xf, 0x44,
0141       0x644, 0x646 }, { 0x78, 0x80, 0x85 },
0142     { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
0143     {{ 19, 0 + DIV2 }, { 110, 21 }}
0144 };
0145
0146 /* 1024x768, 60Hz (14) */
0147 static struct platinum_regvals platinum_reg_init_14 = {
0148     0x10b0,
0149     { 1056, 2080, 4128 },
0150     { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
0151       0, 0x25a, 0x14f, 0x22, 0x29f, 0x43, 0x49, 0x5b,
0152       0x8e, 0x28e, 0x29e, 0x64c, 0x64a, 0xa, 0xf, 0x44,
0153       0x644, 0x646 }, { 0x80, 0x88, 0x8d },
0154     { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
0155     {{ 71, 6 + DIV2 }, { 118, 13 + DIV2 }}
0156 };
0157
0158 /* 832x624, 75Hz (13) */
0159 static struct platinum_regvals platinum_reg_init_13 = {
0160     0x70,
0161     { 864, 1680, 3344 },    /* MacOS does 1680 instead of 1696 to fit 16bpp in 1MB,
0162                  * and we use 3344 instead of 3360 to fit in 2Mb
0163                  */
0164     { 0xff0, 4, 0, 0, 0, 0, 0x299, 0,
0165       0, 0x21e, 0x120, 0x10, 0x23f, 0x1f, 0x25, 0x37,
0166       0x8a, 0x22a, 0x23e, 0x536, 0x534, 4, 9, 0x52,
0167       0x532, 0x533 }, { 0x7c, 0x84, 0x89 },
0168     { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
0169     {{ 30, 0 + DIV4 }, { 56, 7 + DIV2 }}
0170 };
0171
0172 /* 800x600, 75Hz (12) */
0173 static struct platinum_regvals platinum_reg_init_12 = {
0174     0x1010,
0175     { 832, 1632, 3232 },
0176     { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
0177       0, 0x1ce, 0x108, 0x14, 0x20f, 0x27, 0x30, 0x39,
0178       0x72, 0x202, 0x20e, 0x4e2, 0x4e0, 4, 9, 0x2e,
0179       0x4de, 0x4df }, { 0x64, 0x6c, 0x71 },
0180     { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
0181     {{ 122, 7 + DIV4 }, { 62, 9 + DIV2 }}
0182 };
0183
0184 /* 800x600, 72Hz (11) */
0185 static struct platinum_regvals platinum_reg_init_11 = {
0186     0x1010,
0187     { 832, 1632, 3232 },
0188     { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
0189       0, 0x1ca, 0x104, 0x1e, 0x207, 0x3b, 0x44, 0x4d,
0190       0x56, 0x1e6, 0x206, 0x534, 0x532, 0xa, 0xe, 0x38,
0191       0x4e8, 0x4ec }, { 0x48, 0x50, 0x55 },
0192     { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
0193     {{ 26, 0 + DIV4 }, { 42, 6 + DIV2 }}
0194 };
0195
0196 /* 800x600, 60Hz (10) */
0197 static struct platinum_regvals platinum_reg_init_10 = {
0198     0x1010,
0199     { 832, 1632, 3232 },
0200     { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
0201       0, 0x1ce, 0x108, 0x20, 0x20f, 0x3f, 0x45, 0x5d,
0202       0x66, 0x1f6, 0x20e, 0x4e8, 0x4e6, 6, 0xa, 0x34,
0203       0x4e4, 0x4e5 }, { 0x58, 0x60, 0x65 },
0204     { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
0205     {{ 54, 3 + DIV4 }, { 95, 1 + DIV8 }}
0206 };
0207
0208 /* 800x600, 56Hz (9) --unsupported? copy of mode 10 for now... */
0209 static struct platinum_regvals platinum_reg_init_9 = {
0210     0x1010,
0211     { 832, 1632, 3232 },
0212     { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
0213       0, 0x1ce, 0x108, 0x20, 0x20f, 0x3f, 0x45, 0x5d,
0214       0x66, 0x1f6, 0x20e, 0x4e8, 0x4e6, 6, 0xa, 0x34,
0215       0x4e4, 0x4e5 }, { 0x58, 0x60, 0x65 },
0216     { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
0217     {{ 54, 3 + DIV4 }, { 88, 1 + DIV8 }}
0218 };
0219
0220 /* 768x576, 50Hz Interlaced-PAL (8) */
0221 static struct platinum_regvals platinum_reg_init_8 = {
0222     0x1010,
0223     { 800, 1568, 3104 },
0224     { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
0225       0, 0xc8, 0xec, 0x11, 0x1d7, 0x22, 0x25, 0x36,
0226       0x47, 0x1c7, 0x1d6, 0x271, 0x270, 4, 9, 0x27,
0227       0x267, 0x26b }, { 0x39, 0x41, 0x46 },
0228     { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
0229     {{ 31, 0 + DIV16 }, { 74, 9 + DIV8 }}
0230 };
0231
0232 /* 640x870, 75Hz Portrait (7) */
0233 static struct platinum_regvals platinum_reg_init_7 = {
0234     0xb10,
0235     { 672, 1312, 2592 },
0236     { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
0237       0, 0x176, 0xd0, 0x14, 0x19f, 0x27, 0x2d, 0x3f,
0238       0x4a, 0x18a, 0x19e, 0x72c, 0x72a, 4, 9, 0x58,
0239       0x724, 0x72a }, { 0x3c, 0x44, 0x49 },
0240     { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
0241     {{ 30, 0 + DIV4 }, { 56, 7 + DIV2 }}
0242 };
0243
0244 /* 640x480, 67Hz (6) */
0245 static struct platinum_regvals platinum_reg_init_6 = {
0246     0x1010,
0247     { 672, 1312, 2592 },
0248     { 0xff0, 4, 0, 0, 0, 0, 0x209, 0,
0249       0, 0x18e, 0xd8, 0x10, 0x1af, 0x1f, 0x25, 0x37,
0250       0x4a, 0x18a, 0x1ae, 0x41a, 0x418, 4, 9, 0x52,
0251       0x412, 0x416 }, { 0x3c, 0x44, 0x49 },
0252     { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
0253     {{ 99, 4 + DIV8 }, { 42, 5 + DIV4 }}
0254 };
0255
0256 /* 640x480, 60Hz (5) */
0257 static struct platinum_regvals platinum_reg_init_5 = {
0258     0x1010,
0259     { 672, 1312, 2592 },
0260     { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
0261       0, 0x15e, 0xc8, 0x18, 0x18f, 0x2f, 0x35, 0x3e,
0262       0x42, 0x182, 0x18e, 0x41a, 0x418, 2, 7, 0x44,
0263       0x404, 0x408 }, { 0x34, 0x3c, 0x41 },
0264     { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
0265     {{ 26, 0 + DIV8 }, { 14, 2 + DIV4 }}
0266 };
0267
0268 /* 640x480, 60Hz Interlaced-NTSC (4) */
0269 static struct platinum_regvals platinum_reg_init_4 = {
0270     0x1010,
0271     { 672, 1312, 2592 },
0272     { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
0273       0, 0xa5, 0xc3, 0xe, 0x185, 0x1c, 0x1f, 0x30,
0274       0x37, 0x177, 0x184, 0x20d, 0x20c, 5, 0xb, 0x23,
0275       0x203, 0x206 }, { 0x29, 0x31, 0x36 },
0276     { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
0277     {{ 94, 5 + DIV16 }, { 48, 7 + DIV8 }}
0278 };
0279
0280 /* 640x480, 50Hz Interlaced-PAL (3) */
0281 static struct platinum_regvals platinum_reg_init_3 = {
0282     0x1010,
0283     { 672, 1312, 2592 },
0284     { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
0285       0, 0xc8, 0xec, 0x11, 0x1d7, 0x22, 0x25, 0x36,
0286       0x67, 0x1a7, 0x1d6, 0x271, 0x270, 4, 9, 0x57,
0287       0x237, 0x26b }, { 0x59, 0x61, 0x66 },
0288     { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
0289     {{ 31, 0 + DIV16 }, { 74, 9 + DIV8 }}
0290 };
0291
0292 /* 512x384, 60Hz (2) */
0293 static struct platinum_regvals platinum_reg_init_2 = {
0294     0x1010,
0295     { 544, 1056, 2080 },
0296     { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
0297       0, 0x25c, 0x140, 0x10, 0x27f, 0x1f, 0x2b, 0x4f,
0298       0x68, 0x268, 0x27e, 0x32e, 0x32c, 4, 9, 0x2a,
0299       0x32a, 0x32b }, { 0x5a, 0x62, 0x67 },
0300     { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
0301     {{ 33, 2 + DIV8 }, { 79, 9 + DIV8 }}
0302 };
0303
0304 /* 512x384, 60Hz Interlaced-NTSC (1) */
0305 static struct platinum_regvals platinum_reg_init_1 = {
0306     0x1010,
0307     { 544, 1056, 2080 },
0308     { 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
0309       0, 0xa5, 0xc3, 0xe, 0x185, 0x1c, 0x1f, 0x30,
0310       0x57, 0x157, 0x184, 0x20d, 0x20c, 5, 0xb, 0x53,
0311       0x1d3, 0x206 }, { 0x49, 0x51, 0x56 },
0312     { 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
0313     {{ 94, 5 + DIV16 }, { 48, 7 + DIV8 }}
0314 };
0315
0316 static struct platinum_regvals *platinum_reg_init[VMODE_MAX] = {
0317     &platinum_reg_init_1,
0318     &platinum_reg_init_2,
0319     &platinum_reg_init_3,
0320     &platinum_reg_init_4,
0321     &platinum_reg_init_5,
0322     &platinum_reg_init_6,
0323     &platinum_reg_init_7,
0324     &platinum_reg_init_8,
0325     &platinum_reg_init_9,
0326     &platinum_reg_init_10,
0327     &platinum_reg_init_11,
0328     &platinum_reg_init_12,
0329     &platinum_reg_init_13,
0330     &platinum_reg_init_14,
0331     &platinum_reg_init_15,
0332     &platinum_reg_init_16,
0333     &platinum_reg_init_17,
0334     &platinum_reg_init_18,
0335     &platinum_reg_init_19,
0336     &platinum_reg_init_20
0337 };
0338
0339 struct vmode_attr {
0340     int hres;
0341     int vres;
0342     int vfreq;
0343     int interlaced;
0344 };
0345
0346 struct vmode_attr vmode_attrs[VMODE_MAX] = {
0347     {512, 384, 60, 1},
0348     {512, 384, 60},
0349     {640, 480, 50, 1},
0350     {640, 480, 60, 1},
0351     {640, 480, 60},
0352     {640, 480, 67},
0353     {640, 870, 75},
0354     {768, 576, 50, 1},
0355     {800, 600, 56},
0356     {800, 600, 60},
0357     {800, 600, 72},
0358     {800, 600, 75},
0359     {832, 624, 75},
0360     {1024, 768, 60},
0361     {1024, 768, 72},
0362     {1024, 768, 75},
0363     {1024, 768, 75},
0364     {1152, 870, 75},
0365     {1280, 960, 75},
0366     {1280, 1024, 75}
0367 };
0368