fbdev/mb862xx/mb862xxfb.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef __MB862XX_H__
0003 #define __MB862XX_H__
0004
0005 struct mb862xx_l1_cfg {
0006     unsigned short sx;
0007     unsigned short sy;
0008     unsigned short sw;
0009     unsigned short sh;
0010     unsigned short dx;
0011     unsigned short dy;
0012     unsigned short dw;
0013     unsigned short dh;
0014     int mirror;
0015 };
0016
0017 #define MB862XX_BASE        'M'
0018 #define MB862XX_L1_GET_CFG  _IOR(MB862XX_BASE, 0, struct mb862xx_l1_cfg*)
0019 #define MB862XX_L1_SET_CFG  _IOW(MB862XX_BASE, 1, struct mb862xx_l1_cfg*)
0020 #define MB862XX_L1_ENABLE   _IOW(MB862XX_BASE, 2, int)
0021 #define MB862XX_L1_CAP_CTL  _IOW(MB862XX_BASE, 3, int)
0022
0023 #ifdef __KERNEL__
0024
0025 #define PCI_VENDOR_ID_FUJITSU_LIMITED   0x10cf
0026 #define PCI_DEVICE_ID_FUJITSU_CORALP    0x2019
0027 #define PCI_DEVICE_ID_FUJITSU_CORALPA   0x201e
0028 #define PCI_DEVICE_ID_FUJITSU_CARMINE   0x202b
0029
0030 #define GC_MMR_CORALP_EVB_VAL       0x11d7fa13
0031
0032 enum gdctype {
0033     BT_NONE,
0034     BT_LIME,
0035     BT_MINT,
0036     BT_CORAL,
0037     BT_CORALP,
0038     BT_CARMINE,
0039 };
0040
0041 struct mb862xx_gc_mode {
0042     struct fb_videomode def_mode;   /* mode of connected display */
0043     unsigned int        def_bpp;    /* default depth */
0044     unsigned long       max_vram;   /* connected SDRAM size */
0045     unsigned long       ccf;        /* gdc clk */
0046     unsigned long       mmr;        /* memory mode for SDRAM */
0047 };
0048
0049 /* private data */
0050 struct mb862xxfb_par {
0051     struct fb_info      *info;      /* fb info head */
0052     struct device       *dev;
0053     struct pci_dev      *pdev;
0054     struct resource     *res;       /* framebuffer/mmio resource */
0055
0056     resource_size_t     fb_base_phys;   /* fb base, 36-bit PPC440EPx */
0057     resource_size_t     mmio_base_phys; /* io base addr */
0058     void __iomem        *fb_base;   /* remapped framebuffer */
0059     void __iomem        *mmio_base; /* remapped registers */
0060     size_t          mapped_vram;    /* length of remapped vram */
0061     size_t          mmio_len;   /* length of register region */
0062     unsigned long       cap_buf;    /* capture buffers offset */
0063     size_t          cap_len;    /* length of capture buffers */
0064
0065     void __iomem        *host;      /* relocatable reg. bases */
0066     void __iomem        *i2c;
0067     void __iomem        *disp;
0068     void __iomem        *disp1;
0069     void __iomem        *cap;
0070     void __iomem        *cap1;
0071     void __iomem        *draw;
0072     void __iomem        *geo;
0073     void __iomem        *pio;
0074     void __iomem        *ctrl;
0075     void __iomem        *dram_ctrl;
0076     void __iomem        *wrback;
0077
0078     unsigned int        irq;
0079     unsigned int        type;       /* GDC type */
0080     unsigned int        refclk;     /* disp. reference clock */
0081     struct mb862xx_gc_mode  *gc_mode;   /* GDC mode init data */
0082     int         pre_init;   /* don't init display if 1 */
0083     struct i2c_adapter  *adap;      /* GDC I2C bus adapter */
0084     int         i2c_rs;
0085
0086     struct mb862xx_l1_cfg   l1_cfg;
0087     int         l1_stride;
0088
0089     u32         pseudo_palette[16];
0090 };
0091
0092 extern void mb862xxfb_init_accel(struct fb_info *info, struct fb_ops *fbops, int xres);
0093 #ifdef CONFIG_FB_MB862XX_I2C
0094 extern int mb862xx_i2c_init(struct mb862xxfb_par *par);
0095 extern void mb862xx_i2c_exit(struct mb862xxfb_par *par);
0096 #else
0097 static inline int mb862xx_i2c_init(struct mb862xxfb_par *par) { return 0; }
0098 static inline void mb862xx_i2c_exit(struct mb862xxfb_par *par) { }
0099 #endif
0100
0101 #if defined(CONFIG_FB_MB862XX_LIME) && defined(CONFIG_FB_MB862XX_PCI_GDC)
0102 #error  "Select Lime GDC or CoralP/Carmine support, but not both together"
0103 #endif
0104 #if defined(CONFIG_FB_MB862XX_LIME)
0105 #define gdc_read    __raw_readl
0106 #define gdc_write   __raw_writel
0107 #else
0108 #define gdc_read    readl
0109 #define gdc_write   writel
0110 #endif
0111
0112 #define inreg(type, off)    \
0113     gdc_read((par->type + (off)))
0114
0115 #define outreg(type, off, val)  \
0116     gdc_write((val), (par->type + (off)))
0117
0118 #define pack(a, b)  (((a) << 16) | (b))
0119
0120 #endif /* __KERNEL__ */
0121
0122 #endif