fbdev/matrox/matroxfb_DAC1064.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef __MATROXFB_DAC1064_H__
0003 #define __MATROXFB_DAC1064_H__
0004
0005
0006 #include "matroxfb_base.h"
0007
0008 #ifdef CONFIG_FB_MATROX_MYSTIQUE
0009 extern struct matrox_switch matrox_mystique;
0010 #endif
0011 #ifdef CONFIG_FB_MATROX_G
0012 extern struct matrox_switch matrox_G100;
0013 #endif
0014 #ifdef NEED_DAC1064
0015 void DAC1064_global_init(struct matrox_fb_info *minfo);
0016 void DAC1064_global_restore(struct matrox_fb_info *minfo);
0017 #endif
0018
0019 #define M1064_INDEX 0x00
0020 #define M1064_PALWRADD  0x00
0021 #define M1064_PALDATA   0x01
0022 #define M1064_PIXRDMSK  0x02
0023 #define M1064_PALRDADD  0x03
0024 #define M1064_X_DATAREG 0x0A
0025 #define M1064_CURPOSXL  0x0C    /* can be accessed as DWORD */
0026 #define M1064_CURPOSXH  0x0D
0027 #define M1064_CURPOSYL  0x0E
0028 #define M1064_CURPOSYH  0x0F
0029
0030 #define M1064_XCURADDL      0x04
0031 #define M1064_XCURADDH      0x05
0032 #define M1064_XCURCTRL      0x06
0033 #define     M1064_XCURCTRL_DIS      0x00    /* transparent, transparent, transparent, transparent */
0034 #define     M1064_XCURCTRL_3COLOR   0x01    /* transparent, 0, 1, 2 */
0035 #define     M1064_XCURCTRL_XGA      0x02    /* 0, 1, transparent, complement */
0036 #define     M1064_XCURCTRL_XWIN     0x03    /* transparent, transparent, 0, 1 */
0037     /* drive DVI by standard(0)/DVI(1) PLL */
0038     /* if set(1), C?DVICLKEN and C?DVICLKSEL must be set(1) */
0039 #define      M1064_XDVICLKCTRL_DVIDATAPATHSEL   0x01
0040     /* drive CRTC1 by standard(0)/DVI(1) PLL */
0041 #define      M1064_XDVICLKCTRL_C1DVICLKSEL      0x02
0042     /* drive CRTC2 by standard(0)/DVI(1) PLL */
0043 #define      M1064_XDVICLKCTRL_C2DVICLKSEL      0x04
0044     /* pixel clock allowed to(0)/blocked from(1) driving CRTC1 */
0045 #define      M1064_XDVICLKCTRL_C1DVICLKEN       0x08
0046     /* DVI PLL loop filter bandwidth selection bits */
0047 #define      M1064_XDVICLKCTRL_DVILOOPCTL       0x30
0048     /* CRTC2 pixel clock allowed to(0)/blocked from(1) driving CRTC2 */
0049 #define      M1064_XDVICLKCTRL_C2DVICLKEN       0x40
0050     /* P1PLL loop filter bandwidth selection */
0051 #define      M1064_XDVICLKCTRL_P1LOOPBWDTCTL    0x80
0052 #define M1064_XCURCOL0RED   0x08
0053 #define M1064_XCURCOL0GREEN 0x09
0054 #define M1064_XCURCOL0BLUE  0x0A
0055 #define M1064_XCURCOL1RED   0x0C
0056 #define M1064_XCURCOL1GREEN 0x0D
0057 #define M1064_XCURCOL1BLUE  0x0E
0058 #define M1064_XDVICLKCTRL   0x0F
0059 #define M1064_XCURCOL2RED   0x10
0060 #define M1064_XCURCOL2GREEN 0x11
0061 #define M1064_XCURCOL2BLUE  0x12
0062 #define DAC1064_XVREFCTRL   0x18
0063 #define      DAC1064_XVREFCTRL_INTERNAL     0x3F
0064 #define      DAC1064_XVREFCTRL_EXTERNAL     0x00
0065 #define      DAC1064_XVREFCTRL_G100_DEFAULT 0x03
0066 #define M1064_XMULCTRL      0x19
0067 #define      M1064_XMULCTRL_DEPTH_8BPP      0x00    /* 8 bpp paletized */
0068 #define      M1064_XMULCTRL_DEPTH_15BPP_1BPP    0x01    /* 15 bpp paletized + 1 bpp overlay */
0069 #define      M1064_XMULCTRL_DEPTH_16BPP     0x02    /* 16 bpp paletized */
0070 #define      M1064_XMULCTRL_DEPTH_24BPP     0x03    /* 24 bpp paletized */
0071 #define      M1064_XMULCTRL_DEPTH_24BPP_8BPP    0x04    /* 24 bpp direct + 8 bpp overlay paletized */
0072 #define      M1064_XMULCTRL_2G8V16      0x05    /* 15 bpp video direct, half xres, 8bpp paletized */
0073 #define      M1064_XMULCTRL_G16V16      0x06    /* 15 bpp video, 15bpp graphics, one of them paletized */
0074 #define      M1064_XMULCTRL_DEPTH_32BPP     0x07    /* 24 bpp paletized + 8 bpp unused */
0075 #define      M1064_XMULCTRL_GRAPHICS_PALETIZED  0x00
0076 #define      M1064_XMULCTRL_VIDEO_PALETIZED 0x08
0077 #define M1064_XPIXCLKCTRL   0x1A
0078 #define      M1064_XPIXCLKCTRL_SRC_PCI      0x00
0079 #define      M1064_XPIXCLKCTRL_SRC_PLL      0x01
0080 #define      M1064_XPIXCLKCTRL_SRC_EXT      0x02
0081 #define      M1064_XPIXCLKCTRL_SRC_SYS      0x03    /* G200/G400 */
0082 #define      M1064_XPIXCLKCTRL_SRC_PLL2     0x03    /* G450 */
0083 #define      M1064_XPIXCLKCTRL_SRC_MASK     0x03
0084 #define      M1064_XPIXCLKCTRL_EN       0x00
0085 #define      M1064_XPIXCLKCTRL_DIS      0x04
0086 #define      M1064_XPIXCLKCTRL_PLL_DOWN     0x00
0087 #define      M1064_XPIXCLKCTRL_PLL_UP       0x08
0088 #define M1064_XGENCTRL      0x1D
0089 #define      M1064_XGENCTRL_VS_0        0x00
0090 #define      M1064_XGENCTRL_VS_1        0x01
0091 #define      M1064_XGENCTRL_ALPHA_DIS       0x00
0092 #define      M1064_XGENCTRL_ALPHA_EN        0x02
0093 #define      M1064_XGENCTRL_BLACK_0IRE      0x00
0094 #define      M1064_XGENCTRL_BLACK_75IRE     0x10
0095 #define      M1064_XGENCTRL_SYNC_ON_GREEN   0x00
0096 #define      M1064_XGENCTRL_NO_SYNC_ON_GREEN    0x20
0097 #define      M1064_XGENCTRL_SYNC_ON_GREEN_MASK  0x20
0098 #define M1064_XMISCCTRL     0x1E
0099 #define      M1064_XMISCCTRL_DAC_DIS        0x00
0100 #define      M1064_XMISCCTRL_DAC_EN     0x01
0101 #define      M1064_XMISCCTRL_MFC_VGA        0x00
0102 #define      M1064_XMISCCTRL_MFC_MAFC       0x02
0103 #define      M1064_XMISCCTRL_MFC_DIS        0x06
0104 #define      GX00_XMISCCTRL_MFC_MAFC        0x02
0105 #define      GX00_XMISCCTRL_MFC_PANELLINK   0x04
0106 #define      GX00_XMISCCTRL_MFC_DIS     0x06
0107 #define      GX00_XMISCCTRL_MFC_MASK        0x06
0108 #define      M1064_XMISCCTRL_DAC_6BIT       0x00
0109 #define      M1064_XMISCCTRL_DAC_8BIT       0x08
0110 #define      M1064_XMISCCTRL_DAC_WIDTHMASK  0x08
0111 #define      M1064_XMISCCTRL_LUT_DIS        0x00
0112 #define      M1064_XMISCCTRL_LUT_EN     0x10
0113 #define      G400_XMISCCTRL_VDO_MAFC12      0x00
0114 #define      G400_XMISCCTRL_VDO_BYPASS656   0x40
0115 #define      G400_XMISCCTRL_VDO_C2_MAFC12   0x80
0116 #define      G400_XMISCCTRL_VDO_C2_BYPASS656    0xC0
0117 #define      G400_XMISCCTRL_VDO_MASK        0xE0
0118 #define M1064_XGENIOCTRL    0x2A
0119 #define M1064_XGENIODATA    0x2B
0120 #define DAC1064_XSYSPLLM    0x2C
0121 #define DAC1064_XSYSPLLN    0x2D
0122 #define DAC1064_XSYSPLLP    0x2E
0123 #define DAC1064_XSYSPLLSTAT 0x2F
0124 #define M1064_XZOOMCTRL     0x38
0125 #define      M1064_XZOOMCTRL_1          0x00
0126 #define      M1064_XZOOMCTRL_2          0x01
0127 #define      M1064_XZOOMCTRL_4          0x03
0128 #define M1064_XSENSETEST    0x3A
0129 #define      M1064_XSENSETEST_BCOMP     0x01
0130 #define      M1064_XSENSETEST_GCOMP     0x02
0131 #define      M1064_XSENSETEST_RCOMP     0x04
0132 #define      M1064_XSENSETEST_PDOWN     0x00
0133 #define      M1064_XSENSETEST_PUP       0x80
0134 #define M1064_XCRCREML      0x3C
0135 #define M1064_XCRCREMH      0x3D
0136 #define M1064_XCRCBITSEL    0x3E
0137 #define M1064_XCOLKEYMASKL  0x40
0138 #define M1064_XCOLKEYMASKH  0x41
0139 #define M1064_XCOLKEYL      0x42
0140 #define M1064_XCOLKEYH      0x43
0141 #define M1064_XPIXPLLAM     0x44
0142 #define M1064_XPIXPLLAN     0x45
0143 #define M1064_XPIXPLLAP     0x46
0144 #define M1064_XPIXPLLBM     0x48
0145 #define M1064_XPIXPLLBN     0x49
0146 #define M1064_XPIXPLLBP     0x4A
0147 #define M1064_XPIXPLLCM     0x4C
0148 #define M1064_XPIXPLLCN     0x4D
0149 #define M1064_XPIXPLLCP     0x4E
0150 #define M1064_XPIXPLLSTAT   0x4F
0151
0152 #define M1064_XTVO_IDX      0x87
0153 #define M1064_XTVO_DATA     0x88
0154
0155 #define M1064_XOUTPUTCONN   0x8A
0156 #define M1064_XSYNCCTRL     0x8B
0157 #define M1064_XVIDPLLSTAT   0x8C
0158 #define M1064_XVIDPLLP      0x8D
0159 #define M1064_XVIDPLLM      0x8E
0160 #define M1064_XVIDPLLN      0x8F
0161
0162 #define M1064_XPWRCTRL      0xA0
0163 #define     M1064_XPWRCTRL_PANELPDN 0x04
0164
0165 #define M1064_XPANMODE      0xA2
0166
0167 enum POS1064 {
0168     POS1064_XCURADDL=0, POS1064_XCURADDH, POS1064_XCURCTRL,
0169     POS1064_XCURCOL0RED, POS1064_XCURCOL0GREEN, POS1064_XCURCOL0BLUE,
0170     POS1064_XCURCOL1RED, POS1064_XCURCOL1GREEN, POS1064_XCURCOL1BLUE,
0171     POS1064_XCURCOL2RED, POS1064_XCURCOL2GREEN, POS1064_XCURCOL2BLUE,
0172     POS1064_XVREFCTRL, POS1064_XMULCTRL, POS1064_XPIXCLKCTRL, POS1064_XGENCTRL,
0173     POS1064_XMISCCTRL,
0174     POS1064_XGENIOCTRL, POS1064_XGENIODATA, POS1064_XZOOMCTRL, POS1064_XSENSETEST,
0175     POS1064_XCRCBITSEL,
0176     POS1064_XCOLKEYMASKL, POS1064_XCOLKEYMASKH, POS1064_XCOLKEYL, POS1064_XCOLKEYH,
0177     POS1064_XOUTPUTCONN, POS1064_XPANMODE, POS1064_XPWRCTRL };
0178
0179
0180 #endif  /* __MATROXFB_DAC1064_H__ */