fbdev/intelfb/intelfb.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef _INTELFB_H
0003 #define _INTELFB_H
0004
0005 /* $DHD: intelfb/intelfb.h,v 1.40 2003/06/27 15:06:25 dawes Exp $ */
0006
0007 #include <linux/agp_backend.h>
0008 #include <linux/fb.h>
0009
0010 #ifdef CONFIG_FB_INTEL_I2C
0011 #include <linux/i2c.h>
0012 #include <linux/i2c-algo-bit.h>
0013 #endif
0014
0015 /*** Version/name ***/
0016 #define INTELFB_VERSION         "0.9.6"
0017 #define INTELFB_MODULE_NAME     "intelfb"
0018 #define SUPPORTED_CHIPSETS      "830M/845G/852GM/855GM/865G/915G/915GM/945G/945GM/945GME/965G/965GM"
0019
0020
0021 /*** Debug/feature defines ***/
0022
0023 #ifndef DEBUG
0024 #define DEBUG               0
0025 #endif
0026
0027 #ifndef VERBOSE
0028 #define VERBOSE             0
0029 #endif
0030
0031 #ifndef REGDUMP
0032 #define REGDUMP             0
0033 #endif
0034
0035 #ifndef DETECT_VGA_CLASS_ONLY
0036 #define DETECT_VGA_CLASS_ONLY       1
0037 #endif
0038
0039 #ifndef ALLOCATE_FOR_PANNING
0040 #define ALLOCATE_FOR_PANNING        1
0041 #endif
0042
0043 #ifndef PREFERRED_MODE
0044 #define PREFERRED_MODE          "1024x768-32@70"
0045 #endif
0046
0047 /*** hw-related values ***/
0048
0049 /* Resource Allocation */
0050 #define INTELFB_FB_ACQUIRED                 1
0051 #define INTELFB_MMIO_ACQUIRED               2
0052
0053 /* PCI ids for supported devices */
0054 #define PCI_DEVICE_ID_INTEL_830M    0x3577
0055 #define PCI_DEVICE_ID_INTEL_845G    0x2562
0056 #define PCI_DEVICE_ID_INTEL_85XGM   0x3582
0057 #define PCI_DEVICE_ID_INTEL_854     0x358E
0058 #define PCI_DEVICE_ID_INTEL_865G    0x2572
0059 #define PCI_DEVICE_ID_INTEL_915G    0x2582
0060 #define PCI_DEVICE_ID_INTEL_915GM   0x2592
0061 #define PCI_DEVICE_ID_INTEL_945G    0x2772
0062 #define PCI_DEVICE_ID_INTEL_945GM   0x27A2
0063 #define PCI_DEVICE_ID_INTEL_945GME  0x27AE
0064 #define PCI_DEVICE_ID_INTEL_965G    0x29A2
0065 #define PCI_DEVICE_ID_INTEL_965GM   0x2A02
0066
0067 /* Size of MMIO region */
0068 #define INTEL_REG_SIZE          0x80000
0069
0070 #define STRIDE_ALIGNMENT        16
0071 #define STRIDE_ALIGNMENT_I9XX       64
0072
0073 #define PALETTE_8_ENTRIES       256
0074
0075
0076 /*** Macros ***/
0077
0078 /* basic arithmetic */
0079 #define KB(x)           ((x) * 1024)
0080 #define MB(x)           ((x) * 1024 * 1024)
0081 #define BtoKB(x)        ((x) / 1024)
0082 #define BtoMB(x)        ((x) / 1024 / 1024)
0083
0084 #define GTT_PAGE_SIZE           KB(4)
0085
0086 #define ROUND_UP_TO(x, y)   (((x) + (y) - 1) / (y) * (y))
0087 #define ROUND_DOWN_TO(x, y) ((x) / (y) * (y))
0088 #define ROUND_UP_TO_PAGE(x) ROUND_UP_TO((x), GTT_PAGE_SIZE)
0089 #define ROUND_DOWN_TO_PAGE(x)   ROUND_DOWN_TO((x), GTT_PAGE_SIZE)
0090
0091 /* messages */
0092 #define PFX         INTELFB_MODULE_NAME ": "
0093
0094 #define ERR_MSG(fmt, args...)   printk(KERN_ERR PFX fmt, ## args)
0095 #define WRN_MSG(fmt, args...)   printk(KERN_WARNING PFX fmt, ## args)
0096 #define NOT_MSG(fmt, args...)   printk(KERN_NOTICE PFX fmt, ## args)
0097 #define INF_MSG(fmt, args...)   printk(KERN_INFO PFX fmt, ## args)
0098 #if DEBUG
0099 #define DBG_MSG(fmt, args...)   printk(KERN_DEBUG PFX fmt, ## args)
0100 #else
0101 #define DBG_MSG(fmt, args...)   while (0) printk(fmt, ## args)
0102 #endif
0103
0104 /* get commonly used pointers */
0105 #define GET_DINFO(info)     (info)->par
0106
0107 /* misc macros */
0108 #define ACCEL(d, i)                                                     \
0109     ((d)->accel && !(d)->ring_lockup &&                             \
0110      ((i)->var.accel_flags & FB_ACCELF_TEXT))
0111
0112 /*#define NOACCEL_CHIPSET(d)                        \
0113     ((d)->chipset != INTEL_865G)*/
0114 #define NOACCEL_CHIPSET(d)                      \
0115     (0)
0116
0117 #define FIXED_MODE(d) ((d)->fixed_mode)
0118
0119 /*** Driver parameters ***/
0120
0121 #define RINGBUFFER_SIZE     KB(64)
0122 #define HW_CURSOR_SIZE      KB(4)
0123
0124 /* Intel agpgart driver */
0125 #define AGP_PHYSICAL_MEMORY     2
0126
0127 /* store information about an Ixxx DVO */
0128 /* The i830->i865 use multiple DVOs with multiple i2cs */
0129 /* the i915, i945 have a single sDVO i2c bus - which is different */
0130 #define MAX_OUTPUTS 6
0131
0132 /* these are outputs from the chip - integrated only
0133    external chips are via DVO or SDVO output */
0134 #define INTELFB_OUTPUT_UNUSED 0
0135 #define INTELFB_OUTPUT_ANALOG 1
0136 #define INTELFB_OUTPUT_DVO 2
0137 #define INTELFB_OUTPUT_SDVO 3
0138 #define INTELFB_OUTPUT_LVDS 4
0139 #define INTELFB_OUTPUT_TVOUT 5
0140
0141 #define INTELFB_DVO_CHIP_NONE 0
0142 #define INTELFB_DVO_CHIP_LVDS 1
0143 #define INTELFB_DVO_CHIP_TMDS 2
0144 #define INTELFB_DVO_CHIP_TVOUT 4
0145
0146 #define INTELFB_OUTPUT_PIPE_NC  0
0147 #define INTELFB_OUTPUT_PIPE_A   1
0148 #define INTELFB_OUTPUT_PIPE_B   2
0149
0150 /*** Data Types ***/
0151
0152 /* supported chipsets */
0153 enum intel_chips {
0154     INTEL_830M,
0155     INTEL_845G,
0156     INTEL_85XGM,
0157     INTEL_852GM,
0158     INTEL_852GME,
0159     INTEL_854,
0160     INTEL_855GM,
0161     INTEL_855GME,
0162     INTEL_865G,
0163     INTEL_915G,
0164     INTEL_915GM,
0165     INTEL_945G,
0166     INTEL_945GM,
0167     INTEL_945GME,
0168     INTEL_965G,
0169     INTEL_965GM,
0170 };
0171
0172 struct intelfb_hwstate {
0173     u32 vga0_divisor;
0174     u32 vga1_divisor;
0175     u32 vga_pd;
0176     u32 dpll_a;
0177     u32 dpll_b;
0178     u32 fpa0;
0179     u32 fpa1;
0180     u32 fpb0;
0181     u32 fpb1;
0182     u32 palette_a[PALETTE_8_ENTRIES];
0183     u32 palette_b[PALETTE_8_ENTRIES];
0184     u32 htotal_a;
0185     u32 hblank_a;
0186     u32 hsync_a;
0187     u32 vtotal_a;
0188     u32 vblank_a;
0189     u32 vsync_a;
0190     u32 src_size_a;
0191     u32 bclrpat_a;
0192     u32 htotal_b;
0193     u32 hblank_b;
0194     u32 hsync_b;
0195     u32 vtotal_b;
0196     u32 vblank_b;
0197     u32 vsync_b;
0198     u32 src_size_b;
0199     u32 bclrpat_b;
0200     u32 adpa;
0201     u32 dvoa;
0202     u32 dvob;
0203     u32 dvoc;
0204     u32 dvoa_srcdim;
0205     u32 dvob_srcdim;
0206     u32 dvoc_srcdim;
0207     u32 lvds;
0208     u32 pipe_a_conf;
0209     u32 pipe_b_conf;
0210     u32 disp_arb;
0211     u32 cursor_a_control;
0212     u32 cursor_b_control;
0213     u32 cursor_a_base;
0214     u32 cursor_b_base;
0215     u32 cursor_size;
0216     u32 disp_a_ctrl;
0217     u32 disp_b_ctrl;
0218     u32 disp_a_base;
0219     u32 disp_b_base;
0220     u32 cursor_a_palette[4];
0221     u32 cursor_b_palette[4];
0222     u32 disp_a_stride;
0223     u32 disp_b_stride;
0224     u32 vgacntrl;
0225     u32 add_id;
0226     u32 swf0x[7];
0227     u32 swf1x[7];
0228     u32 swf3x[3];
0229     u32 fence[8];
0230     u32 instpm;
0231     u32 mem_mode;
0232     u32 fw_blc_0;
0233     u32 fw_blc_1;
0234     u16 hwstam;
0235     u16 ier;
0236     u16 iir;
0237     u16 imr;
0238 };
0239
0240 struct intelfb_heap_data {
0241     u32 physical;
0242     u8 __iomem *virtual;
0243     u32 offset;     /* in GATT pages */
0244     u32 size;       /* in bytes */
0245 };
0246
0247 #ifdef CONFIG_FB_INTEL_I2C
0248 struct intelfb_i2c_chan {
0249     struct intelfb_info *dinfo;
0250     u32 reg;
0251     struct i2c_adapter adapter;
0252     struct i2c_algo_bit_data algo;
0253 };
0254 #endif
0255
0256 struct intelfb_output_rec {
0257     int type;
0258     int pipe;
0259     int flags;
0260
0261 #ifdef CONFIG_FB_INTEL_I2C
0262     struct intelfb_i2c_chan i2c_bus;
0263     struct intelfb_i2c_chan ddc_bus;
0264 #endif
0265 };
0266
0267 struct intelfb_vsync {
0268     wait_queue_head_t wait;
0269     unsigned int count;
0270     int pan_display;
0271     u32 pan_offset;
0272 };
0273
0274 struct intelfb_info {
0275     struct fb_info *info;
0276     const struct fb_ops *fbops;
0277     struct pci_dev *pdev;
0278
0279     struct intelfb_hwstate save_state;
0280
0281     /* agpgart structs */
0282     struct agp_memory *gtt_fb_mem;     /* use all stolen memory or vram */
0283     struct agp_memory *gtt_ring_mem;   /* ring buffer */
0284     struct agp_memory *gtt_cursor_mem; /* hw cursor */
0285
0286     /* use a gart reserved fb mem */
0287     u8 fbmem_gart;
0288
0289     int wc_cookie;
0290
0291     /* heap data */
0292     struct intelfb_heap_data aperture;
0293     struct intelfb_heap_data fb;
0294     struct intelfb_heap_data ring;
0295     struct intelfb_heap_data cursor;
0296
0297     /* mmio regs */
0298     u32 mmio_base_phys;
0299     u8 __iomem *mmio_base;
0300
0301     /* fb start offset (in bytes) */
0302     u32 fb_start;
0303
0304     /* ring buffer */
0305     u32 ring_head;
0306     u32 ring_tail;
0307     u32 ring_tail_mask;
0308     u32 ring_space;
0309     u32 ring_lockup;
0310
0311     /* palette */
0312     u32 pseudo_palette[16];
0313
0314     /* chip info */
0315     int pci_chipset;
0316     int chipset;
0317     const char *name;
0318     int mobile;
0319
0320     /* current mode */
0321     int bpp, depth;
0322     u32 visual;
0323     int xres, yres, pitch;
0324     int pixclock;
0325
0326     /* current pipe */
0327     int pipe;
0328
0329     /* some flags */
0330     int accel;
0331     int hwcursor;
0332     int fixed_mode;
0333     int ring_active;
0334     int flag;
0335     unsigned long irq_flags;
0336     int open;
0337
0338     /* vsync */
0339     struct intelfb_vsync vsync;
0340     spinlock_t int_lock;
0341
0342     /* hw cursor */
0343     int cursor_on;
0344     int cursor_blanked;
0345     u8  cursor_src[64];
0346
0347     /* initial parameters */
0348     int initial_vga;
0349     struct fb_var_screeninfo initial_var;
0350     u32 initial_fb_base;
0351     u32 initial_video_ram;
0352     u32 initial_pitch;
0353
0354     /* driver registered */
0355     int registered;
0356
0357     /* index into plls */
0358     int pll_index;
0359
0360     /* outputs */
0361     int num_outputs;
0362     struct intelfb_output_rec output[MAX_OUTPUTS];
0363 };
0364
0365 #define IS_I9XX(dinfo) (((dinfo)->chipset == INTEL_915G) || \
0366             ((dinfo)->chipset == INTEL_915GM) ||    \
0367             ((dinfo)->chipset == INTEL_945G) || \
0368             ((dinfo)->chipset == INTEL_945GM) ||    \
0369             ((dinfo)->chipset == INTEL_945GME) ||   \
0370             ((dinfo)->chipset == INTEL_965G) || \
0371             ((dinfo)->chipset == INTEL_965GM))
0372
0373 /*** function prototypes ***/
0374
0375 extern int intelfb_var_to_depth(const struct fb_var_screeninfo *var);
0376
0377 #ifdef CONFIG_FB_INTEL_I2C
0378 extern void intelfb_create_i2c_busses(struct intelfb_info *dinfo);
0379 extern void intelfb_delete_i2c_busses(struct intelfb_info *dinfo);
0380 #endif
0381
0382 #endif /* _INTELFB_H */