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0001 /*
0002  *  Freescale i.MX Frame Buffer device driver
0003  *
0004  *  Copyright (C) 2004 Sascha Hauer, Pengutronix
0005  *   Based on acornfb.c Copyright (C) Russell King.
0006  *
0007  * This file is subject to the terms and conditions of the GNU General Public
0008  * License.  See the file COPYING in the main directory of this archive for
0009  * more details.
0010  *
0011  * Please direct your questions and comments on this driver to the following
0012  * email address:
0013  *
0014  *  linux-arm-kernel@lists.arm.linux.org.uk
0015  */
0016 
0017 #include <linux/module.h>
0018 #include <linux/kernel.h>
0019 #include <linux/errno.h>
0020 #include <linux/string.h>
0021 #include <linux/interrupt.h>
0022 #include <linux/slab.h>
0023 #include <linux/mm.h>
0024 #include <linux/fb.h>
0025 #include <linux/delay.h>
0026 #include <linux/init.h>
0027 #include <linux/ioport.h>
0028 #include <linux/cpufreq.h>
0029 #include <linux/clk.h>
0030 #include <linux/platform_device.h>
0031 #include <linux/dma-mapping.h>
0032 #include <linux/io.h>
0033 #include <linux/lcd.h>
0034 #include <linux/math64.h>
0035 #include <linux/of.h>
0036 #include <linux/of_device.h>
0037 
0038 #include <linux/regulator/consumer.h>
0039 
0040 #include <video/of_display_timing.h>
0041 #include <video/of_videomode.h>
0042 #include <video/videomode.h>
0043 
0044 #define PCR_TFT     (1 << 31)
0045 #define PCR_BPIX_8  (3 << 25)
0046 #define PCR_BPIX_12 (4 << 25)
0047 #define PCR_BPIX_16 (5 << 25)
0048 #define PCR_BPIX_18 (6 << 25)
0049 
0050 struct imx_fb_videomode {
0051     struct fb_videomode mode;
0052     u32 pcr;
0053     bool aus_mode;
0054     unsigned char   bpp;
0055 };
0056 
0057 /*
0058  * Complain if VAR is out of range.
0059  */
0060 #define DEBUG_VAR 1
0061 
0062 #define DRIVER_NAME "imx-fb"
0063 
0064 #define LCDC_SSA    0x00
0065 
0066 #define LCDC_SIZE   0x04
0067 #define SIZE_XMAX(x)    ((((x) >> 4) & 0x3f) << 20)
0068 
0069 #define YMAX_MASK_IMX1  0x1ff
0070 #define YMAX_MASK_IMX21 0x3ff
0071 
0072 #define LCDC_VPW    0x08
0073 #define VPW_VPW(x)  ((x) & 0x3ff)
0074 
0075 #define LCDC_CPOS   0x0C
0076 #define CPOS_CC1    (1<<31)
0077 #define CPOS_CC0    (1<<30)
0078 #define CPOS_OP     (1<<28)
0079 #define CPOS_CXP(x) (((x) & 3ff) << 16)
0080 
0081 #define LCDC_LCWHB  0x10
0082 #define LCWHB_BK_EN (1<<31)
0083 #define LCWHB_CW(w) (((w) & 0x1f) << 24)
0084 #define LCWHB_CH(h) (((h) & 0x1f) << 16)
0085 #define LCWHB_BD(x) ((x) & 0xff)
0086 
0087 #define LCDC_LCHCC  0x14
0088 
0089 #define LCDC_PCR    0x18
0090 
0091 #define LCDC_HCR    0x1C
0092 #define HCR_H_WIDTH(x)  (((x) & 0x3f) << 26)
0093 #define HCR_H_WAIT_1(x) (((x) & 0xff) << 8)
0094 #define HCR_H_WAIT_2(x) ((x) & 0xff)
0095 
0096 #define LCDC_VCR    0x20
0097 #define VCR_V_WIDTH(x)  (((x) & 0x3f) << 26)
0098 #define VCR_V_WAIT_1(x) (((x) & 0xff) << 8)
0099 #define VCR_V_WAIT_2(x) ((x) & 0xff)
0100 
0101 #define LCDC_POS    0x24
0102 #define POS_POS(x)  ((x) & 1f)
0103 
0104 #define LCDC_LSCR1  0x28
0105 /* bit fields in imxfb.h */
0106 
0107 #define LCDC_PWMR   0x2C
0108 /* bit fields in imxfb.h */
0109 
0110 #define LCDC_DMACR  0x30
0111 /* bit fields in imxfb.h */
0112 
0113 #define LCDC_RMCR   0x34
0114 
0115 #define RMCR_LCDC_EN_MX1    (1<<1)
0116 
0117 #define RMCR_SELF_REF   (1<<0)
0118 
0119 #define LCDC_LCDICR 0x38
0120 #define LCDICR_INT_SYN  (1<<2)
0121 #define LCDICR_INT_CON  (1)
0122 
0123 #define LCDC_LCDISR 0x40
0124 #define LCDISR_UDR_ERR  (1<<3)
0125 #define LCDISR_ERR_RES  (1<<2)
0126 #define LCDISR_EOF  (1<<1)
0127 #define LCDISR_BOF  (1<<0)
0128 
0129 #define IMXFB_LSCR1_DEFAULT 0x00120300
0130 
0131 #define LCDC_LAUSCR 0x80
0132 #define LAUSCR_AUS_MODE (1<<31)
0133 
0134 /* Used fb-mode. Can be set on kernel command line, therefore file-static. */
0135 static const char *fb_mode;
0136 
0137 /*
0138  * These are the bitfields for each
0139  * display depth that we support.
0140  */
0141 struct imxfb_rgb {
0142     struct fb_bitfield  red;
0143     struct fb_bitfield  green;
0144     struct fb_bitfield  blue;
0145     struct fb_bitfield  transp;
0146 };
0147 
0148 enum imxfb_type {
0149     IMX1_FB,
0150     IMX21_FB,
0151 };
0152 
0153 struct imxfb_info {
0154     struct platform_device  *pdev;
0155     void __iomem        *regs;
0156     struct clk      *clk_ipg;
0157     struct clk      *clk_ahb;
0158     struct clk      *clk_per;
0159     enum imxfb_type     devtype;
0160     bool            enabled;
0161 
0162     /*
0163      * These are the addresses we mapped
0164      * the framebuffer memory region to.
0165      */
0166     dma_addr_t      map_dma;
0167     u_int           map_size;
0168 
0169     u_int           palette_size;
0170 
0171     dma_addr_t      dbar1;
0172     dma_addr_t      dbar2;
0173 
0174     u_int           pcr;
0175     u_int           lauscr;
0176     u_int           pwmr;
0177     u_int           lscr1;
0178     u_int           dmacr;
0179     bool            cmap_inverse;
0180     bool            cmap_static;
0181 
0182     struct imx_fb_videomode *mode;
0183     int         num_modes;
0184 
0185     struct regulator    *lcd_pwr;
0186     int         lcd_pwr_enabled;
0187 };
0188 
0189 static const struct platform_device_id imxfb_devtype[] = {
0190     {
0191         .name = "imx1-fb",
0192         .driver_data = IMX1_FB,
0193     }, {
0194         .name = "imx21-fb",
0195         .driver_data = IMX21_FB,
0196     }, {
0197         /* sentinel */
0198     }
0199 };
0200 MODULE_DEVICE_TABLE(platform, imxfb_devtype);
0201 
0202 static const struct of_device_id imxfb_of_dev_id[] = {
0203     {
0204         .compatible = "fsl,imx1-fb",
0205         .data = &imxfb_devtype[IMX1_FB],
0206     }, {
0207         .compatible = "fsl,imx21-fb",
0208         .data = &imxfb_devtype[IMX21_FB],
0209     }, {
0210         /* sentinel */
0211     }
0212 };
0213 MODULE_DEVICE_TABLE(of, imxfb_of_dev_id);
0214 
0215 static inline int is_imx1_fb(struct imxfb_info *fbi)
0216 {
0217     return fbi->devtype == IMX1_FB;
0218 }
0219 
0220 #define IMX_NAME    "IMX"
0221 
0222 /*
0223  * Minimum X and Y resolutions
0224  */
0225 #define MIN_XRES    64
0226 #define MIN_YRES    64
0227 
0228 /* Actually this really is 18bit support, the lowest 2 bits of each colour
0229  * are unused in hardware. We claim to have 24bit support to make software
0230  * like X work, which does not support 18bit.
0231  */
0232 static struct imxfb_rgb def_rgb_18 = {
0233     .red    = {.offset = 16, .length = 8,},
0234     .green  = {.offset = 8, .length = 8,},
0235     .blue   = {.offset = 0, .length = 8,},
0236     .transp = {.offset = 0, .length = 0,},
0237 };
0238 
0239 static struct imxfb_rgb def_rgb_16_tft = {
0240     .red    = {.offset = 11, .length = 5,},
0241     .green  = {.offset = 5, .length = 6,},
0242     .blue   = {.offset = 0, .length = 5,},
0243     .transp = {.offset = 0, .length = 0,},
0244 };
0245 
0246 static struct imxfb_rgb def_rgb_16_stn = {
0247     .red    = {.offset = 8, .length = 4,},
0248     .green  = {.offset = 4, .length = 4,},
0249     .blue   = {.offset = 0, .length = 4,},
0250     .transp = {.offset = 0, .length = 0,},
0251 };
0252 
0253 static struct imxfb_rgb def_rgb_8 = {
0254     .red    = {.offset = 0, .length = 8,},
0255     .green  = {.offset = 0, .length = 8,},
0256     .blue   = {.offset = 0, .length = 8,},
0257     .transp = {.offset = 0, .length = 0,},
0258 };
0259 
0260 static int imxfb_activate_var(struct fb_var_screeninfo *var,
0261         struct fb_info *info);
0262 
0263 static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf)
0264 {
0265     chan &= 0xffff;
0266     chan >>= 16 - bf->length;
0267     return chan << bf->offset;
0268 }
0269 
0270 static int imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue,
0271         u_int trans, struct fb_info *info)
0272 {
0273     struct imxfb_info *fbi = info->par;
0274     u_int val, ret = 1;
0275 
0276 #define CNVT_TOHW(val,width) ((((val)<<(width))+0x7FFF-(val))>>16)
0277     if (regno < fbi->palette_size) {
0278         val = (CNVT_TOHW(red, 4) << 8) |
0279               (CNVT_TOHW(green,4) << 4) |
0280               CNVT_TOHW(blue,  4);
0281 
0282         writel(val, fbi->regs + 0x800 + (regno << 2));
0283         ret = 0;
0284     }
0285     return ret;
0286 }
0287 
0288 static int imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
0289            u_int trans, struct fb_info *info)
0290 {
0291     struct imxfb_info *fbi = info->par;
0292     unsigned int val;
0293     int ret = 1;
0294 
0295     /*
0296      * If inverse mode was selected, invert all the colours
0297      * rather than the register number.  The register number
0298      * is what you poke into the framebuffer to produce the
0299      * colour you requested.
0300      */
0301     if (fbi->cmap_inverse) {
0302         red   = 0xffff - red;
0303         green = 0xffff - green;
0304         blue  = 0xffff - blue;
0305     }
0306 
0307     /*
0308      * If greyscale is true, then we convert the RGB value
0309      * to greyscale no mater what visual we are using.
0310      */
0311     if (info->var.grayscale)
0312         red = green = blue = (19595 * red + 38470 * green +
0313                     7471 * blue) >> 16;
0314 
0315     switch (info->fix.visual) {
0316     case FB_VISUAL_TRUECOLOR:
0317         /*
0318          * 12 or 16-bit True Colour.  We encode the RGB value
0319          * according to the RGB bitfield information.
0320          */
0321         if (regno < 16) {
0322             u32 *pal = info->pseudo_palette;
0323 
0324             val  = chan_to_field(red, &info->var.red);
0325             val |= chan_to_field(green, &info->var.green);
0326             val |= chan_to_field(blue, &info->var.blue);
0327 
0328             pal[regno] = val;
0329             ret = 0;
0330         }
0331         break;
0332 
0333     case FB_VISUAL_STATIC_PSEUDOCOLOR:
0334     case FB_VISUAL_PSEUDOCOLOR:
0335         ret = imxfb_setpalettereg(regno, red, green, blue, trans, info);
0336         break;
0337     }
0338 
0339     return ret;
0340 }
0341 
0342 static const struct imx_fb_videomode *imxfb_find_mode(struct imxfb_info *fbi)
0343 {
0344     struct imx_fb_videomode *m;
0345     int i;
0346 
0347     if (!fb_mode)
0348         return &fbi->mode[0];
0349 
0350     for (i = 0, m = &fbi->mode[0]; i < fbi->num_modes; i++, m++) {
0351         if (!strcmp(m->mode.name, fb_mode))
0352             return m;
0353     }
0354     return NULL;
0355 }
0356 
0357 /*
0358  *  imxfb_check_var():
0359  *    Round up in the following order: bits_per_pixel, xres,
0360  *    yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale,
0361  *    bitfields, horizontal timing, vertical timing.
0362  */
0363 static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
0364 {
0365     struct imxfb_info *fbi = info->par;
0366     struct imxfb_rgb *rgb;
0367     const struct imx_fb_videomode *imxfb_mode;
0368     unsigned long lcd_clk;
0369     unsigned long long tmp;
0370     u32 pcr = 0;
0371 
0372     if (var->xres < MIN_XRES)
0373         var->xres = MIN_XRES;
0374     if (var->yres < MIN_YRES)
0375         var->yres = MIN_YRES;
0376 
0377     imxfb_mode = imxfb_find_mode(fbi);
0378     if (!imxfb_mode)
0379         return -EINVAL;
0380 
0381     var->xres       = imxfb_mode->mode.xres;
0382     var->yres       = imxfb_mode->mode.yres;
0383     var->bits_per_pixel = imxfb_mode->bpp;
0384     var->pixclock       = imxfb_mode->mode.pixclock;
0385     var->hsync_len      = imxfb_mode->mode.hsync_len;
0386     var->left_margin    = imxfb_mode->mode.left_margin;
0387     var->right_margin   = imxfb_mode->mode.right_margin;
0388     var->vsync_len      = imxfb_mode->mode.vsync_len;
0389     var->upper_margin   = imxfb_mode->mode.upper_margin;
0390     var->lower_margin   = imxfb_mode->mode.lower_margin;
0391     var->sync       = imxfb_mode->mode.sync;
0392     var->xres_virtual   = max(var->xres_virtual, var->xres);
0393     var->yres_virtual   = max(var->yres_virtual, var->yres);
0394 
0395     pr_debug("var->bits_per_pixel=%d\n", var->bits_per_pixel);
0396 
0397     lcd_clk = clk_get_rate(fbi->clk_per);
0398 
0399     tmp = var->pixclock * (unsigned long long)lcd_clk;
0400 
0401     do_div(tmp, 1000000);
0402 
0403     if (do_div(tmp, 1000000) > 500000)
0404         tmp++;
0405 
0406     pcr = (unsigned int)tmp;
0407 
0408     if (--pcr > 0x3F) {
0409         pcr = 0x3F;
0410         printk(KERN_WARNING "Must limit pixel clock to %luHz\n",
0411                 lcd_clk / pcr);
0412     }
0413 
0414     switch (var->bits_per_pixel) {
0415     case 32:
0416         pcr |= PCR_BPIX_18;
0417         rgb = &def_rgb_18;
0418         break;
0419     case 16:
0420     default:
0421         if (is_imx1_fb(fbi))
0422             pcr |= PCR_BPIX_12;
0423         else
0424             pcr |= PCR_BPIX_16;
0425 
0426         if (imxfb_mode->pcr & PCR_TFT)
0427             rgb = &def_rgb_16_tft;
0428         else
0429             rgb = &def_rgb_16_stn;
0430         break;
0431     case 8:
0432         pcr |= PCR_BPIX_8;
0433         rgb = &def_rgb_8;
0434         break;
0435     }
0436 
0437     /* add sync polarities */
0438     pcr |= imxfb_mode->pcr & ~(0x3f | (7 << 25));
0439 
0440     fbi->pcr = pcr;
0441     /*
0442      * The LCDC AUS Mode Control Register does not exist on imx1.
0443      */
0444     if (!is_imx1_fb(fbi) && imxfb_mode->aus_mode)
0445         fbi->lauscr = LAUSCR_AUS_MODE;
0446 
0447     /*
0448      * Copy the RGB parameters for this display
0449      * from the machine specific parameters.
0450      */
0451     var->red    = rgb->red;
0452     var->green  = rgb->green;
0453     var->blue   = rgb->blue;
0454     var->transp = rgb->transp;
0455 
0456     pr_debug("RGBT length = %d:%d:%d:%d\n",
0457         var->red.length, var->green.length, var->blue.length,
0458         var->transp.length);
0459 
0460     pr_debug("RGBT offset = %d:%d:%d:%d\n",
0461         var->red.offset, var->green.offset, var->blue.offset,
0462         var->transp.offset);
0463 
0464     return 0;
0465 }
0466 
0467 /*
0468  * imxfb_set_par():
0469  *  Set the user defined part of the display for the specified console
0470  */
0471 static int imxfb_set_par(struct fb_info *info)
0472 {
0473     struct imxfb_info *fbi = info->par;
0474     struct fb_var_screeninfo *var = &info->var;
0475 
0476     if (var->bits_per_pixel == 16 || var->bits_per_pixel == 32)
0477         info->fix.visual = FB_VISUAL_TRUECOLOR;
0478     else if (!fbi->cmap_static)
0479         info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
0480     else {
0481         /*
0482          * Some people have weird ideas about wanting static
0483          * pseudocolor maps.  I suspect their user space
0484          * applications are broken.
0485          */
0486         info->fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR;
0487     }
0488 
0489     info->fix.line_length = var->xres_virtual * var->bits_per_pixel / 8;
0490     fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16;
0491 
0492     imxfb_activate_var(var, info);
0493 
0494     return 0;
0495 }
0496 
0497 static int imxfb_enable_controller(struct imxfb_info *fbi)
0498 {
0499     int ret;
0500 
0501     if (fbi->enabled)
0502         return 0;
0503 
0504     pr_debug("Enabling LCD controller\n");
0505 
0506     writel(fbi->map_dma, fbi->regs + LCDC_SSA);
0507 
0508     /* panning offset 0 (0 pixel offset)        */
0509     writel(0x00000000, fbi->regs + LCDC_POS);
0510 
0511     /* disable hardware cursor */
0512     writel(readl(fbi->regs + LCDC_CPOS) & ~(CPOS_CC0 | CPOS_CC1),
0513         fbi->regs + LCDC_CPOS);
0514 
0515     /*
0516      * RMCR_LCDC_EN_MX1 is present on i.MX1 only, but doesn't hurt
0517      * on other SoCs
0518      */
0519     writel(RMCR_LCDC_EN_MX1, fbi->regs + LCDC_RMCR);
0520 
0521     ret = clk_prepare_enable(fbi->clk_ipg);
0522     if (ret)
0523         goto err_enable_ipg;
0524 
0525     ret = clk_prepare_enable(fbi->clk_ahb);
0526     if (ret)
0527         goto err_enable_ahb;
0528 
0529     ret = clk_prepare_enable(fbi->clk_per);
0530     if (ret)
0531         goto err_enable_per;
0532 
0533     fbi->enabled = true;
0534     return 0;
0535 
0536 err_enable_per:
0537     clk_disable_unprepare(fbi->clk_ahb);
0538 err_enable_ahb:
0539     clk_disable_unprepare(fbi->clk_ipg);
0540 err_enable_ipg:
0541     writel(0, fbi->regs + LCDC_RMCR);
0542 
0543     return ret;
0544 }
0545 
0546 static void imxfb_disable_controller(struct imxfb_info *fbi)
0547 {
0548     if (!fbi->enabled)
0549         return;
0550 
0551     pr_debug("Disabling LCD controller\n");
0552 
0553     clk_disable_unprepare(fbi->clk_per);
0554     clk_disable_unprepare(fbi->clk_ahb);
0555     clk_disable_unprepare(fbi->clk_ipg);
0556     fbi->enabled = false;
0557 
0558     writel(0, fbi->regs + LCDC_RMCR);
0559 }
0560 
0561 static int imxfb_blank(int blank, struct fb_info *info)
0562 {
0563     struct imxfb_info *fbi = info->par;
0564 
0565     pr_debug("imxfb_blank: blank=%d\n", blank);
0566 
0567     switch (blank) {
0568     case FB_BLANK_POWERDOWN:
0569     case FB_BLANK_VSYNC_SUSPEND:
0570     case FB_BLANK_HSYNC_SUSPEND:
0571     case FB_BLANK_NORMAL:
0572         imxfb_disable_controller(fbi);
0573         break;
0574 
0575     case FB_BLANK_UNBLANK:
0576         return imxfb_enable_controller(fbi);
0577     }
0578     return 0;
0579 }
0580 
0581 static const struct fb_ops imxfb_ops = {
0582     .owner      = THIS_MODULE,
0583     .fb_check_var   = imxfb_check_var,
0584     .fb_set_par = imxfb_set_par,
0585     .fb_setcolreg   = imxfb_setcolreg,
0586     .fb_fillrect    = cfb_fillrect,
0587     .fb_copyarea    = cfb_copyarea,
0588     .fb_imageblit   = cfb_imageblit,
0589     .fb_blank   = imxfb_blank,
0590 };
0591 
0592 /*
0593  * imxfb_activate_var():
0594  *  Configures LCD Controller based on entries in var parameter.  Settings are
0595  *  only written to the controller if changes were made.
0596  */
0597 static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *info)
0598 {
0599     struct imxfb_info *fbi = info->par;
0600     u32 ymax_mask = is_imx1_fb(fbi) ? YMAX_MASK_IMX1 : YMAX_MASK_IMX21;
0601 
0602     pr_debug("var: xres=%d hslen=%d lm=%d rm=%d\n",
0603         var->xres, var->hsync_len,
0604         var->left_margin, var->right_margin);
0605     pr_debug("var: yres=%d vslen=%d um=%d bm=%d\n",
0606         var->yres, var->vsync_len,
0607         var->upper_margin, var->lower_margin);
0608 
0609 #if DEBUG_VAR
0610     if (var->xres < 16        || var->xres > 1024)
0611         printk(KERN_ERR "%s: invalid xres %d\n",
0612             info->fix.id, var->xres);
0613     if (var->hsync_len < 1    || var->hsync_len > 64)
0614         printk(KERN_ERR "%s: invalid hsync_len %d\n",
0615             info->fix.id, var->hsync_len);
0616     if (var->left_margin > 255)
0617         printk(KERN_ERR "%s: invalid left_margin %d\n",
0618             info->fix.id, var->left_margin);
0619     if (var->right_margin > 255)
0620         printk(KERN_ERR "%s: invalid right_margin %d\n",
0621             info->fix.id, var->right_margin);
0622     if (var->yres < 1 || var->yres > ymax_mask)
0623         printk(KERN_ERR "%s: invalid yres %d\n",
0624             info->fix.id, var->yres);
0625     if (var->vsync_len > 100)
0626         printk(KERN_ERR "%s: invalid vsync_len %d\n",
0627             info->fix.id, var->vsync_len);
0628     if (var->upper_margin > 63)
0629         printk(KERN_ERR "%s: invalid upper_margin %d\n",
0630             info->fix.id, var->upper_margin);
0631     if (var->lower_margin > 255)
0632         printk(KERN_ERR "%s: invalid lower_margin %d\n",
0633             info->fix.id, var->lower_margin);
0634 #endif
0635 
0636     /* physical screen start address        */
0637     writel(VPW_VPW(var->xres * var->bits_per_pixel / 8 / 4),
0638         fbi->regs + LCDC_VPW);
0639 
0640     writel(HCR_H_WIDTH(var->hsync_len - 1) |
0641         HCR_H_WAIT_1(var->right_margin - 1) |
0642         HCR_H_WAIT_2(var->left_margin - 3),
0643         fbi->regs + LCDC_HCR);
0644 
0645     writel(VCR_V_WIDTH(var->vsync_len) |
0646         VCR_V_WAIT_1(var->lower_margin) |
0647         VCR_V_WAIT_2(var->upper_margin),
0648         fbi->regs + LCDC_VCR);
0649 
0650     writel(SIZE_XMAX(var->xres) | (var->yres & ymax_mask),
0651             fbi->regs + LCDC_SIZE);
0652 
0653     writel(fbi->pcr, fbi->regs + LCDC_PCR);
0654     if (fbi->pwmr)
0655         writel(fbi->pwmr, fbi->regs + LCDC_PWMR);
0656     writel(fbi->lscr1, fbi->regs + LCDC_LSCR1);
0657 
0658     /* dmacr = 0 is no valid value, as we need DMA control marks. */
0659     if (fbi->dmacr)
0660         writel(fbi->dmacr, fbi->regs + LCDC_DMACR);
0661 
0662     if (fbi->lauscr)
0663         writel(fbi->lauscr, fbi->regs + LCDC_LAUSCR);
0664 
0665     return 0;
0666 }
0667 
0668 static int imxfb_init_fbinfo(struct platform_device *pdev)
0669 {
0670     struct fb_info *info = platform_get_drvdata(pdev);
0671     struct imxfb_info *fbi = info->par;
0672     struct device_node *np;
0673 
0674     pr_debug("%s\n",__func__);
0675 
0676     info->pseudo_palette = kmalloc_array(16, sizeof(u32), GFP_KERNEL);
0677     if (!info->pseudo_palette)
0678         return -ENOMEM;
0679 
0680     memset(fbi, 0, sizeof(struct imxfb_info));
0681 
0682     fbi->devtype = pdev->id_entry->driver_data;
0683 
0684     strscpy(info->fix.id, IMX_NAME, sizeof(info->fix.id));
0685 
0686     info->fix.type          = FB_TYPE_PACKED_PIXELS;
0687     info->fix.type_aux      = 0;
0688     info->fix.xpanstep      = 0;
0689     info->fix.ypanstep      = 0;
0690     info->fix.ywrapstep     = 0;
0691     info->fix.accel         = FB_ACCEL_NONE;
0692 
0693     info->var.nonstd        = 0;
0694     info->var.activate      = FB_ACTIVATE_NOW;
0695     info->var.height        = -1;
0696     info->var.width = -1;
0697     info->var.accel_flags       = 0;
0698     info->var.vmode         = FB_VMODE_NONINTERLACED;
0699 
0700     info->fbops         = &imxfb_ops;
0701     info->flags         = FBINFO_FLAG_DEFAULT |
0702                       FBINFO_READS_FAST;
0703 
0704     np = pdev->dev.of_node;
0705     info->var.grayscale = of_property_read_bool(np,
0706                     "cmap-greyscale");
0707     fbi->cmap_inverse = of_property_read_bool(np, "cmap-inverse");
0708     fbi->cmap_static = of_property_read_bool(np, "cmap-static");
0709 
0710     fbi->lscr1 = IMXFB_LSCR1_DEFAULT;
0711 
0712     of_property_read_u32(np, "fsl,lpccr", &fbi->pwmr);
0713 
0714     of_property_read_u32(np, "fsl,lscr1", &fbi->lscr1);
0715 
0716     of_property_read_u32(np, "fsl,dmacr", &fbi->dmacr);
0717 
0718     return 0;
0719 }
0720 
0721 static int imxfb_of_read_mode(struct device *dev, struct device_node *np,
0722         struct imx_fb_videomode *imxfb_mode)
0723 {
0724     int ret;
0725     struct fb_videomode *of_mode = &imxfb_mode->mode;
0726     u32 bpp;
0727     u32 pcr;
0728 
0729     ret = of_property_read_string(np, "model", &of_mode->name);
0730     if (ret)
0731         of_mode->name = NULL;
0732 
0733     ret = of_get_fb_videomode(np, of_mode, OF_USE_NATIVE_MODE);
0734     if (ret) {
0735         dev_err(dev, "Failed to get videomode from DT\n");
0736         return ret;
0737     }
0738 
0739     ret = of_property_read_u32(np, "bits-per-pixel", &bpp);
0740     ret |= of_property_read_u32(np, "fsl,pcr", &pcr);
0741 
0742     if (ret) {
0743         dev_err(dev, "Failed to read bpp and pcr from DT\n");
0744         return -EINVAL;
0745     }
0746 
0747     if (bpp < 1 || bpp > 255) {
0748         dev_err(dev, "Bits per pixel have to be between 1 and 255\n");
0749         return -EINVAL;
0750     }
0751 
0752     imxfb_mode->bpp = bpp;
0753     imxfb_mode->pcr = pcr;
0754 
0755     /*
0756      * fsl,aus-mode is optional
0757      */
0758     imxfb_mode->aus_mode = of_property_read_bool(np, "fsl,aus-mode");
0759 
0760     return 0;
0761 }
0762 
0763 static int imxfb_lcd_check_fb(struct lcd_device *lcddev, struct fb_info *fi)
0764 {
0765     struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev);
0766 
0767     if (!fi || fi->par == fbi)
0768         return 1;
0769 
0770     return 0;
0771 }
0772 
0773 static int imxfb_lcd_get_contrast(struct lcd_device *lcddev)
0774 {
0775     struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev);
0776 
0777     return fbi->pwmr & 0xff;
0778 }
0779 
0780 static int imxfb_lcd_set_contrast(struct lcd_device *lcddev, int contrast)
0781 {
0782     struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev);
0783 
0784     if (fbi->pwmr && fbi->enabled) {
0785         if (contrast > 255)
0786             contrast = 255;
0787         else if (contrast < 0)
0788             contrast = 0;
0789 
0790         fbi->pwmr &= ~0xff;
0791         fbi->pwmr |= contrast;
0792 
0793         writel(fbi->pwmr, fbi->regs + LCDC_PWMR);
0794     }
0795 
0796     return 0;
0797 }
0798 
0799 static int imxfb_lcd_get_power(struct lcd_device *lcddev)
0800 {
0801     struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev);
0802 
0803     if (!IS_ERR(fbi->lcd_pwr) &&
0804         !regulator_is_enabled(fbi->lcd_pwr))
0805         return FB_BLANK_POWERDOWN;
0806 
0807     return FB_BLANK_UNBLANK;
0808 }
0809 
0810 static int imxfb_regulator_set(struct imxfb_info *fbi, int enable)
0811 {
0812     int ret;
0813 
0814     if (enable == fbi->lcd_pwr_enabled)
0815         return 0;
0816 
0817     if (enable)
0818         ret = regulator_enable(fbi->lcd_pwr);
0819     else
0820         ret = regulator_disable(fbi->lcd_pwr);
0821 
0822     if (ret == 0)
0823         fbi->lcd_pwr_enabled = enable;
0824 
0825     return ret;
0826 }
0827 
0828 static int imxfb_lcd_set_power(struct lcd_device *lcddev, int power)
0829 {
0830     struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev);
0831 
0832     if (!IS_ERR(fbi->lcd_pwr))
0833         return imxfb_regulator_set(fbi, power == FB_BLANK_UNBLANK);
0834 
0835     return 0;
0836 }
0837 
0838 static struct lcd_ops imxfb_lcd_ops = {
0839     .check_fb   = imxfb_lcd_check_fb,
0840     .get_contrast   = imxfb_lcd_get_contrast,
0841     .set_contrast   = imxfb_lcd_set_contrast,
0842     .get_power  = imxfb_lcd_get_power,
0843     .set_power  = imxfb_lcd_set_power,
0844 };
0845 
0846 static int imxfb_setup(void)
0847 {
0848     char *opt, *options = NULL;
0849 
0850     if (fb_get_options("imxfb", &options))
0851         return -ENODEV;
0852 
0853     if (!options || !*options)
0854         return 0;
0855 
0856     while ((opt = strsep(&options, ",")) != NULL) {
0857         if (!*opt)
0858             continue;
0859         else
0860             fb_mode = opt;
0861     }
0862 
0863     return 0;
0864 }
0865 
0866 static int imxfb_probe(struct platform_device *pdev)
0867 {
0868     struct imxfb_info *fbi;
0869     struct lcd_device *lcd;
0870     struct fb_info *info;
0871     struct resource *res;
0872     struct imx_fb_videomode *m;
0873     const struct of_device_id *of_id;
0874     struct device_node *display_np;
0875     int ret, i;
0876     int bytes_per_pixel;
0877 
0878     dev_info(&pdev->dev, "i.MX Framebuffer driver\n");
0879 
0880     ret = imxfb_setup();
0881     if (ret < 0)
0882         return ret;
0883 
0884     of_id = of_match_device(imxfb_of_dev_id, &pdev->dev);
0885     if (of_id)
0886         pdev->id_entry = of_id->data;
0887 
0888     res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
0889     if (!res)
0890         return -ENODEV;
0891 
0892     info = framebuffer_alloc(sizeof(struct imxfb_info), &pdev->dev);
0893     if (!info)
0894         return -ENOMEM;
0895 
0896     fbi = info->par;
0897 
0898     platform_set_drvdata(pdev, info);
0899 
0900     ret = imxfb_init_fbinfo(pdev);
0901     if (ret < 0)
0902         goto failed_init;
0903 
0904     fb_mode = NULL;
0905 
0906     display_np = of_parse_phandle(pdev->dev.of_node, "display", 0);
0907     if (!display_np) {
0908         dev_err(&pdev->dev, "No display defined in devicetree\n");
0909         ret = -EINVAL;
0910         goto failed_of_parse;
0911     }
0912 
0913     /*
0914      * imxfb does not support more modes, we choose only the native
0915      * mode.
0916      */
0917     fbi->num_modes = 1;
0918 
0919     fbi->mode = devm_kzalloc(&pdev->dev,
0920             sizeof(struct imx_fb_videomode), GFP_KERNEL);
0921     if (!fbi->mode) {
0922         ret = -ENOMEM;
0923         of_node_put(display_np);
0924         goto failed_of_parse;
0925     }
0926 
0927     ret = imxfb_of_read_mode(&pdev->dev, display_np, fbi->mode);
0928     of_node_put(display_np);
0929     if (ret)
0930         goto failed_of_parse;
0931 
0932     /* Calculate maximum bytes used per pixel. In most cases this should
0933      * be the same as m->bpp/8 */
0934     m = &fbi->mode[0];
0935     bytes_per_pixel = (m->bpp + 7) / 8;
0936     for (i = 0; i < fbi->num_modes; i++, m++)
0937         info->fix.smem_len = max_t(size_t, info->fix.smem_len,
0938                 m->mode.xres * m->mode.yres * bytes_per_pixel);
0939 
0940     fbi->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
0941     if (IS_ERR(fbi->clk_ipg)) {
0942         ret = PTR_ERR(fbi->clk_ipg);
0943         goto failed_getclock;
0944     }
0945 
0946     /*
0947      * The LCDC controller does not have an enable bit. The
0948      * controller starts directly when the clocks are enabled.
0949      * If the clocks are enabled when the controller is not yet
0950      * programmed with proper register values (enabled at the
0951      * bootloader, for example) then it just goes into some undefined
0952      * state.
0953      * To avoid this issue, let's enable and disable LCDC IPG clock
0954      * so that we force some kind of 'reset' to the LCDC block.
0955      */
0956     ret = clk_prepare_enable(fbi->clk_ipg);
0957     if (ret)
0958         goto failed_getclock;
0959     clk_disable_unprepare(fbi->clk_ipg);
0960 
0961     fbi->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
0962     if (IS_ERR(fbi->clk_ahb)) {
0963         ret = PTR_ERR(fbi->clk_ahb);
0964         goto failed_getclock;
0965     }
0966 
0967     fbi->clk_per = devm_clk_get(&pdev->dev, "per");
0968     if (IS_ERR(fbi->clk_per)) {
0969         ret = PTR_ERR(fbi->clk_per);
0970         goto failed_getclock;
0971     }
0972 
0973     fbi->regs = devm_ioremap_resource(&pdev->dev, res);
0974     if (IS_ERR(fbi->regs)) {
0975         dev_err(&pdev->dev, "Cannot map frame buffer registers\n");
0976         ret = PTR_ERR(fbi->regs);
0977         goto failed_ioremap;
0978     }
0979 
0980     fbi->map_size = PAGE_ALIGN(info->fix.smem_len);
0981     info->screen_buffer = dma_alloc_wc(&pdev->dev, fbi->map_size,
0982                        &fbi->map_dma, GFP_KERNEL);
0983     if (!info->screen_buffer) {
0984         dev_err(&pdev->dev, "Failed to allocate video RAM\n");
0985         ret = -ENOMEM;
0986         goto failed_map;
0987     }
0988 
0989     info->fix.smem_start = fbi->map_dma;
0990 
0991     INIT_LIST_HEAD(&info->modelist);
0992     for (i = 0; i < fbi->num_modes; i++)
0993         fb_add_videomode(&fbi->mode[i].mode, &info->modelist);
0994 
0995     /*
0996      * This makes sure that our colour bitfield
0997      * descriptors are correctly initialised.
0998      */
0999     imxfb_check_var(&info->var, info);
1000 
1001     /*
1002      * For modes > 8bpp, the color map is bypassed.
1003      * Therefore, 256 entries are enough.
1004      */
1005     ret = fb_alloc_cmap(&info->cmap, 256, 0);
1006     if (ret < 0)
1007         goto failed_cmap;
1008 
1009     imxfb_set_par(info);
1010     ret = register_framebuffer(info);
1011     if (ret < 0) {
1012         dev_err(&pdev->dev, "failed to register framebuffer\n");
1013         goto failed_register;
1014     }
1015 
1016     fbi->lcd_pwr = devm_regulator_get(&pdev->dev, "lcd");
1017     if (PTR_ERR(fbi->lcd_pwr) == -EPROBE_DEFER) {
1018         ret = -EPROBE_DEFER;
1019         goto failed_lcd;
1020     }
1021 
1022     lcd = devm_lcd_device_register(&pdev->dev, "imxfb-lcd", &pdev->dev, fbi,
1023                        &imxfb_lcd_ops);
1024     if (IS_ERR(lcd)) {
1025         ret = PTR_ERR(lcd);
1026         goto failed_lcd;
1027     }
1028 
1029     lcd->props.max_contrast = 0xff;
1030 
1031     imxfb_enable_controller(fbi);
1032     fbi->pdev = pdev;
1033 
1034     return 0;
1035 
1036 failed_lcd:
1037     unregister_framebuffer(info);
1038 
1039 failed_register:
1040     fb_dealloc_cmap(&info->cmap);
1041 failed_cmap:
1042     dma_free_wc(&pdev->dev, fbi->map_size, info->screen_buffer,
1043             fbi->map_dma);
1044 failed_map:
1045 failed_ioremap:
1046 failed_getclock:
1047     release_mem_region(res->start, resource_size(res));
1048 failed_of_parse:
1049     kfree(info->pseudo_palette);
1050 failed_init:
1051     framebuffer_release(info);
1052     return ret;
1053 }
1054 
1055 static int imxfb_remove(struct platform_device *pdev)
1056 {
1057     struct fb_info *info = platform_get_drvdata(pdev);
1058     struct imxfb_info *fbi = info->par;
1059 
1060     imxfb_disable_controller(fbi);
1061 
1062     unregister_framebuffer(info);
1063     fb_dealloc_cmap(&info->cmap);
1064     dma_free_wc(&pdev->dev, fbi->map_size, info->screen_buffer,
1065             fbi->map_dma);
1066     kfree(info->pseudo_palette);
1067     framebuffer_release(info);
1068 
1069     return 0;
1070 }
1071 
1072 static int __maybe_unused imxfb_suspend(struct device *dev)
1073 {
1074     struct fb_info *info = dev_get_drvdata(dev);
1075     struct imxfb_info *fbi = info->par;
1076 
1077     imxfb_disable_controller(fbi);
1078 
1079     return 0;
1080 }
1081 
1082 static int __maybe_unused imxfb_resume(struct device *dev)
1083 {
1084     struct fb_info *info = dev_get_drvdata(dev);
1085     struct imxfb_info *fbi = info->par;
1086 
1087     imxfb_enable_controller(fbi);
1088 
1089     return 0;
1090 }
1091 
1092 static SIMPLE_DEV_PM_OPS(imxfb_pm_ops, imxfb_suspend, imxfb_resume);
1093 
1094 static struct platform_driver imxfb_driver = {
1095     .driver     = {
1096         .name   = DRIVER_NAME,
1097         .of_match_table = imxfb_of_dev_id,
1098         .pm = &imxfb_pm_ops,
1099     },
1100     .probe      = imxfb_probe,
1101     .remove     = imxfb_remove,
1102     .id_table   = imxfb_devtype,
1103 };
1104 module_platform_driver(imxfb_driver);
1105 
1106 MODULE_DESCRIPTION("Freescale i.MX framebuffer driver");
1107 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
1108 MODULE_LICENSE("GPL");
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