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0001 /*-*- linux-c -*-
0002  *  linux/drivers/video/i810_main.h -- Intel 810 Non-discrete Video Timings 
0003  *                                     (VESA GTF)
0004  *
0005  *      Copyright (C) 2001 Antonino Daplas<adaplas@pol.net>
0006  *      All Rights Reserved      
0007  *
0008  *
0009  *  This file is subject to the terms and conditions of the GNU General Public
0010  *  License. See the file COPYING in the main directory of this archive for
0011  *  more details.
0012  */
0013 #include <linux/kernel.h>
0014 
0015 #include "i810_regs.h"
0016 #include "i810.h"
0017 #include "i810_main.h"
0018 
0019 /*
0020  * FIFO and Watermark tables - based almost wholly on i810_wmark.c in 
0021  * XFree86 v4.03 by Precision Insight.  Slightly modified for integer 
0022  * operation, instead of float
0023  */
0024 
0025 struct wm_info {
0026    u32 freq;
0027    u32  wm;
0028 };
0029 
0030 static struct wm_info i810_wm_8_100[] = {
0031     { 15, 0x0070c000 },  { 19, 0x0070c000 },  { 25, 0x22003000 },
0032     { 28, 0x22003000 },  { 31, 0x22003000 },  { 36, 0x22007000 },
0033     { 40, 0x22007000 },  { 45, 0x22007000 },  { 49, 0x22008000 },
0034     { 50, 0x22008000 },  { 56, 0x22008000 },  { 65, 0x22008000 },
0035     { 75, 0x22008000 },  { 78, 0x22008000 },  { 80, 0x22008000 },
0036     { 94, 0x22008000 },  { 96, 0x22107000 },  { 99, 0x22107000 },
0037     { 108, 0x22107000 }, { 121, 0x22107000 }, { 128, 0x22107000 },
0038     { 132, 0x22109000 }, { 135, 0x22109000 }, { 157, 0x2210b000 },
0039     { 162, 0x2210b000 }, { 175, 0x2210b000 }, { 189, 0x2220e000 },
0040     { 195, 0x2220e000 }, { 202, 0x2220e000 }, { 204, 0x2220e000 },
0041     { 218, 0x2220f000 }, { 229, 0x22210000 }, { 234, 0x22210000 }, 
0042 };
0043 
0044 static struct wm_info i810_wm_16_100[] = {
0045     { 15, 0x0070c000 },  { 19, 0x0020c000 },  { 25, 0x22006000 },
0046     { 28, 0x22006000 },  { 31, 0x22007000 },  { 36, 0x22007000 },
0047     { 40, 0x22007000 },  { 45, 0x22007000 },  { 49, 0x22009000 },
0048     { 50, 0x22009000 },  { 56, 0x22108000 },  { 65, 0x2210e000 },
0049     { 75, 0x2210e000 },  { 78, 0x2210e000 },  { 80, 0x22210000 },
0050     { 94, 0x22210000 },  { 96, 0x22210000 },  { 99, 0x22210000 },
0051     { 108, 0x22210000 }, { 121, 0x22210000 }, { 128, 0x22210000 },
0052     { 132, 0x22314000 }, { 135, 0x22314000 }, { 157, 0x22415000 },
0053     { 162, 0x22416000 }, { 175, 0x22416000 }, { 189, 0x22416000 },
0054     { 195, 0x22416000 }, { 202, 0x22416000 }, { 204, 0x22416000 },
0055     { 218, 0x22416000 }, { 229, 0x22416000 },
0056 };
0057 
0058 static struct wm_info i810_wm_24_100[] = {
0059     { 15, 0x0020c000 },  { 19, 0x0040c000 },  { 25, 0x22009000 },
0060     { 28, 0x22009000 },  { 31, 0x2200a000 },  { 36, 0x2210c000 },
0061     { 40, 0x2210c000 },  { 45, 0x2210c000 },  { 49, 0x22111000 },
0062     { 50, 0x22111000 },  { 56, 0x22111000 },  { 65, 0x22214000 },
0063     { 75, 0x22214000 },  { 78, 0x22215000 },  { 80, 0x22216000 },
0064     { 94, 0x22218000 },  { 96, 0x22418000 },  { 99, 0x22418000 },
0065     { 108, 0x22418000 }, { 121, 0x22418000 }, { 128, 0x22419000 },
0066     { 132, 0x22519000 }, { 135, 0x4441d000 }, { 157, 0x44419000 },
0067     { 162, 0x44419000 }, { 175, 0x44419000 }, { 189, 0x44419000 },
0068     { 195, 0x44419000 }, { 202, 0x44419000 }, { 204, 0x44419000 },
0069 };
0070 
0071 static struct wm_info i810_wm_8_133[] = {
0072     { 15, 0x0070c000 },  { 19, 0x0070c000 },  { 25, 0x22003000 },
0073     { 28, 0x22003000 },  { 31, 0x22003000 },  { 36, 0x22007000 },
0074     { 40, 0x22007000 },  { 45, 0x22007000 },  { 49, 0x22008000 },
0075     { 50, 0x22008000 },  { 56, 0x22008000 },  { 65, 0x22008000 },
0076     { 75, 0x22008000 },  { 78, 0x22008000 },  { 80, 0x22008000 },
0077     { 94, 0x22008000 },  { 96, 0x22107000 },  { 99, 0x22107000 },
0078     { 108, 0x22107000 }, { 121, 0x22107000 }, { 128, 0x22107000 },
0079     { 132, 0x22109000 }, { 135, 0x22109000 }, { 157, 0x2210b000 },
0080     { 162, 0x2210b000 }, { 175, 0x2210b000 }, { 189, 0x2220e000 },
0081     { 195, 0x2220e000 }, { 202, 0x2220e000 }, { 204, 0x2220e000 },
0082     { 218, 0x2220f000 }, { 229, 0x22210000 }, { 234, 0x22210000 }, 
0083 };
0084 
0085 static struct wm_info i810_wm_16_133[] = {
0086     { 15, 0x0020c000 },  { 19, 0x0020c000 },  { 25, 0x22006000 },
0087     { 28, 0x22006000 },  { 31, 0x22007000 },  { 36, 0x22007000 },
0088     { 40, 0x22007000 },  { 45, 0x22007000 },  { 49, 0x22009000 },
0089     { 50, 0x22009000 },  { 56, 0x22108000 },  { 65, 0x2210e000 },
0090     { 75, 0x2210e000 },  { 78, 0x2210e000 },  { 80, 0x22210000 },
0091     { 94, 0x22210000 },  { 96, 0x22210000 },  { 99, 0x22210000 },
0092     { 108, 0x22210000 }, { 121, 0x22210000 }, { 128, 0x22210000 },
0093     { 132, 0x22314000 }, { 135, 0x22314000 }, { 157, 0x22415000 },
0094     { 162, 0x22416000 }, { 175, 0x22416000 }, { 189, 0x22416000 },
0095     { 195, 0x22416000 }, { 202, 0x22416000 }, { 204, 0x22416000 },
0096     { 218, 0x22416000 }, { 229, 0x22416000 },
0097 };
0098 
0099 static struct wm_info i810_wm_24_133[] = {
0100     { 15, 0x0020c000 },  { 19, 0x00408000 },  { 25, 0x22009000 },
0101     { 28, 0x22009000 },  { 31, 0x2200a000 },  { 36, 0x2210c000 },
0102     { 40, 0x2210c000 },  { 45, 0x2210c000 },  { 49, 0x22111000 },
0103     { 50, 0x22111000 },  { 56, 0x22111000 },  { 65, 0x22214000 },
0104     { 75, 0x22214000 },  { 78, 0x22215000 },  { 80, 0x22216000 },
0105     { 94, 0x22218000 },  { 96, 0x22418000 },  { 99, 0x22418000 },
0106     { 108, 0x22418000 }, { 121, 0x22418000 }, { 128, 0x22419000 },
0107     { 132, 0x22519000 }, { 135, 0x4441d000 }, { 157, 0x44419000 },
0108     { 162, 0x44419000 }, { 175, 0x44419000 }, { 189, 0x44419000 },
0109     { 195, 0x44419000 }, { 202, 0x44419000 }, { 204, 0x44419000 },
0110 };
0111 
0112 void round_off_xres(u32 *xres) { }
0113 void round_off_yres(u32 *xres, u32 *yres) { }
0114 
0115 /**
0116  * i810fb_encode_registers - encode @var to hardware register values
0117  * @var: pointer to var structure
0118  * @par: pointer to hardware par structure
0119  * 
0120  * DESCRIPTION: 
0121  * Timing values in @var will be converted to appropriate
0122  * register values of @par.  
0123  */
0124 void i810fb_encode_registers(const struct fb_var_screeninfo *var,
0125                  struct i810fb_par *par, u32 xres, u32 yres)
0126 {
0127     int n, blank_s, blank_e;
0128     u8 __iomem *mmio = par->mmio_start_virtual;
0129     u8 msr = 0;
0130 
0131     /* Horizontal */
0132     /* htotal */
0133     n = ((xres + var->right_margin + var->hsync_len + 
0134           var->left_margin) >> 3) - 5;
0135     par->regs.cr00 =  (u8) n;
0136     par->regs.cr35 = (u8) ((n >> 8) & 1);
0137     
0138     /* xres */
0139     par->regs.cr01 = (u8) ((xres >> 3) - 1);
0140 
0141     /* hblank */
0142     blank_e = (xres + var->right_margin + var->hsync_len + 
0143            var->left_margin) >> 3;
0144     blank_e--;
0145     blank_s = blank_e - 127;
0146     if (blank_s < (xres >> 3))
0147         blank_s = xres >> 3;
0148     par->regs.cr02 = (u8) blank_s;
0149     par->regs.cr03 = (u8) (blank_e & 0x1F);
0150     par->regs.cr05 = (u8) ((blank_e & (1 << 5)) << 2);
0151     par->regs.cr39 = (u8) ((blank_e >> 6) & 1);
0152 
0153     /* hsync */
0154     par->regs.cr04 = (u8) ((xres + var->right_margin) >> 3);
0155     par->regs.cr05 |= (u8) (((xres + var->right_margin + 
0156                   var->hsync_len) >> 3) & 0x1F);
0157     
0158         /* Vertical */
0159     /* vtotal */
0160     n = yres + var->lower_margin + var->vsync_len + var->upper_margin - 2;
0161     par->regs.cr06 = (u8) (n & 0xFF);
0162     par->regs.cr30 = (u8) ((n >> 8) & 0x0F);
0163 
0164     /* vsync */ 
0165     n = yres + var->lower_margin;
0166     par->regs.cr10 = (u8) (n & 0xFF);
0167     par->regs.cr32 = (u8) ((n >> 8) & 0x0F);
0168     par->regs.cr11 = i810_readb(CR11, mmio) & ~0x0F;
0169     par->regs.cr11 |= (u8) ((yres + var->lower_margin + 
0170                  var->vsync_len) & 0x0F);
0171 
0172     /* yres */
0173     n = yres - 1;
0174     par->regs.cr12 = (u8) (n & 0xFF);
0175     par->regs.cr31 = (u8) ((n >> 8) & 0x0F);
0176     
0177     /* vblank */
0178     blank_e = yres + var->lower_margin + var->vsync_len + 
0179         var->upper_margin;
0180     blank_e--;
0181     blank_s = blank_e - 127;
0182     if (blank_s < yres)
0183         blank_s = yres;
0184     par->regs.cr15 = (u8) (blank_s & 0xFF);
0185     par->regs.cr33 = (u8) ((blank_s >> 8) & 0x0F);
0186     par->regs.cr16 = (u8) (blank_e & 0xFF);
0187     par->regs.cr09 = 0; 
0188 
0189     /* sync polarity */
0190     if (!(var->sync & FB_SYNC_HOR_HIGH_ACT))
0191         msr |= 1 << 6;
0192     if (!(var->sync & FB_SYNC_VERT_HIGH_ACT))
0193         msr |= 1 << 7;
0194     par->regs.msr = msr;
0195 
0196     /* interlace */
0197     if (var->vmode & FB_VMODE_INTERLACED) 
0198         par->interlace = (1 << 7) | ((u8) (var->yres >> 4));
0199     else 
0200         par->interlace = 0;
0201 
0202     if (var->vmode & FB_VMODE_DOUBLE)
0203         par->regs.cr09 |= 1 << 7;
0204 
0205     /* overlay */
0206     par->ovract = ((var->xres + var->right_margin + var->hsync_len + 
0207             var->left_margin - 32) | ((var->xres - 32) << 16));
0208 }   
0209 
0210 void i810fb_fill_var_timings(struct fb_var_screeninfo *var) { }
0211 
0212 /**
0213  * i810_get_watermark - gets watermark
0214  * @var: pointer to fb_var_screeninfo
0215  * @par: pointer to i810fb_par structure
0216  *
0217  * DESCRIPTION:
0218  * Gets the required watermark based on 
0219  * pixelclock and RAMBUS frequency.
0220  * 
0221  * RETURNS:
0222  * watermark
0223  */
0224 u32 i810_get_watermark(const struct fb_var_screeninfo *var,
0225                struct i810fb_par *par)
0226 {
0227     struct wm_info *wmark = NULL;
0228     u32 i, size = 0, pixclock, wm_best = 0, min, diff;
0229 
0230     if (par->mem_freq == 100) {
0231         switch (var->bits_per_pixel) { 
0232         case 8:
0233             wmark = i810_wm_8_100;
0234             size = ARRAY_SIZE(i810_wm_8_100);
0235             break;
0236         case 16:
0237             wmark = i810_wm_16_100;
0238             size = ARRAY_SIZE(i810_wm_16_100);
0239             break;
0240         case 24:
0241         case 32:
0242             wmark = i810_wm_24_100;
0243             size = ARRAY_SIZE(i810_wm_24_100);
0244         }
0245     } else {
0246         switch(var->bits_per_pixel) {
0247         case 8:
0248             wmark = i810_wm_8_133;
0249             size = ARRAY_SIZE(i810_wm_8_133);
0250             break;
0251         case 16:
0252             wmark = i810_wm_16_133;
0253             size = ARRAY_SIZE(i810_wm_16_133);
0254             break;
0255         case 24:
0256         case 32:
0257             wmark = i810_wm_24_133;
0258             size = ARRAY_SIZE(i810_wm_24_133);
0259         }
0260     }
0261 
0262     pixclock = 1000000/var->pixclock;
0263     min = ~0;
0264     for (i = 0; i < size; i++) {
0265         if (pixclock <= wmark[i].freq) 
0266             diff = wmark[i].freq - pixclock;
0267         else 
0268             diff = pixclock - wmark[i].freq;
0269         if (diff < min) {
0270             wm_best = wmark[i].wm;
0271             min = diff;
0272         }
0273     }
0274     return wm_best;     
0275 }   
0276
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