video/fbdev/grvga.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Driver for Aeroflex Gaisler SVGACTRL framebuffer device.
0004  *
0005  * 2011 (c) Aeroflex Gaisler AB
0006  *
0007  * Full documentation of the core can be found here:
0008  * https://www.gaisler.com/products/grlib/grip.pdf
0009  *
0010  * Contributors: Kristoffer Glembo <kristoffer@gaisler.com>
0011  */
0012
0013 #include <linux/platform_device.h>
0014 #include <linux/dma-mapping.h>
0015 #include <linux/of_platform.h>
0016 #include <linux/of_device.h>
0017 #include <linux/module.h>
0018 #include <linux/kernel.h>
0019 #include <linux/string.h>
0020 #include <linux/delay.h>
0021 #include <linux/errno.h>
0022 #include <linux/init.h>
0023 #include <linux/slab.h>
0024 #include <linux/tty.h>
0025 #include <linux/mm.h>
0026 #include <linux/fb.h>
0027 #include <linux/io.h>
0028
0029 struct grvga_regs {
0030     u32 status;         /* 0x00 */
0031     u32 video_length;   /* 0x04 */
0032     u32 front_porch;    /* 0x08 */
0033     u32 sync_length;    /* 0x0C */
0034     u32 line_length;    /* 0x10 */
0035     u32 fb_pos;     /* 0x14 */
0036     u32 clk_vector[4];  /* 0x18 */
0037     u32 clut;           /* 0x20 */
0038 };
0039
0040 struct grvga_par {
0041     struct grvga_regs *regs;
0042     u32 color_palette[16];  /* 16 entry pseudo palette used by fbcon in true color mode */
0043     int clk_sel;
0044     int fb_alloced;         /* = 1 if framebuffer is allocated in main memory */
0045 };
0046
0047
0048 static const struct fb_videomode grvga_modedb[] = {
0049     {
0050     /* 640x480 @ 60 Hz */
0051     NULL, 60, 640, 480, 40000, 48, 16, 39, 11, 96, 2,
0052     0, FB_VMODE_NONINTERLACED
0053     }, {
0054     /* 800x600 @ 60 Hz */
0055     NULL, 60, 800, 600, 25000, 88, 40, 23, 1, 128, 4,
0056     0, FB_VMODE_NONINTERLACED
0057     }, {
0058     /* 800x600 @ 72 Hz */
0059     NULL, 72, 800, 600, 20000, 64, 56, 23, 37, 120, 6,
0060     0, FB_VMODE_NONINTERLACED
0061     }, {
0062     /* 1024x768 @ 60 Hz */
0063     NULL, 60, 1024, 768, 15385, 160, 24, 29, 3, 136, 6,
0064     0, FB_VMODE_NONINTERLACED
0065     }
0066  };
0067
0068 static const struct fb_fix_screeninfo grvga_fix = {
0069     .id =       "AG SVGACTRL",
0070     .type =     FB_TYPE_PACKED_PIXELS,
0071     .visual =       FB_VISUAL_PSEUDOCOLOR,
0072     .xpanstep = 0,
0073     .ypanstep = 1,
0074     .ywrapstep =    0,
0075     .accel =    FB_ACCEL_NONE,
0076 };
0077
0078 static int grvga_check_var(struct fb_var_screeninfo *var,
0079                struct fb_info *info)
0080 {
0081     struct grvga_par *par = info->par;
0082     int i;
0083
0084     if (!var->xres)
0085         var->xres = 1;
0086     if (!var->yres)
0087         var->yres = 1;
0088     if (var->bits_per_pixel <= 8)
0089         var->bits_per_pixel = 8;
0090     else if (var->bits_per_pixel <= 16)
0091         var->bits_per_pixel = 16;
0092     else if (var->bits_per_pixel <= 24)
0093         var->bits_per_pixel = 24;
0094     else if (var->bits_per_pixel <= 32)
0095         var->bits_per_pixel = 32;
0096     else
0097         return -EINVAL;
0098
0099     var->xres_virtual = var->xres;
0100     var->yres_virtual = 2*var->yres;
0101
0102     if (info->fix.smem_len) {
0103         if ((var->yres_virtual*var->xres_virtual*var->bits_per_pixel/8) > info->fix.smem_len)
0104             return -ENOMEM;
0105     }
0106
0107     /* Which clocks that are available can be read out in these registers */
0108     for (i = 0; i <= 3 ; i++) {
0109         if (var->pixclock == par->regs->clk_vector[i])
0110             break;
0111     }
0112     if (i <= 3)
0113         par->clk_sel = i;
0114     else
0115         return -EINVAL;
0116
0117     switch (info->var.bits_per_pixel) {
0118     case 8:
0119         var->red   = (struct fb_bitfield) {0, 8, 0};      /* offset, length, msb-right */
0120         var->green = (struct fb_bitfield) {0, 8, 0};
0121         var->blue  = (struct fb_bitfield) {0, 8, 0};
0122         var->transp = (struct fb_bitfield) {0, 0, 0};
0123         break;
0124     case 16:
0125         var->red   = (struct fb_bitfield) {11, 5, 0};
0126         var->green = (struct fb_bitfield) {5, 6, 0};
0127         var->blue  = (struct fb_bitfield) {0, 5, 0};
0128         var->transp = (struct fb_bitfield) {0, 0, 0};
0129         break;
0130     case 24:
0131     case 32:
0132         var->red   = (struct fb_bitfield) {16, 8, 0};
0133         var->green = (struct fb_bitfield) {8, 8, 0};
0134         var->blue  = (struct fb_bitfield) {0, 8, 0};
0135         var->transp = (struct fb_bitfield) {24, 8, 0};
0136         break;
0137     default:
0138         return -EINVAL;
0139     }
0140
0141     return 0;
0142 }
0143
0144 static int grvga_set_par(struct fb_info *info)
0145 {
0146
0147     u32 func = 0;
0148     struct grvga_par *par = info->par;
0149
0150     __raw_writel(((info->var.yres - 1) << 16) | (info->var.xres - 1),
0151              &par->regs->video_length);
0152
0153     __raw_writel((info->var.lower_margin << 16) | (info->var.right_margin),
0154              &par->regs->front_porch);
0155
0156     __raw_writel((info->var.vsync_len << 16) | (info->var.hsync_len),
0157              &par->regs->sync_length);
0158
0159     __raw_writel(((info->var.yres + info->var.lower_margin + info->var.upper_margin + info->var.vsync_len - 1) << 16) |
0160              (info->var.xres + info->var.right_margin + info->var.left_margin + info->var.hsync_len - 1),
0161              &par->regs->line_length);
0162
0163     switch (info->var.bits_per_pixel) {
0164     case 8:
0165         info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
0166         func = 1;
0167         break;
0168     case 16:
0169         info->fix.visual = FB_VISUAL_TRUECOLOR;
0170         func = 2;
0171         break;
0172     case 24:
0173     case 32:
0174         info->fix.visual = FB_VISUAL_TRUECOLOR;
0175         func = 3;
0176         break;
0177     default:
0178         return -EINVAL;
0179     }
0180
0181     __raw_writel((par->clk_sel << 6) | (func << 4) | 1,
0182              &par->regs->status);
0183
0184     info->fix.line_length = (info->var.xres_virtual*info->var.bits_per_pixel)/8;
0185     return 0;
0186 }
0187
0188 static int grvga_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue, unsigned transp, struct fb_info *info)
0189 {
0190     struct grvga_par *par;
0191     par = info->par;
0192
0193     if (regno >= 256)   /* Size of CLUT */
0194         return -EINVAL;
0195
0196     if (info->var.grayscale) {
0197         /* grayscale = 0.30*R + 0.59*G + 0.11*B */
0198         red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
0199     }
0200
0201
0202
0203 #define CNVT_TOHW(val, width) ((((val)<<(width))+0x7FFF-(val))>>16)
0204
0205     red    = CNVT_TOHW(red,   info->var.red.length);
0206     green  = CNVT_TOHW(green, info->var.green.length);
0207     blue   = CNVT_TOHW(blue,  info->var.blue.length);
0208     transp = CNVT_TOHW(transp, info->var.transp.length);
0209
0210 #undef CNVT_TOHW
0211
0212     /* In PSEUDOCOLOR we use the hardware CLUT */
0213     if (info->fix.visual == FB_VISUAL_PSEUDOCOLOR)
0214         __raw_writel((regno << 24) | (red << 16) | (green << 8) | blue,
0215                  &par->regs->clut);
0216
0217     /* Truecolor uses the pseudo palette */
0218     else if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
0219         u32 v;
0220         if (regno >= 16)
0221             return -EINVAL;
0222
0223
0224         v =     (red    << info->var.red.offset)   |
0225             (green  << info->var.green.offset) |
0226             (blue   << info->var.blue.offset)  |
0227             (transp << info->var.transp.offset);
0228
0229         ((u32 *) (info->pseudo_palette))[regno] = v;
0230     }
0231     return 0;
0232 }
0233
0234 static int grvga_pan_display(struct fb_var_screeninfo *var,
0235                  struct fb_info *info)
0236 {
0237     struct grvga_par *par = info->par;
0238     struct fb_fix_screeninfo *fix = &info->fix;
0239     u32 base_addr;
0240
0241     if (var->xoffset != 0)
0242         return -EINVAL;
0243
0244     base_addr = fix->smem_start + (var->yoffset * fix->line_length);
0245     base_addr &= ~3UL;
0246
0247     /* Set framebuffer base address  */
0248     __raw_writel(base_addr,
0249              &par->regs->fb_pos);
0250
0251     return 0;
0252 }
0253
0254 static const struct fb_ops grvga_ops = {
0255     .owner          = THIS_MODULE,
0256     .fb_check_var   = grvga_check_var,
0257     .fb_set_par = grvga_set_par,
0258     .fb_setcolreg   = grvga_setcolreg,
0259     .fb_pan_display = grvga_pan_display,
0260     .fb_fillrect    = cfb_fillrect,
0261     .fb_copyarea    = cfb_copyarea,
0262     .fb_imageblit   = cfb_imageblit
0263 };
0264
0265 static int grvga_parse_custom(char *options,
0266                   struct fb_var_screeninfo *screendata)
0267 {
0268     char *this_opt;
0269     int count = 0;
0270     if (!options || !*options)
0271         return -1;
0272
0273     while ((this_opt = strsep(&options, " ")) != NULL) {
0274         if (!*this_opt)
0275             continue;
0276
0277         switch (count) {
0278         case 0:
0279             screendata->pixclock = simple_strtoul(this_opt, NULL, 0);
0280             count++;
0281             break;
0282         case 1:
0283             screendata->xres = screendata->xres_virtual = simple_strtoul(this_opt, NULL, 0);
0284             count++;
0285             break;
0286         case 2:
0287             screendata->right_margin = simple_strtoul(this_opt, NULL, 0);
0288             count++;
0289             break;
0290         case 3:
0291             screendata->hsync_len = simple_strtoul(this_opt, NULL, 0);
0292             count++;
0293             break;
0294         case 4:
0295             screendata->left_margin = simple_strtoul(this_opt, NULL, 0);
0296             count++;
0297             break;
0298         case 5:
0299             screendata->yres = screendata->yres_virtual = simple_strtoul(this_opt, NULL, 0);
0300             count++;
0301             break;
0302         case 6:
0303             screendata->lower_margin = simple_strtoul(this_opt, NULL, 0);
0304             count++;
0305             break;
0306         case 7:
0307             screendata->vsync_len = simple_strtoul(this_opt, NULL, 0);
0308             count++;
0309             break;
0310         case 8:
0311             screendata->upper_margin = simple_strtoul(this_opt, NULL, 0);
0312             count++;
0313             break;
0314         case 9:
0315             screendata->bits_per_pixel = simple_strtoul(this_opt, NULL, 0);
0316             count++;
0317             break;
0318         default:
0319             return -1;
0320         }
0321     }
0322     screendata->activate  = FB_ACTIVATE_NOW;
0323     screendata->vmode     = FB_VMODE_NONINTERLACED;
0324     return 0;
0325 }
0326
0327 static int grvga_probe(struct platform_device *dev)
0328 {
0329     struct fb_info *info;
0330     int retval = -ENOMEM;
0331     unsigned long virtual_start;
0332     unsigned long grvga_fix_addr = 0;
0333     unsigned long physical_start = 0;
0334     unsigned long grvga_mem_size = 0;
0335     struct grvga_par *par = NULL;
0336     char *options = NULL, *mode_opt = NULL;
0337
0338     info = framebuffer_alloc(sizeof(struct grvga_par), &dev->dev);
0339     if (!info)
0340         return -ENOMEM;
0341
0342     /* Expecting: "grvga: modestring, [addr:<framebuffer physical address>], [size:<framebuffer size>]
0343      *
0344      * If modestring is custom:<custom mode string> we parse the string which then contains all videoparameters
0345      * If address is left out, we allocate memory,
0346      * if size is left out we only allocate enough to support the given mode.
0347      */
0348     if (fb_get_options("grvga", &options)) {
0349         retval = -ENODEV;
0350         goto free_fb;
0351     }
0352
0353     if (!options || !*options)
0354         options =  "640x480-8@60";
0355
0356     while (1) {
0357         char *this_opt = strsep(&options, ",");
0358
0359         if (!this_opt)
0360             break;
0361
0362         if (!strncmp(this_opt, "custom", 6)) {
0363             if (grvga_parse_custom(this_opt, &info->var) < 0) {
0364                 dev_err(&dev->dev, "Failed to parse custom mode (%s).\n", this_opt);
0365                 retval = -EINVAL;
0366                 goto free_fb;
0367             }
0368         } else if (!strncmp(this_opt, "addr", 4))
0369             grvga_fix_addr = simple_strtoul(this_opt + 5, NULL, 16);
0370         else if (!strncmp(this_opt, "size", 4))
0371             grvga_mem_size = simple_strtoul(this_opt + 5, NULL, 0);
0372         else
0373             mode_opt = this_opt;
0374     }
0375
0376     par = info->par;
0377     info->fbops = &grvga_ops;
0378     info->fix = grvga_fix;
0379     info->pseudo_palette = par->color_palette;
0380     info->flags = FBINFO_DEFAULT | FBINFO_PARTIAL_PAN_OK | FBINFO_HWACCEL_YPAN;
0381     info->fix.smem_len = grvga_mem_size;
0382
0383     if (!devm_request_mem_region(&dev->dev, dev->resource[0].start,
0384             resource_size(&dev->resource[0]), "grlib-svgactrl regs")) {
0385         dev_err(&dev->dev, "registers already mapped\n");
0386         retval = -EBUSY;
0387         goto free_fb;
0388     }
0389
0390     par->regs = of_ioremap(&dev->resource[0], 0,
0391                    resource_size(&dev->resource[0]),
0392                    "grlib-svgactrl regs");
0393
0394     if (!par->regs) {
0395         dev_err(&dev->dev, "failed to map registers\n");
0396         retval = -ENOMEM;
0397         goto free_fb;
0398     }
0399
0400     retval = fb_alloc_cmap(&info->cmap, 256, 0);
0401     if (retval < 0) {
0402         dev_err(&dev->dev, "failed to allocate mem with fb_alloc_cmap\n");
0403         retval = -ENOMEM;
0404         goto unmap_regs;
0405     }
0406
0407     if (mode_opt) {
0408         retval = fb_find_mode(&info->var, info, mode_opt,
0409                       grvga_modedb, sizeof(grvga_modedb), &grvga_modedb[0], 8);
0410         if (!retval || retval == 4) {
0411             retval = -EINVAL;
0412             goto dealloc_cmap;
0413         }
0414     }
0415
0416     if (!grvga_mem_size)
0417         grvga_mem_size = info->var.xres_virtual * info->var.yres_virtual * info->var.bits_per_pixel/8;
0418
0419     if (grvga_fix_addr) {
0420         /* Got framebuffer base address from argument list */
0421
0422         physical_start = grvga_fix_addr;
0423
0424         if (!devm_request_mem_region(&dev->dev, physical_start,
0425                          grvga_mem_size, dev->name)) {
0426             dev_err(&dev->dev, "failed to request memory region\n");
0427             retval = -ENOMEM;
0428             goto dealloc_cmap;
0429         }
0430
0431         virtual_start = (unsigned long) ioremap(physical_start, grvga_mem_size);
0432
0433         if (!virtual_start) {
0434             dev_err(&dev->dev, "error mapping framebuffer memory\n");
0435             retval = -ENOMEM;
0436             goto dealloc_cmap;
0437         }
0438     } else {    /* Allocate frambuffer memory */
0439
0440         unsigned long page;
0441
0442         virtual_start = (unsigned long) __get_free_pages(GFP_DMA,
0443                                  get_order(grvga_mem_size));
0444         if (!virtual_start) {
0445             dev_err(&dev->dev,
0446                 "unable to allocate framebuffer memory (%lu bytes)\n",
0447                 grvga_mem_size);
0448             retval = -ENOMEM;
0449             goto dealloc_cmap;
0450         }
0451
0452         physical_start = dma_map_single(&dev->dev, (void *)virtual_start, grvga_mem_size, DMA_TO_DEVICE);
0453
0454         /* Set page reserved so that mmap will work. This is necessary
0455          * since we'll be remapping normal memory.
0456          */
0457         for (page = virtual_start;
0458              page < PAGE_ALIGN(virtual_start + grvga_mem_size);
0459              page += PAGE_SIZE) {
0460             SetPageReserved(virt_to_page(page));
0461         }
0462
0463         par->fb_alloced = 1;
0464     }
0465
0466     memset((unsigned long *) virtual_start, 0, grvga_mem_size);
0467
0468     info->screen_base = (char __iomem *) virtual_start;
0469     info->fix.smem_start = physical_start;
0470     info->fix.smem_len   = grvga_mem_size;
0471
0472     dev_set_drvdata(&dev->dev, info);
0473
0474     dev_info(&dev->dev,
0475          "Aeroflex Gaisler framebuffer device (fb%d), %dx%d-%d, using %luK of video memory @ %p\n",
0476          info->node, info->var.xres, info->var.yres, info->var.bits_per_pixel,
0477          grvga_mem_size >> 10, info->screen_base);
0478
0479     retval = register_framebuffer(info);
0480     if (retval < 0) {
0481         dev_err(&dev->dev, "failed to register framebuffer\n");
0482         goto free_mem;
0483     }
0484
0485     __raw_writel(physical_start, &par->regs->fb_pos);
0486     __raw_writel(__raw_readl(&par->regs->status) | 1,  /* Enable framebuffer */
0487              &par->regs->status);
0488
0489     return 0;
0490
0491 free_mem:
0492     if (grvga_fix_addr)
0493         iounmap((void *)virtual_start);
0494     else
0495         kfree((void *)virtual_start);
0496 dealloc_cmap:
0497     fb_dealloc_cmap(&info->cmap);
0498 unmap_regs:
0499     of_iounmap(&dev->resource[0], par->regs,
0500            resource_size(&dev->resource[0]));
0501 free_fb:
0502     framebuffer_release(info);
0503
0504     return retval;
0505 }
0506
0507 static int grvga_remove(struct platform_device *device)
0508 {
0509     struct fb_info *info = dev_get_drvdata(&device->dev);
0510     struct grvga_par *par;
0511
0512     if (info) {
0513         par = info->par;
0514         unregister_framebuffer(info);
0515         fb_dealloc_cmap(&info->cmap);
0516
0517         of_iounmap(&device->resource[0], par->regs,
0518                resource_size(&device->resource[0]));
0519
0520         if (!par->fb_alloced)
0521             iounmap(info->screen_base);
0522         else
0523             kfree((void *)info->screen_base);
0524
0525         framebuffer_release(info);
0526     }
0527
0528     return 0;
0529 }
0530
0531 static struct of_device_id svgactrl_of_match[] = {
0532     {
0533         .name = "GAISLER_SVGACTRL",
0534     },
0535     {
0536         .name = "01_063",
0537     },
0538     {},
0539 };
0540 MODULE_DEVICE_TABLE(of, svgactrl_of_match);
0541
0542 static struct platform_driver grvga_driver = {
0543     .driver = {
0544         .name = "grlib-svgactrl",
0545         .of_match_table = svgactrl_of_match,
0546     },
0547     .probe      = grvga_probe,
0548     .remove     = grvga_remove,
0549 };
0550
0551 module_platform_driver(grvga_driver);
0552
0553 MODULE_LICENSE("GPL");
0554 MODULE_AUTHOR("Aeroflex Gaisler");
0555 MODULE_DESCRIPTION("Aeroflex Gaisler framebuffer device driver");