fbdev/aty/atyfb.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  *  ATI Frame Buffer Device Driver Core Definitions
0004  */
0005
0006 #include <linux/spinlock.h>
0007 #include <linux/wait.h>
0008     /*
0009      *  Elements of the hardware specific atyfb_par structure
0010      */
0011
0012 struct crtc {
0013     u32 vxres;
0014     u32 vyres;
0015     u32 xoffset;
0016     u32 yoffset;
0017     u32 bpp;
0018     u32 h_tot_disp;
0019     u32 h_sync_strt_wid;
0020     u32 v_tot_disp;
0021     u32 v_sync_strt_wid;
0022     u32 vline_crnt_vline;
0023     u32 off_pitch;
0024     u32 gen_cntl;
0025     u32 dp_pix_width;   /* acceleration */
0026     u32 dp_chain_mask;  /* acceleration */
0027 #ifdef CONFIG_FB_ATY_GENERIC_LCD
0028     u32 horz_stretching;
0029     u32 vert_stretching;
0030     u32 ext_vert_stretch;
0031     u32 shadow_h_tot_disp;
0032     u32 shadow_h_sync_strt_wid;
0033     u32 shadow_v_tot_disp;
0034     u32 shadow_v_sync_strt_wid;
0035     u32 lcd_gen_cntl;
0036     u32 lcd_config_panel;
0037     u32 lcd_index;
0038 #endif
0039 };
0040
0041 struct aty_interrupt {
0042     wait_queue_head_t wait;
0043     unsigned int count;
0044     int pan_display;
0045 };
0046
0047 struct pll_info {
0048     int pll_max;
0049     int pll_min;
0050     int sclk, mclk, mclk_pm, xclk;
0051     int ref_div;
0052     int ref_clk;
0053     int ecp_max;
0054 };
0055
0056 typedef struct {
0057     u16 unknown1;
0058     u16 PCLK_min_freq;
0059     u16 PCLK_max_freq;
0060     u16 unknown2;
0061     u16 ref_freq;
0062     u16 ref_divider;
0063     u16 unknown3;
0064     u16 MCLK_pwd;
0065     u16 MCLK_max_freq;
0066     u16 XCLK_max_freq;
0067     u16 SCLK_freq;
0068 } __attribute__ ((packed)) PLL_BLOCK_MACH64;
0069
0070 struct pll_514 {
0071     u8 m;
0072     u8 n;
0073 };
0074
0075 struct pll_18818 {
0076     u32 program_bits;
0077     u32 locationAddr;
0078     u32 period_in_ps;
0079     u32 post_divider;
0080 };
0081
0082 struct pll_ct {
0083     u8 pll_ref_div;
0084     u8 pll_gen_cntl;
0085     u8 mclk_fb_div;
0086     u8 mclk_fb_mult; /* 2 ro 4 */
0087     u8 sclk_fb_div;
0088     u8 pll_vclk_cntl;
0089     u8 vclk_post_div;
0090     u8 vclk_fb_div;
0091     u8 pll_ext_cntl;
0092     u8 ext_vpll_cntl;
0093     u8 spll_cntl2;
0094     u32 dsp_config; /* Mach64 GTB DSP */
0095     u32 dsp_on_off; /* Mach64 GTB DSP */
0096     u32 dsp_loop_latency;
0097     u32 fifo_size;
0098     u32 xclkpagefaultdelay;
0099     u32 xclkmaxrasdelay;
0100     u8 xclk_ref_div;
0101     u8 xclk_post_div;
0102     u8 mclk_post_div_real;
0103     u8 xclk_post_div_real;
0104     u8 vclk_post_div_real;
0105     u8 features;
0106 #ifdef CONFIG_FB_ATY_GENERIC_LCD
0107     u32 xres; /* use for LCD stretching/scaling */
0108 #endif
0109 };
0110
0111 /*
0112     for pll_ct.features
0113 */
0114 #define DONT_USE_SPLL 0x1
0115 #define DONT_USE_XDLL 0x2
0116 #define USE_CPUCLK    0x4
0117 #define POWERDOWN_PLL 0x8
0118
0119 union aty_pll {
0120     struct pll_ct ct;
0121     struct pll_514 ibm514;
0122     struct pll_18818 ics2595;
0123 };
0124
0125     /*
0126      *  The hardware parameters for each card
0127      */
0128
0129 struct atyfb_par {
0130     u32 pseudo_palette[16];
0131     struct { u8 red, green, blue; } palette[256];
0132     const struct aty_dac_ops *dac_ops;
0133     const struct aty_pll_ops *pll_ops;
0134     void __iomem *ati_regbase;
0135     unsigned long clk_wr_offset; /* meaning overloaded, clock id by CT */
0136     struct crtc crtc;
0137     union aty_pll pll;
0138     struct pll_info pll_limits;
0139     u32 features;
0140     u32 ref_clk_per;
0141     u32 pll_per;
0142     u32 mclk_per;
0143     u32 xclk_per;
0144     u8 bus_type;
0145     u8 ram_type;
0146     u8 mem_refresh_rate;
0147     u16 pci_id;
0148     u32 accel_flags;
0149     int blitter_may_be_busy;
0150     unsigned fifo_space;
0151     int asleep;
0152     int lock_blank;
0153     unsigned long res_start;
0154     unsigned long res_size;
0155     struct pci_dev *pdev;
0156 #ifdef __sparc__
0157     struct pci_mmap_map *mmap_map;
0158     u8 mmaped;
0159 #endif
0160     int open;
0161 #ifdef CONFIG_FB_ATY_GENERIC_LCD
0162     unsigned long bios_base_phys;
0163     unsigned long bios_base;
0164     unsigned long lcd_table;
0165     u16 lcd_width;
0166     u16 lcd_height;
0167     u32 lcd_pixclock;
0168     u16 lcd_refreshrate;
0169     u16 lcd_htotal;
0170     u16 lcd_hdisp;
0171     u16 lcd_hsync_dly;
0172     u16 lcd_hsync_len;
0173     u16 lcd_vtotal;
0174     u16 lcd_vdisp;
0175     u16 lcd_vsync_len;
0176     u16 lcd_right_margin;
0177     u16 lcd_lower_margin;
0178     u16 lcd_hblank_len;
0179     u16 lcd_vblank_len;
0180 #endif
0181     unsigned long aux_start; /* auxiliary aperture */
0182     unsigned long aux_size;
0183     struct aty_interrupt vblank;
0184     unsigned long irq_flags;
0185     unsigned int irq;
0186     spinlock_t int_lock;
0187     int wc_cookie;
0188     u32 mem_cntl;
0189     struct crtc saved_crtc;
0190     union aty_pll saved_pll;
0191 };
0192
0193     /*
0194      *  ATI Mach64 features
0195      */
0196
0197 #define M64_HAS(feature)    ((par)->features & (M64F_##feature))
0198
0199 #define M64F_RESET_3D       0x00000001
0200 #define M64F_MAGIC_FIFO     0x00000002
0201 #define M64F_GTB_DSP        0x00000004
0202 #define M64F_FIFO_32        0x00000008
0203 #define M64F_SDRAM_MAGIC_PLL    0x00000010
0204 #define M64F_MAGIC_POSTDIV  0x00000020
0205 #define M64F_INTEGRATED     0x00000040
0206 #define M64F_CT_BUS     0x00000080
0207 #define M64F_VT_BUS     0x00000100
0208 #define M64F_MOBIL_BUS      0x00000200
0209 #define M64F_GX         0x00000400
0210 #define M64F_CT         0x00000800
0211 #define M64F_VT         0x00001000
0212 #define M64F_GT         0x00002000
0213 #define M64F_MAGIC_VRAM_SIZE    0x00004000
0214 #define M64F_G3_PB_1_1      0x00008000
0215 #define M64F_G3_PB_1024x768 0x00010000
0216 #define M64F_EXTRA_BRIGHT   0x00020000
0217 #define M64F_LT_LCD_REGS    0x00040000
0218 #define M64F_XL_DLL     0x00080000
0219 #define M64F_MFB_FORCE_4    0x00100000
0220 #define M64F_HW_TRIPLE      0x00200000
0221 #define M64F_XL_MEM     0x00400000
0222     /*
0223      *  Register access
0224      */
0225
0226 static inline u32 aty_ld_le32(int regindex, const struct atyfb_par *par)
0227 {
0228     /* Hack for bloc 1, should be cleanly optimized by compiler */
0229     if (regindex >= 0x400)
0230         regindex -= 0x800;
0231
0232 #ifdef CONFIG_ATARI
0233     return in_le32(par->ati_regbase + regindex);
0234 #else
0235     return readl(par->ati_regbase + regindex);
0236 #endif
0237 }
0238
0239 static inline void aty_st_le32(int regindex, u32 val, const struct atyfb_par *par)
0240 {
0241     /* Hack for bloc 1, should be cleanly optimized by compiler */
0242     if (regindex >= 0x400)
0243         regindex -= 0x800;
0244
0245 #ifdef CONFIG_ATARI
0246     out_le32(par->ati_regbase + regindex, val);
0247 #else
0248     writel(val, par->ati_regbase + regindex);
0249 #endif
0250 }
0251
0252 static inline void aty_st_le16(int regindex, u16 val,
0253                    const struct atyfb_par *par)
0254 {
0255     /* Hack for bloc 1, should be cleanly optimized by compiler */
0256     if (regindex >= 0x400)
0257         regindex -= 0x800;
0258 #ifdef CONFIG_ATARI
0259     out_le16(par->ati_regbase + regindex, val);
0260 #else
0261     writel(val, par->ati_regbase + regindex);
0262 #endif
0263 }
0264
0265 static inline u8 aty_ld_8(int regindex, const struct atyfb_par *par)
0266 {
0267     /* Hack for bloc 1, should be cleanly optimized by compiler */
0268     if (regindex >= 0x400)
0269         regindex -= 0x800;
0270 #ifdef CONFIG_ATARI
0271     return in_8(par->ati_regbase + regindex);
0272 #else
0273     return readb(par->ati_regbase + regindex);
0274 #endif
0275 }
0276
0277 static inline void aty_st_8(int regindex, u8 val, const struct atyfb_par *par)
0278 {
0279     /* Hack for bloc 1, should be cleanly optimized by compiler */
0280     if (regindex >= 0x400)
0281         regindex -= 0x800;
0282
0283 #ifdef CONFIG_ATARI
0284     out_8(par->ati_regbase + regindex, val);
0285 #else
0286     writeb(val, par->ati_regbase + regindex);
0287 #endif
0288 }
0289
0290 extern void aty_st_lcd(int index, u32 val, const struct atyfb_par *par);
0291 extern u32 aty_ld_lcd(int index, const struct atyfb_par *par);
0292
0293     /*
0294      *  DAC operations
0295      */
0296
0297 struct aty_dac_ops {
0298     int (*set_dac) (const struct fb_info * info,
0299         const union aty_pll * pll, u32 bpp, u32 accel);
0300 };
0301
0302 extern const struct aty_dac_ops aty_dac_ibm514; /* IBM RGB514 */
0303 extern const struct aty_dac_ops aty_dac_ati68860b; /* ATI 68860-B */
0304 extern const struct aty_dac_ops aty_dac_att21c498; /* AT&T 21C498 */
0305 extern const struct aty_dac_ops aty_dac_unsupported; /* unsupported */
0306 extern const struct aty_dac_ops aty_dac_ct; /* Integrated */
0307
0308
0309     /*
0310      *  Clock operations
0311      */
0312
0313 struct aty_pll_ops {
0314     int (*var_to_pll) (const struct fb_info * info, u32 vclk_per, u32 bpp, union aty_pll * pll);
0315     u32 (*pll_to_var) (const struct fb_info * info, const union aty_pll * pll);
0316     void (*set_pll)   (const struct fb_info * info, const union aty_pll * pll);
0317     void (*get_pll)   (const struct fb_info *info, union aty_pll * pll);
0318     int (*init_pll)   (const struct fb_info * info, union aty_pll * pll);
0319     void (*resume_pll)(const struct fb_info *info, union aty_pll *pll);
0320 };
0321
0322 extern const struct aty_pll_ops aty_pll_ati18818_1; /* ATI 18818 */
0323 extern const struct aty_pll_ops aty_pll_stg1703; /* STG 1703 */
0324 extern const struct aty_pll_ops aty_pll_ch8398; /* Chrontel 8398 */
0325 extern const struct aty_pll_ops aty_pll_att20c408; /* AT&T 20C408 */
0326 extern const struct aty_pll_ops aty_pll_ibm514; /* IBM RGB514 */
0327 extern const struct aty_pll_ops aty_pll_unsupported; /* unsupported */
0328 extern const struct aty_pll_ops aty_pll_ct; /* Integrated */
0329
0330
0331 extern void aty_set_pll_ct(const struct fb_info *info, const union aty_pll *pll);
0332 extern u8 aty_ld_pll_ct(int offset, const struct atyfb_par *par);
0333
0334 extern const u8 aty_postdividers[8];
0335
0336
0337     /*
0338      *  Hardware cursor support
0339      */
0340
0341 extern int aty_init_cursor(struct fb_info *info, struct fb_ops *atyfb_ops);
0342
0343     /*
0344      *  Hardware acceleration
0345      */
0346
0347 static inline void wait_for_fifo(u16 entries, struct atyfb_par *par)
0348 {
0349     unsigned fifo_space = par->fifo_space;
0350     while (entries > fifo_space) {
0351         fifo_space = 16 - fls(aty_ld_le32(FIFO_STAT, par) & 0xffff);
0352     }
0353     par->fifo_space = fifo_space - entries;
0354 }
0355
0356 static inline void wait_for_idle(struct atyfb_par *par)
0357 {
0358     wait_for_fifo(16, par);
0359     while ((aty_ld_le32(GUI_STAT, par) & 1) != 0);
0360     par->blitter_may_be_busy = 0;
0361 }
0362
0363 extern void aty_reset_engine(struct atyfb_par *par);
0364 extern void aty_init_engine(struct atyfb_par *par, struct fb_info *info);
0365
0366 void atyfb_copyarea(struct fb_info *info, const struct fb_copyarea *area);
0367 void atyfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect);
0368 void atyfb_imageblit(struct fb_info *info, const struct fb_image *image);
0369