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0001 /*
0002  *  Driver for AT91 LCD Controller
0003  *
0004  *  Copyright (C) 2007 Atmel Corporation
0005  *
0006  * This file is subject to the terms and conditions of the GNU General Public
0007  * License.  See the file COPYING in the main directory of this archive for
0008  * more details.
0009  */
0010 
0011 #include <linux/kernel.h>
0012 #include <linux/platform_device.h>
0013 #include <linux/dma-mapping.h>
0014 #include <linux/interrupt.h>
0015 #include <linux/clk.h>
0016 #include <linux/fb.h>
0017 #include <linux/init.h>
0018 #include <linux/delay.h>
0019 #include <linux/backlight.h>
0020 #include <linux/gfp.h>
0021 #include <linux/gpio/consumer.h>
0022 #include <linux/module.h>
0023 #include <linux/of.h>
0024 #include <linux/of_device.h>
0025 #include <video/of_videomode.h>
0026 #include <video/of_display_timing.h>
0027 #include <linux/regulator/consumer.h>
0028 #include <video/videomode.h>
0029 
0030 #include <video/atmel_lcdc.h>
0031 
0032 struct atmel_lcdfb_config {
0033     bool have_alt_pixclock;
0034     bool have_hozval;
0035     bool have_intensity_bit;
0036 };
0037 
0038  /* LCD Controller info data structure, stored in device platform_data */
0039 struct atmel_lcdfb_info {
0040     spinlock_t      lock;
0041     struct fb_info      *info;
0042     void __iomem        *mmio;
0043     int         irq_base;
0044     struct work_struct  task;
0045 
0046     unsigned int        smem_len;
0047     struct platform_device  *pdev;
0048     struct clk      *bus_clk;
0049     struct clk      *lcdc_clk;
0050 
0051     struct backlight_device *backlight;
0052     u8          bl_power;
0053     u8          saved_lcdcon;
0054 
0055     u32         pseudo_palette[16];
0056     bool            have_intensity_bit;
0057 
0058     struct atmel_lcdfb_pdata pdata;
0059 
0060     struct atmel_lcdfb_config *config;
0061     struct regulator    *reg_lcd;
0062 };
0063 
0064 struct atmel_lcdfb_power_ctrl_gpio {
0065     struct gpio_desc *gpiod;
0066 
0067     struct list_head list;
0068 };
0069 
0070 #define lcdc_readl(sinfo, reg)      __raw_readl((sinfo)->mmio+(reg))
0071 #define lcdc_writel(sinfo, reg, val)    __raw_writel((val), (sinfo)->mmio+(reg))
0072 
0073 /* configurable parameters */
0074 #define ATMEL_LCDC_CVAL_DEFAULT     0xc8
0075 #define ATMEL_LCDC_DMA_BURST_LEN    8   /* words */
0076 #define ATMEL_LCDC_FIFO_SIZE        512 /* words */
0077 
0078 static struct atmel_lcdfb_config at91sam9261_config = {
0079     .have_hozval        = true,
0080     .have_intensity_bit = true,
0081 };
0082 
0083 static struct atmel_lcdfb_config at91sam9263_config = {
0084     .have_intensity_bit = true,
0085 };
0086 
0087 static struct atmel_lcdfb_config at91sam9g10_config = {
0088     .have_hozval        = true,
0089 };
0090 
0091 static struct atmel_lcdfb_config at91sam9g45_config = {
0092     .have_alt_pixclock  = true,
0093 };
0094 
0095 static struct atmel_lcdfb_config at91sam9g45es_config = {
0096 };
0097 
0098 static struct atmel_lcdfb_config at91sam9rl_config = {
0099     .have_intensity_bit = true,
0100 };
0101 
0102 static u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
0103         | ATMEL_LCDC_POL_POSITIVE
0104         | ATMEL_LCDC_ENA_PWMENABLE;
0105 
0106 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
0107 
0108 /* some bl->props field just changed */
0109 static int atmel_bl_update_status(struct backlight_device *bl)
0110 {
0111     struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
0112     int         power = sinfo->bl_power;
0113     int         brightness = bl->props.brightness;
0114 
0115     /* REVISIT there may be a meaningful difference between
0116      * fb_blank and power ... there seem to be some cases
0117      * this doesn't handle correctly.
0118      */
0119     if (bl->props.fb_blank != sinfo->bl_power)
0120         power = bl->props.fb_blank;
0121     else if (bl->props.power != sinfo->bl_power)
0122         power = bl->props.power;
0123 
0124     if (brightness < 0 && power == FB_BLANK_UNBLANK)
0125         brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
0126     else if (power != FB_BLANK_UNBLANK)
0127         brightness = 0;
0128 
0129     lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
0130     if (contrast_ctr & ATMEL_LCDC_POL_POSITIVE)
0131         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
0132             brightness ? contrast_ctr : 0);
0133     else
0134         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
0135 
0136     bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
0137 
0138     return 0;
0139 }
0140 
0141 static int atmel_bl_get_brightness(struct backlight_device *bl)
0142 {
0143     struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
0144 
0145     return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
0146 }
0147 
0148 static const struct backlight_ops atmel_lcdc_bl_ops = {
0149     .update_status = atmel_bl_update_status,
0150     .get_brightness = atmel_bl_get_brightness,
0151 };
0152 
0153 static void init_backlight(struct atmel_lcdfb_info *sinfo)
0154 {
0155     struct backlight_properties props;
0156     struct backlight_device *bl;
0157 
0158     sinfo->bl_power = FB_BLANK_UNBLANK;
0159 
0160     if (sinfo->backlight)
0161         return;
0162 
0163     memset(&props, 0, sizeof(struct backlight_properties));
0164     props.type = BACKLIGHT_RAW;
0165     props.max_brightness = 0xff;
0166     bl = backlight_device_register("backlight", &sinfo->pdev->dev, sinfo,
0167                        &atmel_lcdc_bl_ops, &props);
0168     if (IS_ERR(bl)) {
0169         dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
0170                 PTR_ERR(bl));
0171         return;
0172     }
0173     sinfo->backlight = bl;
0174 
0175     bl->props.power = FB_BLANK_UNBLANK;
0176     bl->props.fb_blank = FB_BLANK_UNBLANK;
0177     bl->props.brightness = atmel_bl_get_brightness(bl);
0178 }
0179 
0180 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
0181 {
0182     if (!sinfo->backlight)
0183         return;
0184 
0185     if (sinfo->backlight->ops) {
0186         sinfo->backlight->props.power = FB_BLANK_POWERDOWN;
0187         sinfo->backlight->ops->update_status(sinfo->backlight);
0188     }
0189     backlight_device_unregister(sinfo->backlight);
0190 }
0191 
0192 #else
0193 
0194 static void init_backlight(struct atmel_lcdfb_info *sinfo)
0195 {
0196     dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
0197 }
0198 
0199 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
0200 {
0201 }
0202 
0203 #endif
0204 
0205 static void init_contrast(struct atmel_lcdfb_info *sinfo)
0206 {
0207     struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
0208 
0209     /* contrast pwm can be 'inverted' */
0210     if (pdata->lcdcon_pol_negative)
0211         contrast_ctr &= ~(ATMEL_LCDC_POL_POSITIVE);
0212 
0213     /* have some default contrast/backlight settings */
0214     lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
0215     lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
0216 
0217     if (pdata->lcdcon_is_backlight)
0218         init_backlight(sinfo);
0219 }
0220 
0221 static inline void atmel_lcdfb_power_control(struct atmel_lcdfb_info *sinfo, int on)
0222 {
0223     int ret;
0224     struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
0225 
0226     if (pdata->atmel_lcdfb_power_control)
0227         pdata->atmel_lcdfb_power_control(pdata, on);
0228     else if (sinfo->reg_lcd) {
0229         if (on) {
0230             ret = regulator_enable(sinfo->reg_lcd);
0231             if (ret)
0232                 dev_err(&sinfo->pdev->dev,
0233                     "lcd regulator enable failed:   %d\n", ret);
0234         } else {
0235             ret = regulator_disable(sinfo->reg_lcd);
0236             if (ret)
0237                 dev_err(&sinfo->pdev->dev,
0238                     "lcd regulator disable failed: %d\n", ret);
0239         }
0240     }
0241 }
0242 
0243 static const struct fb_fix_screeninfo atmel_lcdfb_fix __initconst = {
0244     .type       = FB_TYPE_PACKED_PIXELS,
0245     .visual     = FB_VISUAL_TRUECOLOR,
0246     .xpanstep   = 0,
0247     .ypanstep   = 1,
0248     .ywrapstep  = 0,
0249     .accel      = FB_ACCEL_NONE,
0250 };
0251 
0252 static unsigned long compute_hozval(struct atmel_lcdfb_info *sinfo,
0253                             unsigned long xres)
0254 {
0255     unsigned long lcdcon2;
0256     unsigned long value;
0257 
0258     if (!sinfo->config->have_hozval)
0259         return xres;
0260 
0261     lcdcon2 = lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2);
0262     value = xres;
0263     if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
0264         /* STN display */
0265         if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
0266             value *= 3;
0267         }
0268         if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
0269            || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
0270               && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
0271             value = DIV_ROUND_UP(value, 4);
0272         else
0273             value = DIV_ROUND_UP(value, 8);
0274     }
0275 
0276     return value;
0277 }
0278 
0279 static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)
0280 {
0281     struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
0282 
0283     /* Turn off the LCD controller and the DMA controller */
0284     lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
0285             pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
0286 
0287     /* Wait for the LCDC core to become idle */
0288     while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
0289         msleep(10);
0290 
0291     lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
0292 }
0293 
0294 static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)
0295 {
0296     atmel_lcdfb_stop_nowait(sinfo);
0297 
0298     /* Wait for DMA engine to become idle... */
0299     while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
0300         msleep(10);
0301 }
0302 
0303 static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)
0304 {
0305     struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
0306 
0307     lcdc_writel(sinfo, ATMEL_LCDC_DMACON, pdata->default_dmacon);
0308     lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
0309         (pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET)
0310         | ATMEL_LCDC_PWR);
0311 }
0312 
0313 static void atmel_lcdfb_update_dma(struct fb_info *info,
0314                    struct fb_var_screeninfo *var)
0315 {
0316     struct atmel_lcdfb_info *sinfo = info->par;
0317     struct fb_fix_screeninfo *fix = &info->fix;
0318     unsigned long dma_addr;
0319 
0320     dma_addr = (fix->smem_start + var->yoffset * fix->line_length
0321             + var->xoffset * info->var.bits_per_pixel / 8);
0322 
0323     dma_addr &= ~3UL;
0324 
0325     /* Set framebuffer DMA base address and pixel offset */
0326     lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
0327 }
0328 
0329 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
0330 {
0331     struct fb_info *info = sinfo->info;
0332 
0333     dma_free_wc(info->device, info->fix.smem_len, info->screen_base,
0334             info->fix.smem_start);
0335 }
0336 
0337 /**
0338  *  atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
0339  *  @sinfo: the frame buffer to allocate memory for
0340  *  
0341  *  This function is called only from the atmel_lcdfb_probe()
0342  *  so no locking by fb_info->mm_lock around smem_len setting is needed.
0343  */
0344 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
0345 {
0346     struct fb_info *info = sinfo->info;
0347     struct fb_var_screeninfo *var = &info->var;
0348     unsigned int smem_len;
0349 
0350     smem_len = (var->xres_virtual * var->yres_virtual
0351             * ((var->bits_per_pixel + 7) / 8));
0352     info->fix.smem_len = max(smem_len, sinfo->smem_len);
0353 
0354     info->screen_base = dma_alloc_wc(info->device, info->fix.smem_len,
0355                      (dma_addr_t *)&info->fix.smem_start,
0356                      GFP_KERNEL);
0357 
0358     if (!info->screen_base) {
0359         return -ENOMEM;
0360     }
0361 
0362     memset(info->screen_base, 0, info->fix.smem_len);
0363 
0364     return 0;
0365 }
0366 
0367 static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
0368                              struct fb_info *info)
0369 {
0370     struct fb_videomode varfbmode;
0371     const struct fb_videomode *fbmode = NULL;
0372 
0373     fb_var_to_videomode(&varfbmode, var);
0374     fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
0375     if (fbmode)
0376         fb_videomode_to_var(var, fbmode);
0377     return fbmode;
0378 }
0379 
0380 
0381 /**
0382  *      atmel_lcdfb_check_var - Validates a var passed in.
0383  *      @var: frame buffer variable screen structure
0384  *      @info: frame buffer structure that represents a single frame buffer
0385  *
0386  *  Checks to see if the hardware supports the state requested by
0387  *  var passed in. This function does not alter the hardware
0388  *  state!!!  This means the data stored in struct fb_info and
0389  *  struct atmel_lcdfb_info do not change. This includes the var
0390  *  inside of struct fb_info.  Do NOT change these. This function
0391  *  can be called on its own if we intent to only test a mode and
0392  *  not actually set it. The stuff in modedb.c is a example of
0393  *  this. If the var passed in is slightly off by what the
0394  *  hardware can support then we alter the var PASSED in to what
0395  *  we can do. If the hardware doesn't support mode change a
0396  *  -EINVAL will be returned by the upper layers. You don't need
0397  *  to implement this function then. If you hardware doesn't
0398  *  support changing the resolution then this function is not
0399  *  needed. In this case the driver would just provide a var that
0400  *  represents the static state the screen is in.
0401  *
0402  *  Returns negative errno on error, or zero on success.
0403  */
0404 static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
0405                  struct fb_info *info)
0406 {
0407     struct device *dev = info->device;
0408     struct atmel_lcdfb_info *sinfo = info->par;
0409     struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
0410     unsigned long clk_value_khz;
0411 
0412     clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
0413 
0414     dev_dbg(dev, "%s:\n", __func__);
0415 
0416     if (!(var->pixclock && var->bits_per_pixel)) {
0417         /* choose a suitable mode if possible */
0418         if (!atmel_lcdfb_choose_mode(var, info)) {
0419             dev_err(dev, "needed value not specified\n");
0420             return -EINVAL;
0421         }
0422     }
0423 
0424     dev_dbg(dev, "  resolution: %ux%u\n", var->xres, var->yres);
0425     dev_dbg(dev, "  pixclk:     %lu KHz\n", PICOS2KHZ(var->pixclock));
0426     dev_dbg(dev, "  bpp:        %u\n", var->bits_per_pixel);
0427     dev_dbg(dev, "  clk:        %lu KHz\n", clk_value_khz);
0428 
0429     if (PICOS2KHZ(var->pixclock) > clk_value_khz) {
0430         dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
0431         return -EINVAL;
0432     }
0433 
0434     /* Do not allow to have real resoulution larger than virtual */
0435     if (var->xres > var->xres_virtual)
0436         var->xres_virtual = var->xres;
0437 
0438     if (var->yres > var->yres_virtual)
0439         var->yres_virtual = var->yres;
0440 
0441     /* Force same alignment for each line */
0442     var->xres = (var->xres + 3) & ~3UL;
0443     var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
0444 
0445     var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
0446     var->transp.msb_right = 0;
0447     var->transp.offset = var->transp.length = 0;
0448     var->xoffset = var->yoffset = 0;
0449 
0450     if (info->fix.smem_len) {
0451         unsigned int smem_len = (var->xres_virtual * var->yres_virtual
0452                      * ((var->bits_per_pixel + 7) / 8));
0453         if (smem_len > info->fix.smem_len) {
0454             dev_err(dev, "Frame buffer is too small (%u) for screen size (need at least %u)\n",
0455                 info->fix.smem_len, smem_len);
0456             return -EINVAL;
0457         }
0458     }
0459 
0460     /* Saturate vertical and horizontal timings at maximum values */
0461     var->vsync_len = min_t(u32, var->vsync_len,
0462             (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
0463     var->upper_margin = min_t(u32, var->upper_margin,
0464             ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
0465     var->lower_margin = min_t(u32, var->lower_margin,
0466             ATMEL_LCDC_VFP);
0467     var->right_margin = min_t(u32, var->right_margin,
0468             (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
0469     var->hsync_len = min_t(u32, var->hsync_len,
0470             (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
0471     var->left_margin = min_t(u32, var->left_margin,
0472             ATMEL_LCDC_HBP + 1);
0473 
0474     /* Some parameters can't be zero */
0475     var->vsync_len = max_t(u32, var->vsync_len, 1);
0476     var->right_margin = max_t(u32, var->right_margin, 1);
0477     var->hsync_len = max_t(u32, var->hsync_len, 1);
0478     var->left_margin = max_t(u32, var->left_margin, 1);
0479 
0480     switch (var->bits_per_pixel) {
0481     case 1:
0482     case 2:
0483     case 4:
0484     case 8:
0485         var->red.offset = var->green.offset = var->blue.offset = 0;
0486         var->red.length = var->green.length = var->blue.length
0487             = var->bits_per_pixel;
0488         break;
0489     case 16:
0490         /* Older SOCs use IBGR:555 rather than BGR:565. */
0491         if (sinfo->config->have_intensity_bit)
0492             var->green.length = 5;
0493         else
0494             var->green.length = 6;
0495 
0496         if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
0497             /* RGB:5X5 mode */
0498             var->red.offset = var->green.length + 5;
0499             var->blue.offset = 0;
0500         } else {
0501             /* BGR:5X5 mode */
0502             var->red.offset = 0;
0503             var->blue.offset = var->green.length + 5;
0504         }
0505         var->green.offset = 5;
0506         var->red.length = var->blue.length = 5;
0507         break;
0508     case 32:
0509         var->transp.offset = 24;
0510         var->transp.length = 8;
0511         fallthrough;
0512     case 24:
0513         if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
0514             /* RGB:888 mode */
0515             var->red.offset = 16;
0516             var->blue.offset = 0;
0517         } else {
0518             /* BGR:888 mode */
0519             var->red.offset = 0;
0520             var->blue.offset = 16;
0521         }
0522         var->green.offset = 8;
0523         var->red.length = var->green.length = var->blue.length = 8;
0524         break;
0525     default:
0526         dev_err(dev, "color depth %d not supported\n",
0527                     var->bits_per_pixel);
0528         return -EINVAL;
0529     }
0530 
0531     return 0;
0532 }
0533 
0534 /*
0535  * LCD reset sequence
0536  */
0537 static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
0538 {
0539     might_sleep();
0540 
0541     atmel_lcdfb_stop(sinfo);
0542     atmel_lcdfb_start(sinfo);
0543 }
0544 
0545 /**
0546  *      atmel_lcdfb_set_par - Alters the hardware state.
0547  *      @info: frame buffer structure that represents a single frame buffer
0548  *
0549  *  Using the fb_var_screeninfo in fb_info we set the resolution
0550  *  of the this particular framebuffer. This function alters the
0551  *  par AND the fb_fix_screeninfo stored in fb_info. It doesn't
0552  *  not alter var in fb_info since we are using that data. This
0553  *  means we depend on the data in var inside fb_info to be
0554  *  supported by the hardware.  atmel_lcdfb_check_var is always called
0555  *  before atmel_lcdfb_set_par to ensure this.  Again if you can't
0556  *  change the resolution you don't need this function.
0557  *
0558  */
0559 static int atmel_lcdfb_set_par(struct fb_info *info)
0560 {
0561     struct atmel_lcdfb_info *sinfo = info->par;
0562     struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
0563     unsigned long hozval_linesz;
0564     unsigned long value;
0565     unsigned long clk_value_khz;
0566     unsigned long bits_per_line;
0567     unsigned long pix_factor = 2;
0568 
0569     might_sleep();
0570 
0571     dev_dbg(info->device, "%s:\n", __func__);
0572     dev_dbg(info->device, "  * resolution: %ux%u (%ux%u virtual)\n",
0573          info->var.xres, info->var.yres,
0574          info->var.xres_virtual, info->var.yres_virtual);
0575 
0576     atmel_lcdfb_stop_nowait(sinfo);
0577 
0578     if (info->var.bits_per_pixel == 1)
0579         info->fix.visual = FB_VISUAL_MONO01;
0580     else if (info->var.bits_per_pixel <= 8)
0581         info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
0582     else
0583         info->fix.visual = FB_VISUAL_TRUECOLOR;
0584 
0585     bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
0586     info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
0587 
0588     /* Re-initialize the DMA engine... */
0589     dev_dbg(info->device, "  * update DMA engine\n");
0590     atmel_lcdfb_update_dma(info, &info->var);
0591 
0592     /* ...set frame size and burst length = 8 words (?) */
0593     value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
0594     value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
0595     lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
0596 
0597     /* Now, the LCDC core... */
0598 
0599     /* Set pixel clock */
0600     if (sinfo->config->have_alt_pixclock)
0601         pix_factor = 1;
0602 
0603     clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
0604 
0605     value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
0606 
0607     if (value < pix_factor) {
0608         dev_notice(info->device, "Bypassing pixel clock divider\n");
0609         lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
0610     } else {
0611         value = (value / pix_factor) - 1;
0612         dev_dbg(info->device, "  * programming CLKVAL = 0x%08lx\n",
0613                 value);
0614         lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
0615                 value << ATMEL_LCDC_CLKVAL_OFFSET);
0616         info->var.pixclock =
0617             KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1)));
0618         dev_dbg(info->device, "  updated pixclk:     %lu KHz\n",
0619                     PICOS2KHZ(info->var.pixclock));
0620     }
0621 
0622 
0623     /* Initialize control register 2 */
0624     value = pdata->default_lcdcon2;
0625 
0626     if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
0627         value |= ATMEL_LCDC_INVLINE_INVERTED;
0628     if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
0629         value |= ATMEL_LCDC_INVFRAME_INVERTED;
0630 
0631     switch (info->var.bits_per_pixel) {
0632         case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
0633         case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
0634         case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
0635         case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
0636         case 15: fallthrough;
0637         case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
0638         case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
0639         case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
0640         default: BUG(); break;
0641     }
0642     dev_dbg(info->device, "  * LCDCON2 = %08lx\n", value);
0643     lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
0644 
0645     /* Vertical timing */
0646     value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
0647     value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
0648     value |= info->var.lower_margin;
0649     dev_dbg(info->device, "  * LCDTIM1 = %08lx\n", value);
0650     lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
0651 
0652     /* Horizontal timing */
0653     value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
0654     value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
0655     value |= (info->var.left_margin - 1);
0656     dev_dbg(info->device, "  * LCDTIM2 = %08lx\n", value);
0657     lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
0658 
0659     /* Horizontal value (aka line size) */
0660     hozval_linesz = compute_hozval(sinfo, info->var.xres);
0661 
0662     /* Display size */
0663     value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
0664     value |= info->var.yres - 1;
0665     dev_dbg(info->device, "  * LCDFRMCFG = %08lx\n", value);
0666     lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
0667 
0668     /* FIFO Threshold: Use formula from data sheet */
0669     value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
0670     lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
0671 
0672     /* Toggle LCD_MODE every frame */
0673     lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
0674 
0675     /* Disable all interrupts */
0676     lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0U);
0677     /* Enable FIFO & DMA errors */
0678     lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
0679 
0680     /* ...wait for DMA engine to become idle... */
0681     while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
0682         msleep(10);
0683 
0684     atmel_lcdfb_start(sinfo);
0685 
0686     dev_dbg(info->device, "  * DONE\n");
0687 
0688     return 0;
0689 }
0690 
0691 static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
0692 {
0693     chan &= 0xffff;
0694     chan >>= 16 - bf->length;
0695     return chan << bf->offset;
0696 }
0697 
0698 /**
0699  *      atmel_lcdfb_setcolreg - Optional function. Sets a color register.
0700  *      @regno: Which register in the CLUT we are programming
0701  *      @red: The red value which can be up to 16 bits wide
0702  *  @green: The green value which can be up to 16 bits wide
0703  *  @blue:  The blue value which can be up to 16 bits wide.
0704  *  @transp: If supported the alpha value which can be up to 16 bits wide.
0705  *      @info: frame buffer info structure
0706  *
0707  *      Set a single color register. The values supplied have a 16 bit
0708  *      magnitude which needs to be scaled in this function for the hardware.
0709  *  Things to take into consideration are how many color registers, if
0710  *  any, are supported with the current color visual. With truecolor mode
0711  *  no color palettes are supported. Here a pseudo palette is created
0712  *  which we store the value in pseudo_palette in struct fb_info. For
0713  *  pseudocolor mode we have a limited color palette. To deal with this
0714  *  we can program what color is displayed for a particular pixel value.
0715  *  DirectColor is similar in that we can program each color field. If
0716  *  we have a static colormap we don't need to implement this function.
0717  *
0718  *  Returns negative errno on error, or zero on success. In an
0719  *  ideal world, this would have been the case, but as it turns
0720  *  out, the other drivers return 1 on failure, so that's what
0721  *  we're going to do.
0722  */
0723 static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
0724                  unsigned int green, unsigned int blue,
0725                  unsigned int transp, struct fb_info *info)
0726 {
0727     struct atmel_lcdfb_info *sinfo = info->par;
0728     struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
0729     unsigned int val;
0730     u32 *pal;
0731     int ret = 1;
0732 
0733     if (info->var.grayscale)
0734         red = green = blue = (19595 * red + 38470 * green
0735                       + 7471 * blue) >> 16;
0736 
0737     switch (info->fix.visual) {
0738     case FB_VISUAL_TRUECOLOR:
0739         if (regno < 16) {
0740             pal = info->pseudo_palette;
0741 
0742             val  = chan_to_field(red, &info->var.red);
0743             val |= chan_to_field(green, &info->var.green);
0744             val |= chan_to_field(blue, &info->var.blue);
0745 
0746             pal[regno] = val;
0747             ret = 0;
0748         }
0749         break;
0750 
0751     case FB_VISUAL_PSEUDOCOLOR:
0752         if (regno < 256) {
0753             if (sinfo->config->have_intensity_bit) {
0754                 /* old style I+BGR:555 */
0755                 val  = ((red   >> 11) & 0x001f);
0756                 val |= ((green >>  6) & 0x03e0);
0757                 val |= ((blue  >>  1) & 0x7c00);
0758 
0759                 /*
0760                  * TODO: intensity bit. Maybe something like
0761                  *   ~(red[10] ^ green[10] ^ blue[10]) & 1
0762                  */
0763             } else {
0764                 /* new style BGR:565 / RGB:565 */
0765                 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
0766                     val  = ((blue >> 11) & 0x001f);
0767                     val |= ((red  >>  0) & 0xf800);
0768                 } else {
0769                     val  = ((red  >> 11) & 0x001f);
0770                     val |= ((blue >>  0) & 0xf800);
0771                 }
0772 
0773                 val |= ((green >>  5) & 0x07e0);
0774             }
0775 
0776             lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
0777             ret = 0;
0778         }
0779         break;
0780 
0781     case FB_VISUAL_MONO01:
0782         if (regno < 2) {
0783             val = (regno == 0) ? 0x00 : 0x1F;
0784             lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
0785             ret = 0;
0786         }
0787         break;
0788 
0789     }
0790 
0791     return ret;
0792 }
0793 
0794 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
0795                    struct fb_info *info)
0796 {
0797     dev_dbg(info->device, "%s\n", __func__);
0798 
0799     atmel_lcdfb_update_dma(info, var);
0800 
0801     return 0;
0802 }
0803 
0804 static int atmel_lcdfb_blank(int blank_mode, struct fb_info *info)
0805 {
0806     struct atmel_lcdfb_info *sinfo = info->par;
0807 
0808     switch (blank_mode) {
0809     case FB_BLANK_UNBLANK:
0810     case FB_BLANK_NORMAL:
0811         atmel_lcdfb_start(sinfo);
0812         break;
0813     case FB_BLANK_VSYNC_SUSPEND:
0814     case FB_BLANK_HSYNC_SUSPEND:
0815         break;
0816     case FB_BLANK_POWERDOWN:
0817         atmel_lcdfb_stop(sinfo);
0818         break;
0819     default:
0820         return -EINVAL;
0821     }
0822 
0823     /* let fbcon do a soft blank for us */
0824     return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0);
0825 }
0826 
0827 static const struct fb_ops atmel_lcdfb_ops = {
0828     .owner      = THIS_MODULE,
0829     .fb_check_var   = atmel_lcdfb_check_var,
0830     .fb_set_par = atmel_lcdfb_set_par,
0831     .fb_setcolreg   = atmel_lcdfb_setcolreg,
0832     .fb_blank   = atmel_lcdfb_blank,
0833     .fb_pan_display = atmel_lcdfb_pan_display,
0834     .fb_fillrect    = cfb_fillrect,
0835     .fb_copyarea    = cfb_copyarea,
0836     .fb_imageblit   = cfb_imageblit,
0837 };
0838 
0839 static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
0840 {
0841     struct fb_info *info = dev_id;
0842     struct atmel_lcdfb_info *sinfo = info->par;
0843     u32 status;
0844 
0845     status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
0846     if (status & ATMEL_LCDC_UFLWI) {
0847         dev_warn(info->device, "FIFO underflow %#x\n", status);
0848         /* reset DMA and FIFO to avoid screen shifting */
0849         schedule_work(&sinfo->task);
0850     }
0851     lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
0852     return IRQ_HANDLED;
0853 }
0854 
0855 /*
0856  * LCD controller task (to reset the LCD)
0857  */
0858 static void atmel_lcdfb_task(struct work_struct *work)
0859 {
0860     struct atmel_lcdfb_info *sinfo =
0861         container_of(work, struct atmel_lcdfb_info, task);
0862 
0863     atmel_lcdfb_reset(sinfo);
0864 }
0865 
0866 static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
0867 {
0868     struct fb_info *info = sinfo->info;
0869     int ret = 0;
0870 
0871     info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
0872 
0873     dev_info(info->device,
0874            "%luKiB frame buffer at %08lx (mapped at %p)\n",
0875            (unsigned long)info->fix.smem_len / 1024,
0876            (unsigned long)info->fix.smem_start,
0877            info->screen_base);
0878 
0879     /* Allocate colormap */
0880     ret = fb_alloc_cmap(&info->cmap, 256, 0);
0881     if (ret < 0)
0882         dev_err(info->device, "Alloc color map failed\n");
0883 
0884     return ret;
0885 }
0886 
0887 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
0888 {
0889     clk_prepare_enable(sinfo->bus_clk);
0890     clk_prepare_enable(sinfo->lcdc_clk);
0891 }
0892 
0893 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
0894 {
0895     clk_disable_unprepare(sinfo->bus_clk);
0896     clk_disable_unprepare(sinfo->lcdc_clk);
0897 }
0898 
0899 static const struct of_device_id atmel_lcdfb_dt_ids[] = {
0900     { .compatible = "atmel,at91sam9261-lcdc" , .data = &at91sam9261_config, },
0901     { .compatible = "atmel,at91sam9263-lcdc" , .data = &at91sam9263_config, },
0902     { .compatible = "atmel,at91sam9g10-lcdc" , .data = &at91sam9g10_config, },
0903     { .compatible = "atmel,at91sam9g45-lcdc" , .data = &at91sam9g45_config, },
0904     { .compatible = "atmel,at91sam9g45es-lcdc" , .data = &at91sam9g45es_config, },
0905     { .compatible = "atmel,at91sam9rl-lcdc" , .data = &at91sam9rl_config, },
0906     { /* sentinel */ }
0907 };
0908 
0909 MODULE_DEVICE_TABLE(of, atmel_lcdfb_dt_ids);
0910 
0911 static const char *atmel_lcdfb_wiring_modes[] = {
0912     [ATMEL_LCDC_WIRING_BGR] = "BRG",
0913     [ATMEL_LCDC_WIRING_RGB] = "RGB",
0914 };
0915 
0916 static int atmel_lcdfb_get_of_wiring_modes(struct device_node *np)
0917 {
0918     const char *mode;
0919     int err, i;
0920 
0921     err = of_property_read_string(np, "atmel,lcd-wiring-mode", &mode);
0922     if (err < 0)
0923         return ATMEL_LCDC_WIRING_BGR;
0924 
0925     for (i = 0; i < ARRAY_SIZE(atmel_lcdfb_wiring_modes); i++)
0926         if (!strcasecmp(mode, atmel_lcdfb_wiring_modes[i]))
0927             return i;
0928 
0929     return -ENODEV;
0930 }
0931 
0932 static void atmel_lcdfb_power_control_gpio(struct atmel_lcdfb_pdata *pdata, int on)
0933 {
0934     struct atmel_lcdfb_power_ctrl_gpio *og;
0935 
0936     list_for_each_entry(og, &pdata->pwr_gpios, list)
0937         gpiod_set_value(og->gpiod, on);
0938 }
0939 
0940 static int atmel_lcdfb_of_init(struct atmel_lcdfb_info *sinfo)
0941 {
0942     struct fb_info *info = sinfo->info;
0943     struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
0944     struct fb_var_screeninfo *var = &info->var;
0945     struct device *dev = &sinfo->pdev->dev;
0946     struct device_node *np =dev->of_node;
0947     struct device_node *display_np;
0948     struct atmel_lcdfb_power_ctrl_gpio *og;
0949     bool is_gpio_power = false;
0950     struct fb_videomode fb_vm;
0951     struct gpio_desc *gpiod;
0952     struct videomode vm;
0953     int ret;
0954     int i;
0955 
0956     sinfo->config = (struct atmel_lcdfb_config*)
0957         of_match_device(atmel_lcdfb_dt_ids, dev)->data;
0958 
0959     display_np = of_parse_phandle(np, "display", 0);
0960     if (!display_np) {
0961         dev_err(dev, "failed to find display phandle\n");
0962         return -ENOENT;
0963     }
0964 
0965     ret = of_property_read_u32(display_np, "bits-per-pixel", &var->bits_per_pixel);
0966     if (ret < 0) {
0967         dev_err(dev, "failed to get property bits-per-pixel\n");
0968         goto put_display_node;
0969     }
0970 
0971     ret = of_property_read_u32(display_np, "atmel,guard-time", &pdata->guard_time);
0972     if (ret < 0) {
0973         dev_err(dev, "failed to get property atmel,guard-time\n");
0974         goto put_display_node;
0975     }
0976 
0977     ret = of_property_read_u32(display_np, "atmel,lcdcon2", &pdata->default_lcdcon2);
0978     if (ret < 0) {
0979         dev_err(dev, "failed to get property atmel,lcdcon2\n");
0980         goto put_display_node;
0981     }
0982 
0983     ret = of_property_read_u32(display_np, "atmel,dmacon", &pdata->default_dmacon);
0984     if (ret < 0) {
0985         dev_err(dev, "failed to get property bits-per-pixel\n");
0986         goto put_display_node;
0987     }
0988 
0989     INIT_LIST_HEAD(&pdata->pwr_gpios);
0990     for (i = 0; i < gpiod_count(dev, "atmel,power-control"); i++) {
0991         ret = -ENOMEM;
0992         gpiod = devm_gpiod_get_index(dev, "atmel,power-control",
0993                          i, GPIOD_ASIS);
0994         if (IS_ERR(gpiod))
0995             continue;
0996 
0997         og = devm_kzalloc(dev, sizeof(*og), GFP_KERNEL);
0998         if (!og)
0999             goto put_display_node;
1000 
1001         og->gpiod = gpiod;
1002         is_gpio_power = true;
1003 
1004         ret = gpiod_direction_output(gpiod, gpiod_is_active_low(gpiod));
1005         if (ret) {
1006             dev_err(dev, "set direction output gpio atmel,power-control[%d] failed\n", i);
1007             goto put_display_node;
1008         }
1009         list_add(&og->list, &pdata->pwr_gpios);
1010     }
1011 
1012     if (is_gpio_power)
1013         pdata->atmel_lcdfb_power_control = atmel_lcdfb_power_control_gpio;
1014 
1015     ret = atmel_lcdfb_get_of_wiring_modes(display_np);
1016     if (ret < 0) {
1017         dev_err(dev, "invalid atmel,lcd-wiring-mode\n");
1018         goto put_display_node;
1019     }
1020     pdata->lcd_wiring_mode = ret;
1021 
1022     pdata->lcdcon_is_backlight = of_property_read_bool(display_np, "atmel,lcdcon-backlight");
1023     pdata->lcdcon_pol_negative = of_property_read_bool(display_np, "atmel,lcdcon-backlight-inverted");
1024 
1025     ret = of_get_videomode(display_np, &vm, OF_USE_NATIVE_MODE);
1026     if (ret) {
1027         dev_err(dev, "failed to get videomode from DT\n");
1028         goto put_display_node;
1029     }
1030 
1031     ret = fb_videomode_from_videomode(&vm, &fb_vm);
1032     if (ret < 0)
1033         goto put_display_node;
1034 
1035     fb_add_videomode(&fb_vm, &info->modelist);
1036 
1037 put_display_node:
1038     of_node_put(display_np);
1039     return ret;
1040 }
1041 
1042 static int __init atmel_lcdfb_probe(struct platform_device *pdev)
1043 {
1044     struct device *dev = &pdev->dev;
1045     struct fb_info *info;
1046     struct atmel_lcdfb_info *sinfo;
1047     struct resource *regs = NULL;
1048     struct resource *map = NULL;
1049     struct fb_modelist *modelist;
1050     int ret;
1051 
1052     dev_dbg(dev, "%s BEGIN\n", __func__);
1053 
1054     ret = -ENOMEM;
1055     info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
1056     if (!info)
1057         goto out;
1058 
1059     sinfo = info->par;
1060     sinfo->pdev = pdev;
1061     sinfo->info = info;
1062 
1063     INIT_LIST_HEAD(&info->modelist);
1064 
1065     if (!pdev->dev.of_node) {
1066         dev_err(dev, "cannot get default configuration\n");
1067         goto free_info;
1068     }
1069 
1070     ret = atmel_lcdfb_of_init(sinfo);
1071     if (ret)
1072         goto free_info;
1073 
1074     ret = -ENODEV;
1075     if (!sinfo->config)
1076         goto free_info;
1077 
1078     sinfo->reg_lcd = devm_regulator_get(&pdev->dev, "lcd");
1079     if (IS_ERR(sinfo->reg_lcd))
1080         sinfo->reg_lcd = NULL;
1081 
1082     info->flags = FBINFO_DEFAULT | FBINFO_PARTIAL_PAN_OK |
1083               FBINFO_HWACCEL_YPAN;
1084     info->pseudo_palette = sinfo->pseudo_palette;
1085     info->fbops = &atmel_lcdfb_ops;
1086 
1087     info->fix = atmel_lcdfb_fix;
1088     strcpy(info->fix.id, sinfo->pdev->name);
1089 
1090     /* Enable LCDC Clocks */
1091     sinfo->bus_clk = clk_get(dev, "hclk");
1092     if (IS_ERR(sinfo->bus_clk)) {
1093         ret = PTR_ERR(sinfo->bus_clk);
1094         goto free_info;
1095     }
1096     sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
1097     if (IS_ERR(sinfo->lcdc_clk)) {
1098         ret = PTR_ERR(sinfo->lcdc_clk);
1099         goto put_bus_clk;
1100     }
1101     atmel_lcdfb_start_clock(sinfo);
1102 
1103     modelist = list_first_entry(&info->modelist,
1104             struct fb_modelist, list);
1105     fb_videomode_to_var(&info->var, &modelist->mode);
1106 
1107     atmel_lcdfb_check_var(&info->var, info);
1108 
1109     regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1110     if (!regs) {
1111         dev_err(dev, "resources unusable\n");
1112         ret = -ENXIO;
1113         goto stop_clk;
1114     }
1115 
1116     sinfo->irq_base = platform_get_irq(pdev, 0);
1117     if (sinfo->irq_base < 0) {
1118         ret = sinfo->irq_base;
1119         goto stop_clk;
1120     }
1121 
1122     /* Initialize video memory */
1123     map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1124     if (map) {
1125         /* use a pre-allocated memory buffer */
1126         info->fix.smem_start = map->start;
1127         info->fix.smem_len = resource_size(map);
1128         if (!request_mem_region(info->fix.smem_start,
1129                     info->fix.smem_len, pdev->name)) {
1130             ret = -EBUSY;
1131             goto stop_clk;
1132         }
1133 
1134         info->screen_base = ioremap_wc(info->fix.smem_start,
1135                            info->fix.smem_len);
1136         if (!info->screen_base) {
1137             ret = -ENOMEM;
1138             goto release_intmem;
1139         }
1140 
1141         /*
1142          * Don't clear the framebuffer -- someone may have set
1143          * up a splash image.
1144          */
1145     } else {
1146         /* allocate memory buffer */
1147         ret = atmel_lcdfb_alloc_video_memory(sinfo);
1148         if (ret < 0) {
1149             dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
1150             goto stop_clk;
1151         }
1152     }
1153 
1154     /* LCDC registers */
1155     info->fix.mmio_start = regs->start;
1156     info->fix.mmio_len = resource_size(regs);
1157 
1158     if (!request_mem_region(info->fix.mmio_start,
1159                 info->fix.mmio_len, pdev->name)) {
1160         ret = -EBUSY;
1161         goto free_fb;
1162     }
1163 
1164     sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
1165     if (!sinfo->mmio) {
1166         dev_err(dev, "cannot map LCDC registers\n");
1167         ret = -ENOMEM;
1168         goto release_mem;
1169     }
1170 
1171     /* Initialize PWM for contrast or backlight ("off") */
1172     init_contrast(sinfo);
1173 
1174     /* interrupt */
1175     ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
1176     if (ret) {
1177         dev_err(dev, "request_irq failed: %d\n", ret);
1178         goto unmap_mmio;
1179     }
1180 
1181     /* Some operations on the LCDC might sleep and
1182      * require a preemptible task context */
1183     INIT_WORK(&sinfo->task, atmel_lcdfb_task);
1184 
1185     ret = atmel_lcdfb_init_fbinfo(sinfo);
1186     if (ret < 0) {
1187         dev_err(dev, "init fbinfo failed: %d\n", ret);
1188         goto unregister_irqs;
1189     }
1190 
1191     ret = atmel_lcdfb_set_par(info);
1192     if (ret < 0) {
1193         dev_err(dev, "set par failed: %d\n", ret);
1194         goto unregister_irqs;
1195     }
1196 
1197     dev_set_drvdata(dev, info);
1198 
1199     /*
1200      * Tell the world that we're ready to go
1201      */
1202     ret = register_framebuffer(info);
1203     if (ret < 0) {
1204         dev_err(dev, "failed to register framebuffer device: %d\n", ret);
1205         goto reset_drvdata;
1206     }
1207 
1208     /* Power up the LCDC screen */
1209     atmel_lcdfb_power_control(sinfo, 1);
1210 
1211     dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n",
1212                info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
1213 
1214     return 0;
1215 
1216 reset_drvdata:
1217     dev_set_drvdata(dev, NULL);
1218     fb_dealloc_cmap(&info->cmap);
1219 unregister_irqs:
1220     cancel_work_sync(&sinfo->task);
1221     free_irq(sinfo->irq_base, info);
1222 unmap_mmio:
1223     exit_backlight(sinfo);
1224     iounmap(sinfo->mmio);
1225 release_mem:
1226     release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1227 free_fb:
1228     if (map)
1229         iounmap(info->screen_base);
1230     else
1231         atmel_lcdfb_free_video_memory(sinfo);
1232 
1233 release_intmem:
1234     if (map)
1235         release_mem_region(info->fix.smem_start, info->fix.smem_len);
1236 stop_clk:
1237     atmel_lcdfb_stop_clock(sinfo);
1238     clk_put(sinfo->lcdc_clk);
1239 put_bus_clk:
1240     clk_put(sinfo->bus_clk);
1241 free_info:
1242     framebuffer_release(info);
1243 out:
1244     dev_dbg(dev, "%s FAILED\n", __func__);
1245     return ret;
1246 }
1247 
1248 static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
1249 {
1250     struct device *dev = &pdev->dev;
1251     struct fb_info *info = dev_get_drvdata(dev);
1252     struct atmel_lcdfb_info *sinfo;
1253 
1254     if (!info || !info->par)
1255         return 0;
1256     sinfo = info->par;
1257 
1258     cancel_work_sync(&sinfo->task);
1259     exit_backlight(sinfo);
1260     atmel_lcdfb_power_control(sinfo, 0);
1261     unregister_framebuffer(info);
1262     atmel_lcdfb_stop_clock(sinfo);
1263     clk_put(sinfo->lcdc_clk);
1264     clk_put(sinfo->bus_clk);
1265     fb_dealloc_cmap(&info->cmap);
1266     free_irq(sinfo->irq_base, info);
1267     iounmap(sinfo->mmio);
1268     release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1269     if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
1270         iounmap(info->screen_base);
1271         release_mem_region(info->fix.smem_start, info->fix.smem_len);
1272     } else {
1273         atmel_lcdfb_free_video_memory(sinfo);
1274     }
1275 
1276     framebuffer_release(info);
1277 
1278     return 0;
1279 }
1280 
1281 #ifdef CONFIG_PM
1282 
1283 static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
1284 {
1285     struct fb_info *info = platform_get_drvdata(pdev);
1286     struct atmel_lcdfb_info *sinfo = info->par;
1287 
1288     /*
1289      * We don't want to handle interrupts while the clock is
1290      * stopped. It may take forever.
1291      */
1292     lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0U);
1293 
1294     sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_CTR);
1295     lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
1296     atmel_lcdfb_power_control(sinfo, 0);
1297     atmel_lcdfb_stop(sinfo);
1298     atmel_lcdfb_stop_clock(sinfo);
1299 
1300     return 0;
1301 }
1302 
1303 static int atmel_lcdfb_resume(struct platform_device *pdev)
1304 {
1305     struct fb_info *info = platform_get_drvdata(pdev);
1306     struct atmel_lcdfb_info *sinfo = info->par;
1307 
1308     atmel_lcdfb_start_clock(sinfo);
1309     atmel_lcdfb_start(sinfo);
1310     atmel_lcdfb_power_control(sinfo, 1);
1311     lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
1312 
1313     /* Enable FIFO & DMA errors */
1314     lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI
1315             | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
1316 
1317     return 0;
1318 }
1319 
1320 #else
1321 #define atmel_lcdfb_suspend NULL
1322 #define atmel_lcdfb_resume  NULL
1323 #endif
1324 
1325 static struct platform_driver atmel_lcdfb_driver = {
1326     .remove     = __exit_p(atmel_lcdfb_remove),
1327     .suspend    = atmel_lcdfb_suspend,
1328     .resume     = atmel_lcdfb_resume,
1329     .driver     = {
1330         .name   = "atmel_lcdfb",
1331         .of_match_table = of_match_ptr(atmel_lcdfb_dt_ids),
1332     },
1333 };
1334 
1335 module_platform_driver_probe(atmel_lcdfb_driver, atmel_lcdfb_probe);
1336 
1337 MODULE_DESCRIPTION("AT91 LCD Controller framebuffer driver");
1338 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1339 MODULE_LICENSE("GPL");
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