vdpa/ifcvf/ifcvf_base.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Intel IFC VF NIC driver for virtio dataplane offloading
0004  *
0005  * Copyright (C) 2020 Intel Corporation.
0006  *
0007  * Author: Zhu Lingshan <lingshan.zhu@intel.com>
0008  *
0009  */
0010
0011 #include "ifcvf_base.h"
0012
0013 struct ifcvf_adapter *vf_to_adapter(struct ifcvf_hw *hw)
0014 {
0015     return container_of(hw, struct ifcvf_adapter, vf);
0016 }
0017
0018 u16 ifcvf_set_vq_vector(struct ifcvf_hw *hw, u16 qid, int vector)
0019 {
0020     struct virtio_pci_common_cfg __iomem *cfg = hw->common_cfg;
0021
0022     vp_iowrite16(qid, &cfg->queue_select);
0023     vp_iowrite16(vector, &cfg->queue_msix_vector);
0024
0025     return vp_ioread16(&cfg->queue_msix_vector);
0026 }
0027
0028 u16 ifcvf_set_config_vector(struct ifcvf_hw *hw, int vector)
0029 {
0030     struct virtio_pci_common_cfg __iomem *cfg = hw->common_cfg;
0031
0032     vp_iowrite16(vector,  &cfg->msix_config);
0033
0034     return vp_ioread16(&cfg->msix_config);
0035 }
0036
0037 static void __iomem *get_cap_addr(struct ifcvf_hw *hw,
0038                   struct virtio_pci_cap *cap)
0039 {
0040     struct ifcvf_adapter *ifcvf;
0041     struct pci_dev *pdev;
0042     u32 length, offset;
0043     u8 bar;
0044
0045     length = le32_to_cpu(cap->length);
0046     offset = le32_to_cpu(cap->offset);
0047     bar = cap->bar;
0048
0049     ifcvf= vf_to_adapter(hw);
0050     pdev = ifcvf->pdev;
0051
0052     if (bar >= IFCVF_PCI_MAX_RESOURCE) {
0053         IFCVF_DBG(pdev,
0054               "Invalid bar number %u to get capabilities\n", bar);
0055         return NULL;
0056     }
0057
0058     if (offset + length > pci_resource_len(pdev, bar)) {
0059         IFCVF_DBG(pdev,
0060               "offset(%u) + len(%u) overflows bar%u's capability\n",
0061               offset, length, bar);
0062         return NULL;
0063     }
0064
0065     return hw->base[bar] + offset;
0066 }
0067
0068 static int ifcvf_read_config_range(struct pci_dev *dev,
0069                    uint32_t *val, int size, int where)
0070 {
0071     int ret, i;
0072
0073     for (i = 0; i < size; i += 4) {
0074         ret = pci_read_config_dword(dev, where + i, val + i / 4);
0075         if (ret < 0)
0076             return ret;
0077     }
0078
0079     return 0;
0080 }
0081
0082 int ifcvf_init_hw(struct ifcvf_hw *hw, struct pci_dev *pdev)
0083 {
0084     struct virtio_pci_cap cap;
0085     u16 notify_off;
0086     int ret;
0087     u8 pos;
0088     u32 i;
0089
0090     ret = pci_read_config_byte(pdev, PCI_CAPABILITY_LIST, &pos);
0091     if (ret < 0) {
0092         IFCVF_ERR(pdev, "Failed to read PCI capability list\n");
0093         return -EIO;
0094     }
0095
0096     while (pos) {
0097         ret = ifcvf_read_config_range(pdev, (u32 *)&cap,
0098                           sizeof(cap), pos);
0099         if (ret < 0) {
0100             IFCVF_ERR(pdev,
0101                   "Failed to get PCI capability at %x\n", pos);
0102             break;
0103         }
0104
0105         if (cap.cap_vndr != PCI_CAP_ID_VNDR)
0106             goto next;
0107
0108         switch (cap.cfg_type) {
0109         case VIRTIO_PCI_CAP_COMMON_CFG:
0110             hw->common_cfg = get_cap_addr(hw, &cap);
0111             IFCVF_DBG(pdev, "hw->common_cfg = %p\n",
0112                   hw->common_cfg);
0113             break;
0114         case VIRTIO_PCI_CAP_NOTIFY_CFG:
0115             pci_read_config_dword(pdev, pos + sizeof(cap),
0116                           &hw->notify_off_multiplier);
0117             hw->notify_bar = cap.bar;
0118             hw->notify_base = get_cap_addr(hw, &cap);
0119             hw->notify_base_pa = pci_resource_start(pdev, cap.bar) +
0120                     le32_to_cpu(cap.offset);
0121             IFCVF_DBG(pdev, "hw->notify_base = %p\n",
0122                   hw->notify_base);
0123             break;
0124         case VIRTIO_PCI_CAP_ISR_CFG:
0125             hw->isr = get_cap_addr(hw, &cap);
0126             IFCVF_DBG(pdev, "hw->isr = %p\n", hw->isr);
0127             break;
0128         case VIRTIO_PCI_CAP_DEVICE_CFG:
0129             hw->dev_cfg = get_cap_addr(hw, &cap);
0130             hw->cap_dev_config_size = le32_to_cpu(cap.length);
0131             IFCVF_DBG(pdev, "hw->dev_cfg = %p\n", hw->dev_cfg);
0132             break;
0133         }
0134
0135 next:
0136         pos = cap.cap_next;
0137     }
0138
0139     if (hw->common_cfg == NULL || hw->notify_base == NULL ||
0140         hw->isr == NULL || hw->dev_cfg == NULL) {
0141         IFCVF_ERR(pdev, "Incomplete PCI capabilities\n");
0142         return -EIO;
0143     }
0144
0145     hw->nr_vring = vp_ioread16(&hw->common_cfg->num_queues);
0146
0147     for (i = 0; i < hw->nr_vring; i++) {
0148         vp_iowrite16(i, &hw->common_cfg->queue_select);
0149         notify_off = vp_ioread16(&hw->common_cfg->queue_notify_off);
0150         hw->vring[i].notify_addr = hw->notify_base +
0151             notify_off * hw->notify_off_multiplier;
0152         hw->vring[i].notify_pa = hw->notify_base_pa +
0153             notify_off * hw->notify_off_multiplier;
0154         hw->vring[i].irq = -EINVAL;
0155     }
0156
0157     hw->lm_cfg = hw->base[IFCVF_LM_BAR];
0158
0159     IFCVF_DBG(pdev,
0160           "PCI capability mapping: common cfg: %p, notify base: %p\n, isr cfg: %p, device cfg: %p, multiplier: %u\n",
0161           hw->common_cfg, hw->notify_base, hw->isr,
0162           hw->dev_cfg, hw->notify_off_multiplier);
0163
0164     hw->vqs_reused_irq = -EINVAL;
0165     hw->config_irq = -EINVAL;
0166
0167     return 0;
0168 }
0169
0170 u8 ifcvf_get_status(struct ifcvf_hw *hw)
0171 {
0172     return vp_ioread8(&hw->common_cfg->device_status);
0173 }
0174
0175 void ifcvf_set_status(struct ifcvf_hw *hw, u8 status)
0176 {
0177     vp_iowrite8(status, &hw->common_cfg->device_status);
0178 }
0179
0180 void ifcvf_reset(struct ifcvf_hw *hw)
0181 {
0182     hw->config_cb.callback = NULL;
0183     hw->config_cb.private = NULL;
0184
0185     ifcvf_set_status(hw, 0);
0186     /* flush set_status, make sure VF is stopped, reset */
0187     ifcvf_get_status(hw);
0188 }
0189
0190 static void ifcvf_add_status(struct ifcvf_hw *hw, u8 status)
0191 {
0192     if (status != 0)
0193         status |= ifcvf_get_status(hw);
0194
0195     ifcvf_set_status(hw, status);
0196     ifcvf_get_status(hw);
0197 }
0198
0199 u64 ifcvf_get_hw_features(struct ifcvf_hw *hw)
0200 {
0201     struct virtio_pci_common_cfg __iomem *cfg = hw->common_cfg;
0202     u32 features_lo, features_hi;
0203     u64 features;
0204
0205     vp_iowrite32(0, &cfg->device_feature_select);
0206     features_lo = vp_ioread32(&cfg->device_feature);
0207
0208     vp_iowrite32(1, &cfg->device_feature_select);
0209     features_hi = vp_ioread32(&cfg->device_feature);
0210
0211     features = ((u64)features_hi << 32) | features_lo;
0212
0213     return features;
0214 }
0215
0216 u64 ifcvf_get_features(struct ifcvf_hw *hw)
0217 {
0218     return hw->hw_features;
0219 }
0220
0221 int ifcvf_verify_min_features(struct ifcvf_hw *hw, u64 features)
0222 {
0223     struct ifcvf_adapter *ifcvf = vf_to_adapter(hw);
0224
0225     if (!(features & BIT_ULL(VIRTIO_F_ACCESS_PLATFORM)) && features) {
0226         IFCVF_ERR(ifcvf->pdev, "VIRTIO_F_ACCESS_PLATFORM is not negotiated\n");
0227         return -EINVAL;
0228     }
0229
0230     return 0;
0231 }
0232
0233 u32 ifcvf_get_config_size(struct ifcvf_hw *hw)
0234 {
0235     struct ifcvf_adapter *adapter;
0236     u32 net_config_size = sizeof(struct virtio_net_config);
0237     u32 blk_config_size = sizeof(struct virtio_blk_config);
0238     u32 cap_size = hw->cap_dev_config_size;
0239     u32 config_size;
0240
0241     adapter = vf_to_adapter(hw);
0242     /* If the onboard device config space size is greater than
0243      * the size of struct virtio_net/blk_config, only the spec
0244      * implementing contents size is returned, this is very
0245      * unlikely, defensive programming.
0246      */
0247     switch (hw->dev_type) {
0248     case VIRTIO_ID_NET:
0249         config_size = min(cap_size, net_config_size);
0250         break;
0251     case VIRTIO_ID_BLOCK:
0252         config_size = min(cap_size, blk_config_size);
0253         break;
0254     default:
0255         config_size = 0;
0256         IFCVF_ERR(adapter->pdev, "VIRTIO ID %u not supported\n", hw->dev_type);
0257     }
0258
0259     return config_size;
0260 }
0261
0262 void ifcvf_read_dev_config(struct ifcvf_hw *hw, u64 offset,
0263                void *dst, int length)
0264 {
0265     u8 old_gen, new_gen, *p;
0266     int i;
0267
0268     WARN_ON(offset + length > hw->config_size);
0269     do {
0270         old_gen = vp_ioread8(&hw->common_cfg->config_generation);
0271         p = dst;
0272         for (i = 0; i < length; i++)
0273             *p++ = vp_ioread8(hw->dev_cfg + offset + i);
0274
0275         new_gen = vp_ioread8(&hw->common_cfg->config_generation);
0276     } while (old_gen != new_gen);
0277 }
0278
0279 void ifcvf_write_dev_config(struct ifcvf_hw *hw, u64 offset,
0280                 const void *src, int length)
0281 {
0282     const u8 *p;
0283     int i;
0284
0285     p = src;
0286     WARN_ON(offset + length > hw->config_size);
0287     for (i = 0; i < length; i++)
0288         vp_iowrite8(*p++, hw->dev_cfg + offset + i);
0289 }
0290
0291 static void ifcvf_set_features(struct ifcvf_hw *hw, u64 features)
0292 {
0293     struct virtio_pci_common_cfg __iomem *cfg = hw->common_cfg;
0294
0295     vp_iowrite32(0, &cfg->guest_feature_select);
0296     vp_iowrite32((u32)features, &cfg->guest_feature);
0297
0298     vp_iowrite32(1, &cfg->guest_feature_select);
0299     vp_iowrite32(features >> 32, &cfg->guest_feature);
0300 }
0301
0302 static int ifcvf_config_features(struct ifcvf_hw *hw)
0303 {
0304     struct ifcvf_adapter *ifcvf;
0305
0306     ifcvf = vf_to_adapter(hw);
0307     ifcvf_set_features(hw, hw->req_features);
0308     ifcvf_add_status(hw, VIRTIO_CONFIG_S_FEATURES_OK);
0309
0310     if (!(ifcvf_get_status(hw) & VIRTIO_CONFIG_S_FEATURES_OK)) {
0311         IFCVF_ERR(ifcvf->pdev, "Failed to set FEATURES_OK status\n");
0312         return -EIO;
0313     }
0314
0315     return 0;
0316 }
0317
0318 u16 ifcvf_get_vq_state(struct ifcvf_hw *hw, u16 qid)
0319 {
0320     struct ifcvf_lm_cfg __iomem *ifcvf_lm;
0321     void __iomem *avail_idx_addr;
0322     u16 last_avail_idx;
0323     u32 q_pair_id;
0324
0325     ifcvf_lm = (struct ifcvf_lm_cfg __iomem *)hw->lm_cfg;
0326     q_pair_id = qid / 2;
0327     avail_idx_addr = &ifcvf_lm->vring_lm_cfg[q_pair_id].idx_addr[qid % 2];
0328     last_avail_idx = vp_ioread16(avail_idx_addr);
0329
0330     return last_avail_idx;
0331 }
0332
0333 int ifcvf_set_vq_state(struct ifcvf_hw *hw, u16 qid, u16 num)
0334 {
0335     struct ifcvf_lm_cfg __iomem *ifcvf_lm;
0336     void __iomem *avail_idx_addr;
0337     u32 q_pair_id;
0338
0339     ifcvf_lm = (struct ifcvf_lm_cfg __iomem *)hw->lm_cfg;
0340     q_pair_id = qid / 2;
0341     avail_idx_addr = &ifcvf_lm->vring_lm_cfg[q_pair_id].idx_addr[qid % 2];
0342     hw->vring[qid].last_avail_idx = num;
0343     vp_iowrite16(num, avail_idx_addr);
0344
0345     return 0;
0346 }
0347
0348 static int ifcvf_hw_enable(struct ifcvf_hw *hw)
0349 {
0350     struct virtio_pci_common_cfg __iomem *cfg;
0351     u32 i;
0352
0353     cfg = hw->common_cfg;
0354     for (i = 0; i < hw->nr_vring; i++) {
0355         if (!hw->vring[i].ready)
0356             break;
0357
0358         vp_iowrite16(i, &cfg->queue_select);
0359         vp_iowrite64_twopart(hw->vring[i].desc, &cfg->queue_desc_lo,
0360                      &cfg->queue_desc_hi);
0361         vp_iowrite64_twopart(hw->vring[i].avail, &cfg->queue_avail_lo,
0362                       &cfg->queue_avail_hi);
0363         vp_iowrite64_twopart(hw->vring[i].used, &cfg->queue_used_lo,
0364                      &cfg->queue_used_hi);
0365         vp_iowrite16(hw->vring[i].size, &cfg->queue_size);
0366         ifcvf_set_vq_state(hw, i, hw->vring[i].last_avail_idx);
0367         vp_iowrite16(1, &cfg->queue_enable);
0368     }
0369
0370     return 0;
0371 }
0372
0373 static void ifcvf_hw_disable(struct ifcvf_hw *hw)
0374 {
0375     u32 i;
0376
0377     ifcvf_set_config_vector(hw, VIRTIO_MSI_NO_VECTOR);
0378     for (i = 0; i < hw->nr_vring; i++) {
0379         ifcvf_set_vq_vector(hw, i, VIRTIO_MSI_NO_VECTOR);
0380     }
0381 }
0382
0383 int ifcvf_start_hw(struct ifcvf_hw *hw)
0384 {
0385     ifcvf_reset(hw);
0386     ifcvf_add_status(hw, VIRTIO_CONFIG_S_ACKNOWLEDGE);
0387     ifcvf_add_status(hw, VIRTIO_CONFIG_S_DRIVER);
0388
0389     if (ifcvf_config_features(hw) < 0)
0390         return -EINVAL;
0391
0392     if (ifcvf_hw_enable(hw) < 0)
0393         return -EINVAL;
0394
0395     ifcvf_add_status(hw, VIRTIO_CONFIG_S_DRIVER_OK);
0396
0397     return 0;
0398 }
0399
0400 void ifcvf_stop_hw(struct ifcvf_hw *hw)
0401 {
0402     ifcvf_hw_disable(hw);
0403     ifcvf_reset(hw);
0404 }
0405
0406 void ifcvf_notify_queue(struct ifcvf_hw *hw, u16 qid)
0407 {
0408     vp_iowrite16(qid, hw->vring[qid].notify_addr);
0409 }