0001
0002
0003
0004
0005
0006
0007
0008
0009 #include <linux/bits.h>
0010 #include <linux/bitfield.h>
0011
0012 #ifndef __TPS6598X_H__
0013 #define __TPS6598X_H__
0014
0015 #define TPS_FIELD_GET(_mask, _reg) ((typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask)))
0016
0017
0018 #define TPS_STATUS_PLUG_PRESENT BIT(0)
0019 #define TPS_STATUS_PLUG_UPSIDE_DOWN BIT(4)
0020 #define TPS_STATUS_TO_UPSIDE_DOWN(s) (!!((s) & TPS_STATUS_PLUG_UPSIDE_DOWN))
0021 #define TPS_STATUS_PORTROLE BIT(5)
0022 #define TPS_STATUS_TO_TYPEC_PORTROLE(s) (!!((s) & TPS_STATUS_PORTROLE))
0023 #define TPS_STATUS_DATAROLE BIT(6)
0024 #define TPS_STATUS_TO_TYPEC_DATAROLE(s) (!!((s) & TPS_STATUS_DATAROLE))
0025 #define TPS_STATUS_VCONN BIT(7)
0026 #define TPS_STATUS_TO_TYPEC_VCONN(s) (!!((s) & TPS_STATUS_VCONN))
0027 #define TPS_STATUS_OVERCURRENT BIT(16)
0028 #define TPS_STATUS_GOTO_MIN_ACTIVE BIT(26)
0029 #define TPS_STATUS_BIST BIT(27)
0030 #define TPS_STATUS_HIGH_VOLAGE_WARNING BIT(28)
0031 #define TPS_STATUS_HIGH_LOW_VOLTAGE_WARNING BIT(29)
0032
0033 #define TPS_STATUS_CONN_STATE_MASK GENMASK(3, 1)
0034 #define TPS_STATUS_CONN_STATE(x) TPS_FIELD_GET(TPS_STATUS_CONN_STATE_MASK, (x))
0035 #define TPS_STATUS_PP_5V0_SWITCH_MASK GENMASK(9, 8)
0036 #define TPS_STATUS_PP_5V0_SWITCH(x) TPS_FIELD_GET(TPS_STATUS_PP_5V0_SWITCH_MASK, (x))
0037 #define TPS_STATUS_PP_HV_SWITCH_MASK GENMASK(11, 10)
0038 #define TPS_STATUS_PP_HV_SWITCH(x) TPS_FIELD_GET(TPS_STATUS_PP_HV_SWITCH_MASK, (x))
0039 #define TPS_STATUS_PP_EXT_SWITCH_MASK GENMASK(13, 12)
0040 #define TPS_STATUS_PP_EXT_SWITCH(x) TPS_FIELD_GET(TPS_STATUS_PP_EXT_SWITCH_MASK, (x))
0041 #define TPS_STATUS_PP_CABLE_SWITCH_MASK GENMASK(15, 14)
0042 #define TPS_STATUS_PP_CABLE_SWITCH(x) TPS_FIELD_GET(TPS_STATUS_PP_CABLE_SWITCH_MASK, (x))
0043 #define TPS_STATUS_POWER_SOURCE_MASK GENMASK(19, 18)
0044 #define TPS_STATUS_POWER_SOURCE(x) TPS_FIELD_GET(TPS_STATUS_POWER_SOURCE_MASK, (x))
0045 #define TPS_STATUS_VBUS_STATUS_MASK GENMASK(21, 20)
0046 #define TPS_STATUS_VBUS_STATUS(x) TPS_FIELD_GET(TPS_STATUS_VBUS_STATUS_MASK, (x))
0047 #define TPS_STATUS_USB_HOST_PRESENT_MASK GENMASK(23, 22)
0048 #define TPS_STATUS_USB_HOST_PRESENT(x) TPS_FIELD_GET(TPS_STATUS_USB_HOST_PRESENT_MASK, (x))
0049 #define TPS_STATUS_LEGACY_MASK GENMASK(25, 24)
0050 #define TPS_STATUS_LEGACY(x) TPS_FIELD_GET(TPS_STATUS_LEGACY_MASK, (x))
0051
0052 #define TPS_STATUS_CONN_STATE_NO_CONN 0
0053 #define TPS_STATUS_CONN_STATE_DISABLED 1
0054 #define TPS_STATUS_CONN_STATE_AUDIO_CONN 2
0055 #define TPS_STATUS_CONN_STATE_DEBUG_CONN 3
0056 #define TPS_STATUS_CONN_STATE_NO_CONN_R_A 4
0057 #define TPS_STATUS_CONN_STATE_RESERVED 5
0058 #define TPS_STATUS_CONN_STATE_CONN_NO_R_A 6
0059 #define TPS_STATUS_CONN_STATE_CONN_WITH_R_A 7
0060
0061 #define TPS_STATUS_PP_SWITCH_STATE_DISABLED 0
0062 #define TPS_STATUS_PP_SWITCH_STATE_FAULT 1
0063 #define TPS_STATUS_PP_SWITCH_STATE_OUT 2
0064 #define TPS_STATUS_PP_SWITCH_STATE_IN 3
0065
0066 #define TPS_STATUS_POWER_SOURCE_UNKNOWN 0
0067 #define TPS_STATUS_POWER_SOURCE_VIN_3P3 1
0068 #define TPS_STATUS_POWER_SOURCE_DEAD_BAT 2
0069 #define TPS_STATUS_POWER_SOURCE_VBUS 3
0070
0071 #define TPS_STATUS_VBUS_STATUS_VSAFE0V 0
0072 #define TPS_STATUS_VBUS_STATUS_VSAFE5V 1
0073 #define TPS_STATUS_VBUS_STATUS_PD 2
0074 #define TPS_STATUS_VBUS_STATUS_FAULT 3
0075
0076 #define TPS_STATUS_USB_HOST_PRESENT_NO 0
0077 #define TPS_STATUS_USB_HOST_PRESENT_PD_NO_USB 1
0078 #define TPS_STATUS_USB_HOST_PRESENT_NO_PD 2
0079 #define TPS_STATUS_USB_HOST_PRESENT_PD_USB 3
0080
0081 #define TPS_STATUS_LEGACY_NO 0
0082 #define TPS_STATUS_LEGACY_SINK 1
0083 #define TPS_STATUS_LEGACY_SOURCE 2
0084
0085
0086 #define TPS_REG_INT_USER_VID_ALT_MODE_OTHER_VDM BIT_ULL(27+32)
0087 #define TPS_REG_INT_USER_VID_ALT_MODE_ATTN_VDM BIT_ULL(26+32)
0088 #define TPS_REG_INT_USER_VID_ALT_MODE_EXIT BIT_ULL(25+32)
0089 #define TPS_REG_INT_USER_VID_ALT_MODE_ENTERED BIT_ULL(24+32)
0090 #define TPS_REG_INT_EXIT_MODES_COMPLETE BIT_ULL(20+32)
0091 #define TPS_REG_INT_DISCOVER_MODES_COMPLETE BIT_ULL(19+32)
0092 #define TPS_REG_INT_VDM_MSG_SENT BIT_ULL(18+32)
0093 #define TPS_REG_INT_VDM_ENTERED_MODE BIT_ULL(17+32)
0094 #define TPS_REG_INT_ERROR_UNABLE_TO_SOURCE BIT_ULL(14+32)
0095 #define TPS_REG_INT_SRC_TRANSITION BIT_ULL(10+32)
0096 #define TPS_REG_INT_ERROR_DISCHARGE_FAILED BIT_ULL(9+32)
0097 #define TPS_REG_INT_ERROR_MESSAGE_DATA BIT_ULL(7+32)
0098 #define TPS_REG_INT_ERROR_PROTOCOL_ERROR BIT_ULL(6+32)
0099 #define TPS_REG_INT_ERROR_MISSING_GET_CAP_MESSAGE BIT_ULL(4+32)
0100 #define TPS_REG_INT_ERROR_POWER_EVENT_OCCURRED BIT_ULL(3+32)
0101 #define TPS_REG_INT_ERROR_CAN_PROVIDE_PWR_LATER BIT_ULL(2+32)
0102 #define TPS_REG_INT_ERROR_CANNOT_PROVIDE_PWR BIT_ULL(1+32)
0103 #define TPS_REG_INT_ERROR_DEVICE_INCOMPATIBLE BIT_ULL(0+32)
0104 #define TPS_REG_INT_CMD2_COMPLETE BIT(31)
0105 #define TPS_REG_INT_CMD1_COMPLETE BIT(30)
0106 #define TPS_REG_INT_ADC_HIGH_THRESHOLD BIT(29)
0107 #define TPS_REG_INT_ADC_LOW_THRESHOLD BIT(28)
0108 #define TPS_REG_INT_PD_STATUS_UPDATE BIT(27)
0109 #define TPS_REG_INT_STATUS_UPDATE BIT(26)
0110 #define TPS_REG_INT_DATA_STATUS_UPDATE BIT(25)
0111 #define TPS_REG_INT_POWER_STATUS_UPDATE BIT(24)
0112 #define TPS_REG_INT_PP_SWITCH_CHANGED BIT(23)
0113 #define TPS_REG_INT_HIGH_VOLTAGE_WARNING BIT(22)
0114 #define TPS_REG_INT_USB_HOST_PRESENT_NO_LONGER BIT(21)
0115 #define TPS_REG_INT_USB_HOST_PRESENT BIT(20)
0116 #define TPS_REG_INT_GOTO_MIN_RECEIVED BIT(19)
0117 #define TPS_REG_INT_PR_SWAP_REQUESTED BIT(17)
0118 #define TPS_REG_INT_SINK_CAP_MESSAGE_READY BIT(15)
0119 #define TPS_REG_INT_SOURCE_CAP_MESSAGE_READY BIT(14)
0120 #define TPS_REG_INT_NEW_CONTRACT_AS_PROVIDER BIT(13)
0121 #define TPS_REG_INT_NEW_CONTRACT_AS_CONSUMER BIT(12)
0122 #define TPS_REG_INT_VDM_RECEIVED BIT(11)
0123 #define TPS_REG_INT_ATTENTION_RECEIVED BIT(10)
0124 #define TPS_REG_INT_OVERCURRENT BIT(9)
0125 #define TPS_REG_INT_BIST BIT(8)
0126 #define TPS_REG_INT_RDO_RECEIVED_FROM_SINK BIT(7)
0127 #define TPS_REG_INT_DR_SWAP_COMPLETE BIT(5)
0128 #define TPS_REG_INT_PR_SWAP_COMPLETE BIT(4)
0129 #define TPS_REG_INT_PLUG_EVENT BIT(3)
0130 #define TPS_REG_INT_HARD_RESET BIT(1)
0131 #define TPS_REG_INT_PD_SOFT_RESET BIT(0)
0132
0133
0134 #define APPLE_CD_REG_INT_DATA_STATUS_UPDATE BIT(10)
0135 #define APPLE_CD_REG_INT_POWER_STATUS_UPDATE BIT(9)
0136 #define APPLE_CD_REG_INT_STATUS_UPDATE BIT(8)
0137 #define APPLE_CD_REG_INT_PLUG_EVENT BIT(1)
0138
0139
0140 #define TPS_SYSTEM_POWER_STATE_S0 0x00
0141 #define TPS_SYSTEM_POWER_STATE_S3 0x03
0142 #define TPS_SYSTEM_POWER_STATE_S4 0x04
0143 #define TPS_SYSTEM_POWER_STATE_S5 0x05
0144
0145
0146 #define TPS_POWER_STATUS_CONNECTION(x) TPS_FIELD_GET(BIT(0), (x))
0147 #define TPS_POWER_STATUS_SOURCESINK(x) TPS_FIELD_GET(BIT(1), (x))
0148 #define TPS_POWER_STATUS_BC12_DET(x) TPS_FIELD_GET(BIT(2), (x))
0149
0150 #define TPS_POWER_STATUS_TYPEC_CURRENT_MASK GENMASK(3, 2)
0151 #define TPS_POWER_STATUS_PWROPMODE(p) TPS_FIELD_GET(TPS_POWER_STATUS_TYPEC_CURRENT_MASK, (p))
0152 #define TPS_POWER_STATUS_BC12_STATUS_MASK GENMASK(6, 5)
0153 #define TPS_POWER_STATUS_BC12_STATUS(p) TPS_FIELD_GET(TPS_POWER_STATUS_BC12_STATUS_MASK, (p))
0154
0155 #define TPS_POWER_STATUS_TYPEC_CURRENT_USB 0
0156 #define TPS_POWER_STATUS_TYPEC_CURRENT_1A5 1
0157 #define TPS_POWER_STATUS_TYPEC_CURRENT_3A0 2
0158 #define TPS_POWER_STATUS_TYPEC_CURRENT_PD 3
0159
0160 #define TPS_POWER_STATUS_BC12_STATUS_SDP 0
0161 #define TPS_POWER_STATUS_BC12_STATUS_CDP 2
0162 #define TPS_POWER_STATUS_BC12_STATUS_DCP 3
0163
0164
0165 #define TPS_DATA_STATUS_DATA_CONNECTION BIT(0)
0166 #define TPS_DATA_STATUS_UPSIDE_DOWN BIT(1)
0167 #define TPS_DATA_STATUS_ACTIVE_CABLE BIT(2)
0168 #define TPS_DATA_STATUS_USB2_CONNECTION BIT(4)
0169 #define TPS_DATA_STATUS_USB3_CONNECTION BIT(5)
0170 #define TPS_DATA_STATUS_USB3_GEN2 BIT(6)
0171 #define TPS_DATA_STATUS_USB_DATA_ROLE BIT(7)
0172 #define TPS_DATA_STATUS_DP_CONNECTION BIT(8)
0173 #define TPS_DATA_STATUS_DP_SINK BIT(9)
0174 #define TPS_DATA_STATUS_TBT_CONNECTION BIT(16)
0175 #define TPS_DATA_STATUS_TBT_TYPE BIT(17)
0176 #define TPS_DATA_STATUS_OPTICAL_CABLE BIT(18)
0177 #define TPS_DATA_STATUS_ACTIVE_LINK_TRAIN BIT(20)
0178 #define TPS_DATA_STATUS_FORCE_LSX BIT(23)
0179 #define TPS_DATA_STATUS_POWER_MISMATCH BIT(24)
0180
0181 #define TPS_DATA_STATUS_DP_PIN_ASSIGNMENT_MASK GENMASK(11, 10)
0182 #define TPS_DATA_STATUS_DP_PIN_ASSIGNMENT(x) \
0183 TPS_FIELD_GET(TPS_DATA_STATUS_DP_PIN_ASSIGNMENT_MASK, (x))
0184 #define TPS_DATA_STATUS_TBT_CABLE_SPEED_MASK GENMASK(27, 25)
0185 #define TPS_DATA_STATUS_TBT_CABLE_SPEED \
0186 TPS_FIELD_GET(TPS_DATA_STATUS_TBT_CABLE_SPEED_MASK, (x))
0187 #define TPS_DATA_STATUS_TBT_CABLE_GEN_MASK GENMASK(29, 28)
0188 #define TPS_DATA_STATUS_TBT_CABLE_GEN \
0189 TPS_FIELD_GET(TPS_DATA_STATUS_TBT_CABLE_GEN_MASK, (x))
0190
0191
0192 #define TPS_DATA_STATUS_DP_SPEC_PIN_ASSIGNMENT(x) \
0193 ((TPS_DATA_STATUS_DP_PIN_ASSIGNMENT(x) << 1) | \
0194 TPS_FIELD_GET(TPS_DATA_STATUS_USB3_CONNECTION, (x)))
0195 #define TPS_DATA_STATUS_DP_SPEC_PIN_ASSIGNMENT_E 0
0196 #define TPS_DATA_STATUS_DP_SPEC_PIN_ASSIGNMENT_F BIT(0)
0197 #define TPS_DATA_STATUS_DP_SPEC_PIN_ASSIGNMENT_C BIT(1)
0198 #define TPS_DATA_STATUS_DP_SPEC_PIN_ASSIGNMENT_D (BIT(1) | BIT(0))
0199 #define TPS_DATA_STATUS_DP_SPEC_PIN_ASSIGNMENT_A BIT(2)
0200 #define TPS_DATA_STATUS_DP_SPEC_PIN_ASSIGNMENT_B (BIT(2) | BIT(1))
0201
0202 #endif